From bdb006cad8f3639fe1048d93e4fe23173ed6486a Mon Sep 17 00:00:00 2001 From: Robby Cai Date: Wed, 27 Jan 2021 21:54:32 +0800 Subject: MLK-23600-1 Change MIPI CSI clock to 266MHz for dual ISP cameras Set MIPI clock according to IC team. for 1 ISP camera on CSI0, MIPI CSI clock set to 500MHz for 2 ISP cameras on CSI0/CSI1, MIPI CSI clock both set to 266MHz Signed-off-by: Robby Cai Reviewed-by: Guoniu.zhou (cherry picked from commit a38f457b63fa8a0d9b4c5de39a12959c172e7e35) (cherry picked from commit e20ebbce9f06086249d7dda9d73bd9e328074c02) Signed-off-by: Andrey Zhizhikin --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm64/boot/dts/freescale/imx8mp.dtsi') diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 0587b201b83b..133a45f22ffe 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1880,7 +1880,7 @@ <&clk IMX8MP_CLK_MEDIA_APB>; clock-names = "mipi_clk", "disp_axi", "disp_apb"; assigned-clocks = <&clk IMX8MP_CLK_MEDIA_CAM2_PIX>; - assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>; assigned-clock-rates = <266000000>; bus-width = <4>; csi-gpr = <&mediamix_gasket1>; -- cgit v1.2.3