From 4b8d4a6c107f32f1efd3fff2cd9dd2f42fc3a746 Mon Sep 17 00:00:00 2001 From: Richard Zhu Date: Tue, 26 Nov 2019 15:58:52 +0800 Subject: arm64: dts: enable the imx pcie ep verification solution Enable the imx pcie ep verification solution. Signed-off-by: Richard Zhu Reviewed-by: Fugang Duan --- arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'arch/arm64/boot/dts/freescale/imx8mq-evk.dts') diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts index 5e42c4803d56..13a79204f202 100755 --- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts @@ -22,6 +22,17 @@ reg = <0x00000000 0x40000000 0 0xc0000000>; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + rpmsg_reserved: rpmsg@0xb8000000 { + no-map; + reg = <0 0xb8000000 0 0x400000>; + }; + }; + modem_reset: modem-reset { compatible = "gpio-reset"; reset-gpios = <&gpio3 5 GPIO_ACTIVE_LOW>; @@ -615,6 +626,7 @@ <&clk IMX8MQ_CLK_PCIE1_PHY>, <&pcie0_refclk>; clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus"; + hard-wired = <1>; status = "okay"; }; @@ -628,6 +640,7 @@ <&clk IMX8MQ_CLK_PCIE2_PHY>, <&pcie1_refclk>; clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus"; + reserved-region = <&rpmsg_reserved>; status = "okay"; }; -- cgit v1.2.3