From fc229c0fc130d20edbf7a852d4ef8a2e8146b3ac Mon Sep 17 00:00:00 2001 From: Ella Feng Date: Fri, 6 Sep 2019 19:28:21 +0800 Subject: arm64: dts: imx8mq: Add GPU device for 8MQ Add gpu in device tree: arch/arm64/boot/dts/freescale/imx8mq.dtsi arch/arm64/boot/dts/freescale/imx8mq-evk.dts Signed-off-by: Ella Feng --- arch/arm64/boot/dts/freescale/imx8mq.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'arch/arm64/boot/dts/freescale/imx8mq.dtsi') diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index ea7f2330657a..c9b89ba85439 100755 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -1203,6 +1203,30 @@ status = "disabled"; }; + gpu3d: gpu3d@38000000 { + compatible = "fsl,imx8mq-gpu", "fsl,imx6q-gpu"; + reg = <0x38000000 0x40000>, <0x40000000 0xC0000000>, <0x0 0x10000000>; + reg-names = "iobase_3d", "phys_baseaddr", "contiguous_mem"; + interrupts = ; + interrupt-names = "irq_3d"; + clocks = <&clk IMX8MQ_CLK_GPU_ROOT>, + <&clk IMX8MQ_CLK_GPU_SHADER_DIV>, + <&clk IMX8MQ_CLK_GPU_AXI>, + <&clk IMX8MQ_CLK_GPU_AHB>; + clock-names = "gpu3d_clk", "gpu3d_shader_clk", "gpu3d_axi_clk", "gpu3d_ahb_clk"; + assigned-clocks = <&clk IMX8MQ_CLK_GPU_CORE_SRC>, + <&clk IMX8MQ_CLK_GPU_SHADER_SRC>, + <&clk IMX8MQ_CLK_GPU_AXI>, + <&clk IMX8MQ_CLK_GPU_AHB>; + assigned-clock-parents = <&clk IMX8MQ_GPU_PLL_OUT>, + <&clk IMX8MQ_GPU_PLL_OUT>, + <&clk IMX8MQ_GPU_PLL_OUT>, + <&clk IMX8MQ_GPU_PLL_OUT>; + assigned-clock-rates = <800000000>, <800000000>, <800000000>, <800000000>; + power-domains = <&pgc_gpu>; + status = "disabled"; + }; + usb_dwc3_0: usb@38100000 { compatible = "fsl,imx8mq-dwc3", "snps,dwc3"; reg = <0x38100000 0x10000>; -- cgit v1.2.3