From 48daa0ca63cdac5efc95f606ad2daf66edfbd28f Mon Sep 17 00:00:00 2001 From: Fugang Duan Date: Fri, 22 May 2020 18:18:09 +0800 Subject: MLK-24174-04 arm64: dts: imx8: standardize the tja110x phy address Some tja1100 cards phy address is 0x2, some cards is 0x5. tja1101 cards phy address is 0x2. To make thing simple, and to support tja1100 and tja1101 cards by one dts file, we define the tja110x card phy address to 0x2 in default bsp. Reviewed-by: Richard Zhu Signed-off-by: Fugang Duan --- arch/arm64/boot/dts/freescale/imx8qm-enet2-tja1100.dtsi | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'arch/arm64/boot/dts/freescale/imx8qm-enet2-tja1100.dtsi') diff --git a/arch/arm64/boot/dts/freescale/imx8qm-enet2-tja1100.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-enet2-tja1100.dtsi index 8e3b94666e2b..13692cf40709 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm-enet2-tja1100.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qm-enet2-tja1100.dtsi @@ -18,24 +18,24 @@ * to board limitation. */ &fec1 { - /* PHY address should rework to 2 */ - phy-handle = <ðphy2>; + /* PHY address should rework to 3 */ + phy-handle = <ðphy3>; mdio { #address-cells = <1>; #size-cells = <0>; - ethphy0: ethernet-phy@0 { + ethphy2: ethernet-phy@2 { compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0>; + reg = <2>; tja110x,refclk_in; /delete-property/ at803x,eee-disabled; /delete-property/ at803x,vddio-1p8v; }; - ethphy2: ethernet-phy@2 { + ethphy3: ethernet-phy@3 { compatible = "ethernet-phy-ieee802.3-c22"; - reg = <2>; + reg = <3>; at803x,eee-disabled; at803x,vddio-1p8v; }; @@ -50,7 +50,7 @@ <&enet1_lpcg 0>, <&enet1_lpcg 1>; phy-mode = "rmii"; - phy-handle = <ðphy0>; + phy-handle = <ðphy2>; /delete-property/ phy-supply; }; -- cgit v1.2.3