From 7a34d0e8b2f6a6dcf6c8461d06604058594f2a47 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Wed, 6 Nov 2019 10:33:51 +0800 Subject: arm64: dts: imx8qm: Add LPDDR4 validation board single cluster support Add *-ca53.dtb and *-ca72.dtb to support booting up single cluster on LPDDR4 validation board, to boot up single A72 cluster, dedicated flash.bin needs to be used. Signed-off-by: Anson Huang --- .../boot/dts/freescale/imx8qm-lpddr4-val-ca53.dts | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-lpddr4-val-ca53.dts (limited to 'arch/arm64/boot/dts/freescale/imx8qm-lpddr4-val-ca53.dts') diff --git a/arch/arm64/boot/dts/freescale/imx8qm-lpddr4-val-ca53.dts b/arch/arm64/boot/dts/freescale/imx8qm-lpddr4-val-ca53.dts new file mode 100644 index 000000000000..53f8bad38368 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-lpddr4-val-ca53.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 NXP + */ + +/dts-v1/; + +#include "imx8qm-lpddr4-val.dts" + +&thermal_zones { + /delete-node/ cpu-thermal1; + + pmic-thermal0 { + cooling-maps { + map0 { + cooling-device = + <&A53_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A53_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A53_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A53_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; +}; + +&cpus { + /delete-node/ cpu-map; + /delete-node/ cpu@100; + /delete-node/ cpu@101; +}; -- cgit v1.2.3