From 264e4fe116a6b27869f690b9910f16a706acf2e0 Mon Sep 17 00:00:00 2001 From: Liu Ying Date: Mon, 30 Mar 2020 10:37:34 +0800 Subject: LF-1189-15 arm64: imx8qxp-mek: Add Seiko WVGA LCD panel(driven by DPU) support This patch adds Seiko WVGA LCD panel support on the i.MX8qxp mek platform. The panel is driven by DPU in DC0 subsystem. Reviewed-by: Robert Chiras Tested-by: Robert Chiras Signed-off-by: Liu Ying --- .../boot/dts/freescale/imx8qxp-mek-dpu-lcdif.dts | 77 ++++++++++++++++++++++ 1 file changed, 77 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8qxp-mek-dpu-lcdif.dts (limited to 'arch/arm64/boot/dts/freescale/imx8qxp-mek-dpu-lcdif.dts') diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek-dpu-lcdif.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek-dpu-lcdif.dts new file mode 100644 index 000000000000..c8397bb6d456 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek-dpu-lcdif.dts @@ -0,0 +1,77 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2020 NXP + */ + +#include "imx8qxp-mek-rpmsg.dts" + +/ { + panel { + compatible = "sii,43wvf1g"; + backlight = <&lcdif_backlight>; + status = "okay"; + + port { + lcd_panel_in: endpoint { + remote-endpoint = <&lcd_display_out>; + }; + }; + }; + + display@disp1 { + compatible = "fsl,imx-lcdif-mux-display"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcdif>; + clocks = <&clk IMX_SC_R_LCD_0 IMX_SC_PM_CLK_BYPASS>, + <&clk IMX_SC_R_LCD_0 IMX_SC_PM_CLK_MISC0>; + clock-names = "bypass_div", "pixel"; + assigned-clocks = <&clk IMX_SC_R_LCD_0 IMX_SC_PM_CLK_MISC0>; + assigned-clock-parents = <&clk IMX_SC_R_LCD_0 IMX_SC_PM_CLK_BYPASS>; + fsl,lcdif-mux-regs = <&lcdif_mux_regs>; + fsl,interface-pix-fmt = "rgb666"; + power-domains = <&pd IMX_SC_R_LCD_0>; + status = "okay"; + + port@0 { + reg = <0>; + + lcd_display_in: endpoint { + remote-endpoint = <&dpu_disp1_lcdif>; + }; + }; + + port@1 { + reg = <1>; + + lcd_display_out: endpoint { + remote-endpoint = <&lcd_panel_in>; + }; + }; + }; +}; + +&dpu_disp1_lcdif { + remote-endpoint = <&lcd_display_in>; +}; + +&iomuxc { + pinctrl_hog: hoggrp { + fsl,pins = < + IMX8QXP_COMP_CTL_GPIO_1V8_3V3_GPIORHB_PAD 0x40000000 + >; + }; +}; + +&sai1 { + status = "disabled"; +}; + +&esai0 { + status = "disabled"; +}; + +&lpuart1 { + status = "disabled"; +}; -- cgit v1.2.3