From 9cc6950b27fa2b6fdea3e589229818dea0ea502d Mon Sep 17 00:00:00 2001 From: Liu Ying Date: Mon, 21 Jan 2019 15:16:14 +0800 Subject: arm64: dts: imx8qxp-mek: Enable IT6263 LVDS to HDMI displays This patch enables IT6263 LVDS to HDMI displays on the iMX8qxp mek platform. Signed-off-by: Liu Ying --- arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 102 ++++++++++++++++++++++++++ 1 file changed, 102 insertions(+) (limited to 'arch/arm64/boot/dts/freescale/imx8qxp-mek.dts') diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts index 651d9d80981d..e5261241fb5c 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts +++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts @@ -224,6 +224,92 @@ status = "okay"; }; +&i2c0_mipi_lvds0 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0_mipi_lvds0>; + clock-frequency = <100000>; + status = "okay"; + + lvds-to-hdmi-bridge@4c { + compatible = "ite,it6263"; + reg = <0x4c>; + reset-gpios = <&pca9557_a 6 GPIO_ACTIVE_LOW>; + + port { + it6263_0_in: endpoint { + remote-endpoint = <&lvds0_out>; + }; + }; + }; +}; + +&ldb1_phy { + status = "okay"; +}; + +&ldb1 { + status = "okay"; + + lvds-channel@0 { + fsl,data-mapping = "jeida"; + fsl,data-width = <24>; + status = "okay"; + + port@1 { + reg = <1>; + + lvds0_out: endpoint { + remote-endpoint = <&it6263_0_in>; + }; + }; + }; +}; + +&i2c0_mipi_lvds1 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0_mipi_lvds1>; + clock-frequency = <100000>; + status = "okay"; + + lvds-to-hdmi-bridge@4c { + compatible = "ite,it6263"; + reg = <0x4c>; + reset-gpios = <&pca9557_b 7 GPIO_ACTIVE_LOW>; + + port { + it6263_1_in: endpoint { + remote-endpoint = <&lvds1_out>; + }; + }; + }; +}; + +&ldb2_phy { + status = "okay"; +}; + +&ldb2 { + status = "okay"; + + lvds-channel@0 { + fsl,data-mapping = "jeida"; + fsl,data-width = <24>; + status = "okay"; + + port@1 { + reg = <1>; + + lvds1_out: endpoint { + remote-endpoint = <&it6263_1_in>; + }; + }; + }; +}; + &adma_lpuart0 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lpuart0>; @@ -578,6 +664,22 @@ >; }; + pinctrl_i2c0_mipi_lvds0: mipi_lvds0_i2c0_grp { + fsl,pins = < + IMX8QXP_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL 0xc6000020 + IMX8QXP_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA 0xc6000020 + IMX8QXP_MIPI_DSI0_GPIO0_01_LSIO_GPIO1_IO28 0x00000020 + >; + }; + + pinctrl_i2c0_mipi_lvds1: mipi_lvds1_i2c0_grp { + fsl,pins = < + IMX8QXP_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL 0xc6000020 + IMX8QXP_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA 0xc6000020 + IMX8QXP_MIPI_DSI1_GPIO0_01_LSIO_GPIO2_IO00 0x00000020 + >; + }; + pinctrl_esai0: esai0grp { fsl,pins = < IMX8QXP_ESAI0_FSR_ADMA_ESAI0_FSR 0xc6000040 -- cgit v1.2.3