From 099c2eaed2d5c1b91041c5bdda1d8daa999eaae6 Mon Sep 17 00:00:00 2001 From: Liu Ying Date: Fri, 15 Nov 2019 10:08:39 +0800 Subject: arm64: imx8qxp-ss-lvds.dtsi: Add properties of aux ldb to support split mode This patch adds properties of auxiliary ldb to support LDB split mode for i.MX8QXP MIPI DSI/LVDS subsystem device tree. Signed-off-by: Liu Ying --- arch/arm64/boot/dts/freescale/imx8qxp-ss-lvds.dtsi | 22 ++++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) (limited to 'arch/arm64/boot/dts/freescale/imx8qxp-ss-lvds.dtsi') diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-ss-lvds.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp-ss-lvds.dtsi index 86668c1692c7..d3d4719c5f68 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp-ss-lvds.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp-ss-lvds.dtsi @@ -124,10 +124,15 @@ #size-cells = <0>; compatible = "fsl,imx8qxp-ldb"; clocks = <&clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_MISC2>, - <&clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_BYPASS>; - clock-names = "pixel", "bypass"; - power-domains = <&pd IMX_SC_R_LVDS_0>; + <&clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_BYPASS>, + <&clk IMX_SC_R_LVDS_1 IMX_SC_PM_CLK_MISC2>, + <&clk IMX_SC_R_LVDS_1 IMX_SC_PM_CLK_BYPASS>; + clock-names = "pixel", "bypass", + "aux_pixel", "aux_bypass"; + power-domains = <&pd IMX_SC_R_LVDS_0>, + <&pd IMX_SC_R_LVDS_1>; gpr = <&lvds_region1>; + fsl,auxldb = <&ldb2>; status = "disabled"; lvds-channel@0 { @@ -227,10 +232,15 @@ #size-cells = <0>; compatible = "fsl,imx8qxp-ldb"; clocks = <&clk IMX_SC_R_LVDS_1 IMX_SC_PM_CLK_MISC2>, - <&clk IMX_SC_R_LVDS_1 IMX_SC_PM_CLK_BYPASS>; - clock-names = "pixel", "bypass"; - power-domains = <&pd IMX_SC_R_LVDS_1>; + <&clk IMX_SC_R_LVDS_1 IMX_SC_PM_CLK_BYPASS>, + <&clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_MISC2>, + <&clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_BYPASS>; + clock-names = "pixel", "bypass", + "aux_pixel", "aux_bypass"; + power-domains = <&pd IMX_SC_R_LVDS_1>, + <&pd IMX_SC_R_LVDS_0>; gpr = <&lvds_region2>; + fsl,auxldb = <&ldb1>; status = "disabled"; lvds-channel@0 { -- cgit v1.2.3