From 395e66ba07aaec5ce37b61da158816d96d4b3ce1 Mon Sep 17 00:00:00 2001
From: Marc Zyngier <marc.zyngier@arm.com>
Date: Sat, 1 Jul 2017 15:16:36 +0100
Subject: ARM64: dts: marvell: armada-37xx: Wire PMUv3

The Cortex-A53s that power the Armada-37xx SoCs are equipped with
a PMUv3, just like most ARMv8 cores.

Advertise the PMUv3 presence in the device tree, and wire its
interrupt. This allows the perf subsystem to work correctly.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
 arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

(limited to 'arch/arm64/boot')

diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
index b6f1e7a5e5ec..8c0cf7efac65 100644
--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -81,6 +81,11 @@
 			     <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
+	pmu {
+		compatible = "arm,armv8-pmuv3";
+		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
 	soc {
 		compatible = "simple-bus";
 		#address-cells = <2>;
-- 
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