From cdf2974dd8b7625c53105e00ffbaf3e4f4ccd292 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Thu, 24 Mar 2022 12:10:28 +0100 Subject: arm64: dts: imx8mm-verdin: note about disabled sd1 pull-ups MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a note about us using discrete external on-module resistors pulling-up to the on-module +V3.3_1.8_SD (LDO5) rail and explicitly disabling the internal pull-ups due to ERR050080 [1]: IO: Degradation of internal IO pullup/pulldown current capability for IO’s continuously driven in a 3.3V operating mode [1] https://www.nxp.com/webapp/Download?colCode=IMX8MM_0N87W Signed-off-by: Marcel Ziswiler --- arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi index 211ce80e9a60..52ee9e4434dd 100755 --- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi @@ -1269,6 +1269,10 @@ >; }; + /* + * Note: Due to ERR050080 we use discrete external on-module resistors pulling-up to the + * on-module +V3.3_1.8_SD (LDO5) rail and explicitly disable the internal pull-ups here. + */ pinctrl_usdhc2: usdhc2grp { fsl,pins = < MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x90 /* SODIMM 78 */ -- cgit v1.2.3