From 468b8c4cf3962d4d24eca58da18bb63368ff4fcd Mon Sep 17 00:00:00 2001 From: Daniel Lezcano Date: Sun, 25 Jan 2015 22:06:02 +0100 Subject: clockevents: rockchip: Add rockchip timer for rk3288 The rk3288 board uses the architected timers and these ones are shutdown when the cpu is powered down. There is a need of a broadcast timer in this case to ensure proper wakeup when the cpus are in sleep mode and a timer expires. This driver provides the basic timer functionnality as a backup for the local timers at sleep time. The timer belongs to the alive subsystem. It includes two programmables 64 bits timer channels but the driver only uses 32bits. It works with two operations mode: free running and user defined count. Programing sequence: 1. Timer initialization: * Disable the timer by writing '0' to the CONTROLREG register * Program the timer mode by writing the mode to the CONTROLREG register * Set the interrupt mask 2. Setting the count value: * Load the count value to the registers COUNT0 and COUNT1 (not used). 3. Enable the timer * Write '1' to the CONTROLREG register with the mode (free running or user) Signed-off-by: Daniel Lezcano Reviewed-by: Heiko Stuebner --- arch/arm/mach-rockchip/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index ac5803cac98d..5078932c1683 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -11,6 +11,7 @@ config ARCH_ROCKCHIP select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP select DW_APB_TIMER_OF + select ROCKCHIP_TIMER select ARM_GLOBAL_TIMER select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK help -- cgit v1.2.3 From 35a8578e8b83eb13f8d57ab40b98bcfd5199d3d4 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 28 Jan 2015 11:56:32 -0600 Subject: dts: versatile: Add sysregs node The Versatile boards have the same sysregs as other ARM Ltd boards. Add the nodes in order to enable support for 24MHz counter as sched_clock. This is a minimal node definition as the existing sub node definition used on VExpress has some issues raised by Linus W. Signed-off-by: Rob Herring Cc: Russell King Cc: Linus Walleij Cc: devicetree@vger.kernel.org Signed-off-by: Daniel Lezcano --- arch/arm/boot/dts/versatile-ab.dts | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/versatile-ab.dts b/arch/arm/boot/dts/versatile-ab.dts index 27d0d9c8adf3..01f40197ea13 100644 --- a/arch/arm/boot/dts/versatile-ab.dts +++ b/arch/arm/boot/dts/versatile-ab.dts @@ -252,6 +252,11 @@ #size-cells = <1>; ranges = <0 0x10000000 0x10000>; + sysreg@0 { + compatible = "arm,versatile-sysreg", "syscon"; + reg = <0x00000 0x1000>; + }; + aaci@4000 { compatible = "arm,primecell"; reg = <0x4000 0x1000>; -- cgit v1.2.3