From c06b3a068223cb885d85ac4f6c31e870ca2b5aac Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 31 Jan 2011 15:07:53 +0100 Subject: microblaze: Do not use r0_ram space for hw exception debugging Remove hw exception counting space from r0_ram. Use special exception_debug_table poll for exception statistic. Signed-off-by: Michal Simek --- arch/microblaze/kernel/hw_exception_handler.S | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) (limited to 'arch/microblaze/kernel/hw_exception_handler.S') diff --git a/arch/microblaze/kernel/hw_exception_handler.S b/arch/microblaze/kernel/hw_exception_handler.S index 782680de3121..ec5e99dd5d75 100644 --- a/arch/microblaze/kernel/hw_exception_handler.S +++ b/arch/microblaze/kernel/hw_exception_handler.S @@ -77,6 +77,8 @@ #include #include +#undef DEBUG + /* Helpful Macros */ #define NUM_TO_REG(num) r ## num @@ -228,6 +230,16 @@ /* wrappers to restore state before coming to entry.S */ #ifdef CONFIG_MMU +#ifdef DEBUG +/* Create space for exception counting. */ +.section .data +.global exception_debug_table +.align 4 +exception_debug_table: + /* Look at exception vector table. There is 32 exceptions * word size */ + .space (32 * 4) +#endif /* DEBUG */ + .section .rodata .align 4 _MB_HW_ExceptionVectorTable: @@ -329,12 +341,12 @@ not_in_delay_slot: #ifdef DEBUG /* counting which exception happen */ - lwi r5, r0, 0x200 + TOPHYS(r0_ram) + lwi r5, r0, TOPHYS(exception_debug_table) addi r5, r5, 1 - swi r5, r0, 0x200 + TOPHYS(r0_ram) - lwi r5, r6, 0x200 + TOPHYS(r0_ram) + swi r5, r0, TOPHYS(exception_debug_table) + lwi r5, r6, TOPHYS(exception_debug_table) addi r5, r5, 1 - swi r5, r6, 0x200 + TOPHYS(r0_ram) + swi r5, r6, TOPHYS(exception_debug_table) #endif /* end */ /* Load the HW Exception vector */ -- cgit v1.2.3 From 6e83557c38b40d6e9d1c82ad0ae59d8e5db9c50c Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 31 Jan 2011 15:10:04 +0100 Subject: microblaze: Remove r0_ram pointer and PTO alignment r0_ram pool was used for saving/restoring register content if hw exception happen. This poll was replaced by pt_pool_space with PT_SIZE size. Based on this change SAVE_STATE_ARG_SPACE was removed which caused that PTO offset is zero that's why is also removed. r0_ram space was used as scratchpad by v850. In early Microblaze Linux developing phase was this part of code blindly copied. Signed-off-by: Michal Simek --- arch/microblaze/kernel/hw_exception_handler.S | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) (limited to 'arch/microblaze/kernel/hw_exception_handler.S') diff --git a/arch/microblaze/kernel/hw_exception_handler.S b/arch/microblaze/kernel/hw_exception_handler.S index ec5e99dd5d75..2401fa4b7ce1 100644 --- a/arch/microblaze/kernel/hw_exception_handler.S +++ b/arch/microblaze/kernel/hw_exception_handler.S @@ -93,7 +93,7 @@ lwi r6, r1, PT_R6; \ lwi r11, r1, PT_R11; \ lwi r31, r1, PT_R31; \ - lwi r1, r0, TOPHYS(r0_ram + 0); + lwi r1, r1, PT_R1; #endif /* CONFIG_MMU */ #define LWREG_NOP \ @@ -208,8 +208,8 @@ * | . | * | . | * - * NO_MMU kernel use the same r0_ram pointed space - look to vmlinux.lds.S - * which is used for storing register values - old style was, that value were + * MMU kernel uses the same 'pt_pool_space' pointed space + * which is used for storing register values - noMMu style was, that values were * stored in stack but in case of failure you lost information about register. * Currently you can see register value in memory in specific place. * In compare to with previous solution the speed should be the same. @@ -228,8 +228,12 @@ */ /* wrappers to restore state before coming to entry.S */ - #ifdef CONFIG_MMU +.section .data +.align 4 +pt_pool_space: + .space PT_SIZE + #ifdef DEBUG /* Create space for exception counting. */ .section .data @@ -299,10 +303,10 @@ _hw_exception_handler: #ifndef CONFIG_MMU addik r1, r1, -(EX_HANDLER_STACK_SIZ); /* Create stack frame */ #else - swi r1, r0, TOPHYS(r0_ram + 0); /* GET_SP */ + swi r1, r0, TOPHYS(pt_pool_space + PT_R1); /* GET_SP */ /* Save date to kernel memory. Here is the problem * when you came from user space */ - ori r1, r0, TOPHYS(r0_ram + 28); + ori r1, r0, TOPHYS(pt_pool_space); #endif swi r3, r1, PT_R3 swi r4, r1, PT_R4 -- cgit v1.2.3 From cd3415779bdb13e3daaf13965c89d286a0cf0480 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 1 Feb 2011 09:00:57 +0100 Subject: microblaze: Do not use "la" pseudo instruction - use addik instead "la" pseudo instruction is only translation to "addik". Use directly "addik" which is described in the MB reference guide. Signed-off-by: Michal Simek --- arch/microblaze/kernel/hw_exception_handler.S | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'arch/microblaze/kernel/hw_exception_handler.S') diff --git a/arch/microblaze/kernel/hw_exception_handler.S b/arch/microblaze/kernel/hw_exception_handler.S index 2401fa4b7ce1..56572e923a83 100644 --- a/arch/microblaze/kernel/hw_exception_handler.S +++ b/arch/microblaze/kernel/hw_exception_handler.S @@ -490,7 +490,7 @@ ex_lw_tail: /* Get the destination register number into r5 */ lbui r5, r0, TOPHYS(ex_reg_op); /* Form load_word jump table offset (lw_table + (8 * regnum)) */ - la r6, r0, TOPHYS(lw_table); + addik r6, r0, TOPHYS(lw_table); addk r5, r5, r5; addk r5, r5, r5; addk r5, r5, r5; @@ -501,7 +501,7 @@ ex_sw: /* Get the destination register number into r5 */ lbui r5, r0, TOPHYS(ex_reg_op); /* Form store_word jump table offset (sw_table + (8 * regnum)) */ - la r6, r0, TOPHYS(sw_table); + addik r6, r0, TOPHYS(sw_table); add r5, r5, r5; add r5, r5, r5; add r5, r5, r5; @@ -912,7 +912,7 @@ ex_lw_vm: beqid r6, ex_lhw_vm; load1: lbui r5, r4, 0; /* Exception address in r4 - delay slot */ /* Load a word, byte-by-byte from destination address and save it in tmp space*/ - la r6, r0, ex_tmp_data_loc_0; + addik r6, r0, ex_tmp_data_loc_0; sbi r5, r6, 0; load2: lbui r5, r4, 1; sbi r5, r6, 1; @@ -926,7 +926,7 @@ load4: lbui r5, r4, 3; ex_lhw_vm: /* Load a half-word, byte-by-byte from destination address and * save it in tmp space */ - la r6, r0, ex_tmp_data_loc_0; + addik r6, r0, ex_tmp_data_loc_0; sbi r5, r6, 0; load5: lbui r5, r4, 1; sbi r5, r6, 1; @@ -942,7 +942,7 @@ ex_sw_vm: addik r5, r8, sw_table_vm; bra r5; ex_sw_tail_vm: - la r5, r0, ex_tmp_data_loc_0; + addik r5, r0, ex_tmp_data_loc_0; beqid r6, ex_shw_vm; swi r3, r5, 0; /* Get the word - delay slot */ /* Store the word, byte-by-byte into destination address */ @@ -985,7 +985,7 @@ ex_unaligned_fixup: addik r7, r0, SIGSEGV /* call bad_page_fault for finding aligned fixup, fixup address is saved * in PT_PC which is used as return address from exception */ - la r15, r0, ret_from_exc-8 /* setup return address */ + addik r15, r0, ret_from_exc-8 /* setup return address */ brid bad_page_fault nop -- cgit v1.2.3