From 7afd2a5aec2ea27ba87b3a423c5d782fe0f2b96b Mon Sep 17 00:00:00 2001 From: Paul Burton Date: Fri, 26 Aug 2016 15:17:38 +0100 Subject: MIPS: SEAD3: Probe EHCI controller using DT Probe the SEAD3 EHCI controller using the generic-ehci driver & device tree rather than platform code, in order to reduce the amount of the latter. Now that no devices probed from platform code require interrupts, remove the retrieval of the IRQ domain & sead3int.h. Signed-off-by: Paul Burton Cc: Rob Herring Cc: Mark Rutland Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/14051/ Signed-off-by: Ralf Baechle --- arch/mips/include/asm/mips-boards/sead3int.h | 21 --------------------- 1 file changed, 21 deletions(-) delete mode 100644 arch/mips/include/asm/mips-boards/sead3int.h (limited to 'arch/mips/include/asm/mips-boards') diff --git a/arch/mips/include/asm/mips-boards/sead3int.h b/arch/mips/include/asm/mips-boards/sead3int.h deleted file mode 100644 index 7fdb9d4598bf..000000000000 --- a/arch/mips/include/asm/mips-boards/sead3int.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2000,2012 MIPS Technologies, Inc. All rights reserved. - * Douglas Leung - * Steven J. Hill - */ -#ifndef _MIPS_SEAD3INT_H -#define _MIPS_SEAD3INT_H - -#include - -/* CPU interrupt offsets */ -#define CPU_INT_EHCI 2 - -/* GIC interrupt offsets */ -#define GIC_INT_EHCI GIC_SHARED_TO_HWIRQ(5) - -#endif /* !(_MIPS_SEAD3INT_H) */ -- cgit v1.2.3