From 65040e224e5b214a93fa0c790add5d69b054ecae Mon Sep 17 00:00:00 2001 From: Jayachandran C Date: Wed, 16 Nov 2011 00:21:28 +0000 Subject: MIPS: Netlogic: Add XLP platform files for XLP SoC - Update common files to support XLP. - Add arch/mips/include/asm/netlogic/xlp-hal for register definitions and access macros - Add arch/mips/netlogic/xlp/ for XLP specific files. Signed-off-by: Jayachandran C Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2967/ Signed-off-by: Ralf Baechle --- arch/mips/netlogic/xlp/nlm_hal.c | 105 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 105 insertions(+) create mode 100644 arch/mips/netlogic/xlp/nlm_hal.c (limited to 'arch/mips/netlogic/xlp/nlm_hal.c') diff --git a/arch/mips/netlogic/xlp/nlm_hal.c b/arch/mips/netlogic/xlp/nlm_hal.c new file mode 100644 index 000000000000..885f6878594a --- /dev/null +++ b/arch/mips/netlogic/xlp/nlm_hal.c @@ -0,0 +1,105 @@ +/* + * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights + * reserved. + * + * This software is available to you under a choice of one of two + * licenses. You may choose to be licensed under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree, or the NetLogic + * license below: + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * + * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN + * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include +#include + +#include +#include + +#include +#include +#include +#include +#include + +/* These addresses are computed by the nlm_hal_init() */ +uint64_t nlm_io_base; +uint64_t nlm_sys_base; +uint64_t nlm_pic_base; + +/* Main initialization */ +void nlm_hal_init(void) +{ + nlm_io_base = CKSEG1ADDR(XLP_DEFAULT_IO_BASE); + nlm_sys_base = nlm_get_sys_regbase(0); /* node 0 */ + nlm_pic_base = nlm_get_pic_regbase(0); /* node 0 */ +} + +int nlm_irq_to_irt(int irq) +{ + if (!PIC_IRQ_IS_IRT(irq)) + return -1; + + switch (irq) { + case PIC_UART_0_IRQ: + return PIC_IRT_UART_0_INDEX; + case PIC_UART_1_IRQ: + return PIC_IRT_UART_1_INDEX; + default: + return -1; + } +} + +int nlm_irt_to_irq(int irt) +{ + switch (irt) { + case PIC_IRT_UART_0_INDEX: + return PIC_UART_0_IRQ; + case PIC_IRT_UART_1_INDEX: + return PIC_UART_1_IRQ; + default: + return -1; + } +} + +unsigned int nlm_get_cpu_frequency(void) +{ + unsigned int pll_divf, pll_divr, dfs_div, denom; + unsigned int val; + uint64_t num; + + val = nlm_read_sys_reg(nlm_sys_base, SYS_POWER_ON_RESET_CFG); + pll_divf = (val >> 10) & 0x7f; + pll_divr = (val >> 8) & 0x3; + dfs_div = (val >> 17) & 0x3; + + num = pll_divf + 1; + denom = 3 * (pll_divr + 1) * (1 << (dfs_div + 1)); + num = num * 800000000ULL; + do_div(num, denom); + return (unsigned int)num; +} -- cgit v1.2.3 From 2aa54b2009bb4f85cdc42d16dde18093dd832a31 Mon Sep 17 00:00:00 2001 From: Jayachandran C Date: Wed, 16 Nov 2011 00:21:29 +0000 Subject: MIPS: Netlogic: Add support for XLP 3XX cores Add new processor ID to asm/cpu.h and kernel/cpu-probe.c. Update to new CPU frequency detection code which works on XLP 3XX and 8XX. Signed-off-by: Jayachandran C Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2971/ Signed-off-by: Ralf Baechle --- arch/mips/netlogic/xlp/nlm_hal.c | 26 ++++++++++++++++---------- 1 file changed, 16 insertions(+), 10 deletions(-) (limited to 'arch/mips/netlogic/xlp/nlm_hal.c') diff --git a/arch/mips/netlogic/xlp/nlm_hal.c b/arch/mips/netlogic/xlp/nlm_hal.c index 885f6878594a..9428e7125fed 100644 --- a/arch/mips/netlogic/xlp/nlm_hal.c +++ b/arch/mips/netlogic/xlp/nlm_hal.c @@ -86,20 +86,26 @@ int nlm_irt_to_irq(int irt) } } -unsigned int nlm_get_cpu_frequency(void) +unsigned int nlm_get_core_frequency(int core) { - unsigned int pll_divf, pll_divr, dfs_div, denom; - unsigned int val; + unsigned int pll_divf, pll_divr, dfs_div, ext_div; + unsigned int rstval, dfsval, denom; uint64_t num; - val = nlm_read_sys_reg(nlm_sys_base, SYS_POWER_ON_RESET_CFG); - pll_divf = (val >> 10) & 0x7f; - pll_divr = (val >> 8) & 0x3; - dfs_div = (val >> 17) & 0x3; + rstval = nlm_read_sys_reg(nlm_sys_base, SYS_POWER_ON_RESET_CFG); + dfsval = nlm_read_sys_reg(nlm_sys_base, SYS_CORE_DFS_DIV_VALUE); + pll_divf = ((rstval >> 10) & 0x7f) + 1; + pll_divr = ((rstval >> 8) & 0x3) + 1; + ext_div = ((rstval >> 30) & 0x3) + 1; + dfs_div = ((dfsval >> (core * 4)) & 0xf) + 1; - num = pll_divf + 1; - denom = 3 * (pll_divr + 1) * (1 << (dfs_div + 1)); - num = num * 800000000ULL; + num = 800000000ULL * pll_divf; + denom = 3 * pll_divr * ext_div * dfs_div; do_div(num, denom); return (unsigned int)num; } + +unsigned int nlm_get_cpu_frequency(void) +{ + return nlm_get_core_frequency(0); +} -- cgit v1.2.3