From a1e262f6f126466f51d6955fb5bd6aaf0aacf68f Mon Sep 17 00:00:00 2001
From: Rich Felker <dalias@libc.org>
Date: Mon, 15 Feb 2016 18:36:33 +0000
Subject: sh: do not perform IPI-based cache flush except on boards that need
it
Signed-off-by: Rich Felker <dalias@libc.org>
---
arch/sh/mm/cache.c | 3 +++
1 file changed, 3 insertions(+)
(limited to 'arch/sh')
diff --git a/arch/sh/mm/cache.c b/arch/sh/mm/cache.c
index 70cc52f2fab8..36554a9ea99b 100644
--- a/arch/sh/mm/cache.c
+++ b/arch/sh/mm/cache.c
@@ -42,6 +42,8 @@ static inline void cacheop_on_each_cpu(void (*func) (void *info), void *info,
{
preempt_disable();
+ /* Needing IPI for cross-core flush is SHX3-specific. */
+#ifdef CONFIG_CPU_SHX3
/*
* It's possible that this gets called early on when IRQs are
* still disabled due to ioremapping by the boot CPU, so don't
@@ -49,6 +51,7 @@ static inline void cacheop_on_each_cpu(void (*func) (void *info), void *info,
*/
if (num_online_cpus() > 1)
smp_call_function(func, info, wait);
+#endif
func(info);
--
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