From 3bd39664481fc51d82e58a3bec6ba77febc7dfae Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Wed, 11 Jul 2007 08:32:21 +0100 Subject: [MIPS] Fix resume for 64K page size on R4000 class processors. Problem reported by Peter Watkins but this is a different fix. Signed-off-by: Ralf Baechle --- arch/mips/kernel/r4k_switch.S | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S index 06729596812f..d9bfae53c43f 100644 --- a/arch/mips/kernel/r4k_switch.S +++ b/arch/mips/kernel/r4k_switch.S @@ -85,12 +85,7 @@ move $28, a2 cpu_restore_nonscratch a1 -#if (_THREAD_SIZE - 32) < 0x10000 - PTR_ADDIU t0, $28, _THREAD_SIZE - 32 -#else - PTR_LI t0, _THREAD_SIZE - 32 - PTR_ADDU t0, $28 -#endif + PTR_ADDU t0, $28, _THREAD_SIZE - 32 set_saved_sp t0, t1, t2 #ifdef CONFIG_MIPS_MT_SMTC /* Read-modify-writes of Status must be atomic on a VPE */ -- cgit v1.2.3 From 0adc327bda829f6f7302ca2abdbe776828db7a97 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 12 Jul 2007 14:01:06 +0100 Subject: [MIPS] Hydrogen3: Remove remaining bits of code. Signed-off-by: Ralf Baechle --- arch/mips/au1000/common/setup.c | 3 --- 1 file changed, 3 deletions(-) (limited to 'arch') diff --git a/arch/mips/au1000/common/setup.c b/arch/mips/au1000/common/setup.c index 13fe187f35d6..fdf2b85a69c8 100644 --- a/arch/mips/au1000/common/setup.c +++ b/arch/mips/au1000/common/setup.c @@ -100,9 +100,6 @@ void __init plat_mem_setup(void) argptr = prom_getcmdline(); /* default panel */ /*strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");*/ -#ifdef CONFIG_MIPS_HYDROGEN3 - strcat(argptr, " video=au1100fb:panel:Hydrogen_3_NEC_panel_320x240,nohwcursor"); -#endif } #endif -- cgit v1.2.3 From 9815778ae016004c33ce267a00b7d567192ef6e7 Mon Sep 17 00:00:00 2001 From: Thomas Bogendoerfer Date: Wed, 11 Jul 2007 19:10:39 +0200 Subject: [MIPS] RM: Use only phyiscal address for 82596 and 53c710 Use physical address for 82596 and 53c710 base address Signed-off-by: Thomas Bogendoerfer Signed-off-by: Ralf Baechle --- arch/mips/sni/a20r.c | 8 ++++---- arch/mips/sni/rm200.c | 4 ++-- 2 files changed, 6 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/mips/sni/a20r.c b/arch/mips/sni/a20r.c index 6850a29defcd..acc9ba76c1a9 100644 --- a/arch/mips/sni/a20r.c +++ b/arch/mips/sni/a20r.c @@ -87,8 +87,8 @@ static struct platform_device snirm_82596_pdev = { static struct resource snirm_53c710_rsrc[] = { { - .start = 0xb9000000, - .end = 0xb90fffff, + .start = 0x19000000, + .end = 0x190fffff, .flags = IORESOURCE_MEM }, { @@ -106,8 +106,8 @@ static struct platform_device snirm_53c710_pdev = { static struct resource sc26xx_rsrc[] = { { - .start = 0xbc070000, - .end = 0xbc0700ff, + .start = 0x1c070000, + .end = 0x1c0700ff, .flags = IORESOURCE_MEM }, { diff --git a/arch/mips/sni/rm200.c b/arch/mips/sni/rm200.c index 4bfda020fdc7..28a11d8605ce 100644 --- a/arch/mips/sni/rm200.c +++ b/arch/mips/sni/rm200.c @@ -88,8 +88,8 @@ static struct platform_device snirm_82596_rm200_pdev = { static struct resource snirm_53c710_rm200_rsrc[] = { { - .start = 0xb9000000, - .end = 0xb90fffff, + .start = 0x19000000, + .end = 0x190fffff, .flags = IORESOURCE_MEM }, { -- cgit v1.2.3 From 40df3831f9b2fa386f55b580f294ea4f686704be Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Thu, 12 Jul 2007 00:51:00 +0900 Subject: [MIPS] Cleanup tlbdebug.h Also include tlbdebug.h in dump_tlb.c and r3k_dump_tlb.c. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/lib/dump_tlb.c | 1 + arch/mips/lib/r3k_dump_tlb.c | 1 + 2 files changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/mips/lib/dump_tlb.c b/arch/mips/lib/dump_tlb.c index 1a4db7dc77cb..465ff0ec85b9 100644 --- a/arch/mips/lib/dump_tlb.c +++ b/arch/mips/lib/dump_tlb.c @@ -10,6 +10,7 @@ #include #include #include +#include static inline const char *msk2str(unsigned int mask) { diff --git a/arch/mips/lib/r3k_dump_tlb.c b/arch/mips/lib/r3k_dump_tlb.c index 52f87795ecc3..9cee907975ae 100644 --- a/arch/mips/lib/r3k_dump_tlb.c +++ b/arch/mips/lib/r3k_dump_tlb.c @@ -11,6 +11,7 @@ #include #include #include +#include extern int r3k_have_wired_reg; /* defined in tlb-r3k.c */ -- cgit v1.2.3 From 8c41286edffef0d6e7fb770b178275c8beb24055 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Thu, 12 Jul 2007 00:55:40 +0900 Subject: [MIPS] Include cacheflush.h in uncache.c This fixes this sparse warning: arch/mips/lib/uncached.c:38:22: warning: symbol 'run_uncached' was not declared. Should it be static? Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/lib/uncached.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/mips/lib/uncached.c b/arch/mips/lib/uncached.c index 2388f7f3ffde..58d14f4d9349 100644 --- a/arch/mips/lib/uncached.c +++ b/arch/mips/lib/uncached.c @@ -12,6 +12,7 @@ #include #include +#include #ifndef CKSEG2 #define CKSEG2 CKSSEG -- cgit v1.2.3 From 891649409edbed528728b4a104d29e43e9d7473a Mon Sep 17 00:00:00 2001 From: Yoichi Yuasa Date: Wed, 9 May 2007 00:03:02 +0900 Subject: [MIPS] separate platform_device registration for VR41xx serial interface Signed-off-by: Yoichi Yuasa Signed-off-by: Ralf Baechle --- arch/mips/vr41xx/common/Makefile | 2 +- arch/mips/vr41xx/common/siu.c | 120 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 121 insertions(+), 1 deletion(-) create mode 100644 arch/mips/vr41xx/common/siu.c (limited to 'arch') diff --git a/arch/mips/vr41xx/common/Makefile b/arch/mips/vr41xx/common/Makefile index f842783acd86..fcf94d7b1478 100644 --- a/arch/mips/vr41xx/common/Makefile +++ b/arch/mips/vr41xx/common/Makefile @@ -2,4 +2,4 @@ # Makefile for common code of the NEC VR4100 series. # -obj-y += bcu.o cmu.o icu.o init.o irq.o pmu.o type.o +obj-y += bcu.o cmu.o icu.o init.o irq.o pmu.o siu.o type.o diff --git a/arch/mips/vr41xx/common/siu.c b/arch/mips/vr41xx/common/siu.c new file mode 100644 index 000000000000..a1e774142163 --- /dev/null +++ b/arch/mips/vr41xx/common/siu.c @@ -0,0 +1,120 @@ +/* + * NEC VR4100 series SIU platform device. + * + * Copyright (C) 2007 Yoichi Yuasa + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + */ +#include +#include +#include +#include +#include + +#include +#include + +static unsigned int siu_type1_ports[SIU_PORTS_MAX] __initdata = { + PORT_VR41XX_SIU, + PORT_UNKNOWN, +}; + +static struct resource siu_type1_resource[] __initdata = { + { + .start = 0x0c000000, + .end = 0x0c00000a, + .flags = IORESOURCE_MEM, + }, + { + .start = SIU_IRQ, + .end = SIU_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +static unsigned int siu_type2_ports[SIU_PORTS_MAX] __initdata = { + PORT_VR41XX_SIU, + PORT_VR41XX_DSIU, +}; + +static struct resource siu_type2_resource[] __initdata = { + { + .start = 0x0f000800, + .end = 0x0f00080a, + .flags = IORESOURCE_MEM, + }, + { + .start = 0x0f000820, + .end = 0x0f000829, + .flags = IORESOURCE_MEM, + }, + { + .start = SIU_IRQ, + .end = SIU_IRQ, + .flags = IORESOURCE_IRQ, + }, + { + .start = DSIU_IRQ, + .end = DSIU_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +static int __init vr41xx_siu_add(void) +{ + struct platform_device *pdev; + struct resource *res; + unsigned int num; + int retval; + + pdev = platform_device_alloc("SIU", -1); + if (!pdev) + return -ENOMEM; + + switch (current_cpu_data.cputype) { + case CPU_VR4111: + case CPU_VR4121: + pdev->dev.platform_data = siu_type1_ports; + res = siu_type1_resource; + num = ARRAY_SIZE(siu_type1_resource); + break; + case CPU_VR4122: + case CPU_VR4131: + case CPU_VR4133: + pdev->dev.platform_data = siu_type2_ports; + res = siu_type2_resource; + num = ARRAY_SIZE(siu_type2_resource); + break; + default: + retval = -ENODEV; + goto err_free_device; + } + + retval = platform_device_add_resources(pdev, res, num); + if (retval) + goto err_free_device; + + retval = platform_device_add(pdev); + if (retval) + goto err_free_device; + + return 0; + +err_free_device: + platform_device_put(pdev); + + return retval; +} +device_initcall(vr41xx_siu_add); -- cgit v1.2.3 From a74b4605181595c633ff4cfd44949886b0918172 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 12 Jul 2007 17:41:14 +0100 Subject: [MIPS] MIPSsim: Fix build. Signed-off-by: Ralf Baechle --- arch/mips/mipssim/sim_int.c | 2 +- arch/mips/mipssim/sim_setup.c | 2 +- arch/mips/mipssim/sim_time.c | 1 - 3 files changed, 2 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/mips/mipssim/sim_int.c b/arch/mips/mipssim/sim_int.c index d86b37235cf6..5cbc3509ab52 100644 --- a/arch/mips/mipssim/sim_int.c +++ b/arch/mips/mipssim/sim_int.c @@ -77,7 +77,7 @@ asmlinkage void plat_irq_dispatch(void) irq = irq_ffs(pending); if (irq > 0) - do_IRQ(MIPSCPU_INT_BASE + irq); + do_IRQ(MIPS_CPU_IRQ_BASE + irq); else spurious_interrupt(); } diff --git a/arch/mips/mipssim/sim_setup.c b/arch/mips/mipssim/sim_setup.c index 3643582bdade..60e66906be65 100644 --- a/arch/mips/mipssim/sim_setup.c +++ b/arch/mips/mipssim/sim_setup.c @@ -84,7 +84,7 @@ static void __init serial_init(void) /* hardware int 4 - the serial int, is CPU int 6 but poll for now */ s.irq = 0; - s.uartclk = BASE_BAUD * 16; + s.uartclk = 1843200; s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST; s.iotype = UPIO_PORT; s.regshift = 0; diff --git a/arch/mips/mipssim/sim_time.c b/arch/mips/mipssim/sim_time.c index 874a18e8ac24..a0f5a5dca1b2 100644 --- a/arch/mips/mipssim/sim_time.c +++ b/arch/mips/mipssim/sim_time.c @@ -5,7 +5,6 @@ #include #include #include -#include #include #include -- cgit v1.2.3 From 44173fb2e83183b585e137e6fee8ba32460f5645 Mon Sep 17 00:00:00 2001 From: Yoichi Yuasa Date: Thu, 10 May 2007 22:21:35 +0900 Subject: [MIPS] Separate platform_device registration for VR41xx GPIO Signed-off-by: Yoichi Yuasa Signed-off-by: Ralf Baechle --- arch/mips/vr41xx/common/Makefile | 2 +- arch/mips/vr41xx/common/giu.c | 122 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 123 insertions(+), 1 deletion(-) create mode 100644 arch/mips/vr41xx/common/giu.c (limited to 'arch') diff --git a/arch/mips/vr41xx/common/Makefile b/arch/mips/vr41xx/common/Makefile index fcf94d7b1478..22b074e72121 100644 --- a/arch/mips/vr41xx/common/Makefile +++ b/arch/mips/vr41xx/common/Makefile @@ -2,4 +2,4 @@ # Makefile for common code of the NEC VR4100 series. # -obj-y += bcu.o cmu.o icu.o init.o irq.o pmu.o siu.o type.o +obj-y += bcu.o cmu.o giu.o icu.o init.o irq.o pmu.o siu.o type.o diff --git a/arch/mips/vr41xx/common/giu.c b/arch/mips/vr41xx/common/giu.c new file mode 100644 index 000000000000..d21f6f2d22a3 --- /dev/null +++ b/arch/mips/vr41xx/common/giu.c @@ -0,0 +1,122 @@ +/* + * NEC VR4100 series GIU platform device. + * + * Copyright (C) 2007 Yoichi Yuasa + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + */ +#include +#include +#include +#include + +#include +#include +#include + +static struct resource giu_50pins_pullupdown_resource[] __initdata = { + { + .start = 0x0b000100, + .end = 0x0b00011f, + .flags = IORESOURCE_MEM, + }, + { + .start = 0x0b0002e0, + .end = 0x0b0002e3, + .flags = IORESOURCE_MEM, + }, + { + .start = GIUINT_IRQ, + .end = GIUINT_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct resource giu_36pins_resource[] __initdata = { + { + .start = 0x0f000140, + .end = 0x0f00015f, + .flags = IORESOURCE_MEM, + }, + { + .start = GIUINT_IRQ, + .end = GIUINT_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct resource giu_48pins_resource[] __initdata = { + { + .start = 0x0f000140, + .end = 0x0f000167, + .flags = IORESOURCE_MEM, + }, + { + .start = GIUINT_IRQ, + .end = GIUINT_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +static int __init vr41xx_giu_add(void) +{ + struct platform_device *pdev; + struct resource *res; + unsigned int num; + int retval; + + pdev = platform_device_alloc("GIU", -1); + if (!pdev) + return -ENOMEM; + + switch (current_cpu_data.cputype) { + case CPU_VR4111: + case CPU_VR4121: + pdev->id = GPIO_50PINS_PULLUPDOWN; + res = giu_50pins_pullupdown_resource; + num = ARRAY_SIZE(giu_50pins_pullupdown_resource); + break; + case CPU_VR4122: + case CPU_VR4131: + pdev->id = GPIO_36PINS; + res = giu_36pins_resource; + num = ARRAY_SIZE(giu_36pins_resource); + break; + case CPU_VR4133: + pdev->id = GPIO_48PINS_EDGE_SELECT; + res = giu_48pins_resource; + num = ARRAY_SIZE(giu_48pins_resource); + break; + default: + retval = -ENODEV; + goto err_free_device; + } + + retval = platform_device_add_resources(pdev, res, num); + if (retval) + goto err_free_device; + + retval = platform_device_add(pdev); + if (retval) + goto err_free_device; + + return 0; + +err_free_device: + platform_device_put(pdev); + + return retval; +} +device_initcall(vr41xx_giu_add); -- cgit v1.2.3 From bd0765098bf22eb8b1319f649a4c3301b40ec04c Mon Sep 17 00:00:00 2001 From: Yoichi Yuasa Date: Fri, 11 May 2007 21:18:48 +0900 Subject: [MIPS] separate platform_device registration for VR41xx RTC Signed-off-by: Yoichi Yuasa Signed-off-by: Ralf Baechle --- arch/mips/vr41xx/common/Makefile | 2 +- arch/mips/vr41xx/common/rtc.c | 117 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 118 insertions(+), 1 deletion(-) create mode 100644 arch/mips/vr41xx/common/rtc.c (limited to 'arch') diff --git a/arch/mips/vr41xx/common/Makefile b/arch/mips/vr41xx/common/Makefile index 22b074e72121..d0d84ec8d63d 100644 --- a/arch/mips/vr41xx/common/Makefile +++ b/arch/mips/vr41xx/common/Makefile @@ -2,4 +2,4 @@ # Makefile for common code of the NEC VR4100 series. # -obj-y += bcu.o cmu.o giu.o icu.o init.o irq.o pmu.o siu.o type.o +obj-y += bcu.o cmu.o giu.o icu.o init.o irq.o pmu.o rtc.o siu.o type.o diff --git a/arch/mips/vr41xx/common/rtc.c b/arch/mips/vr41xx/common/rtc.c new file mode 100644 index 000000000000..cce605b3d688 --- /dev/null +++ b/arch/mips/vr41xx/common/rtc.c @@ -0,0 +1,117 @@ +/* + * NEC VR4100 series RTC platform device. + * + * Copyright (C) 2007 Yoichi Yuasa + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + */ +#include +#include +#include +#include + +#include +#include + +static struct resource rtc_type1_resource[] __initdata = { + { + .start = 0x0b0000c0, + .end = 0x0b0000df, + .flags = IORESOURCE_MEM, + }, + { + .start = 0x0b0001c0, + .end = 0x0b0001df, + .flags = IORESOURCE_MEM, + }, + { + .start = ELAPSEDTIME_IRQ, + .end = ELAPSEDTIME_IRQ, + .flags = IORESOURCE_IRQ, + }, + { + .start = RTCLONG1_IRQ, + .end = RTCLONG1_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct resource rtc_type2_resource[] __initdata = { + { + .start = 0x0f000100, + .end = 0x0f00011f, + .flags = IORESOURCE_MEM, + }, + { + .start = 0x0f000120, + .end = 0x0f00013f, + .flags = IORESOURCE_MEM, + }, + { + .start = ELAPSEDTIME_IRQ, + .end = ELAPSEDTIME_IRQ, + .flags = IORESOURCE_IRQ, + }, + { + .start = RTCLONG1_IRQ, + .end = RTCLONG1_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +static int __init vr41xx_rtc_add(void) +{ + struct platform_device *pdev; + struct resource *res; + unsigned int num; + int retval; + + pdev = platform_device_alloc("RTC", -1); + if (!pdev) + return -ENOMEM; + + switch (current_cpu_data.cputype) { + case CPU_VR4111: + case CPU_VR4121: + res = rtc_type1_resource; + num = ARRAY_SIZE(rtc_type1_resource); + break; + case CPU_VR4122: + case CPU_VR4131: + case CPU_VR4133: + res = rtc_type2_resource; + num = ARRAY_SIZE(rtc_type2_resource); + break; + default: + retval = -ENODEV; + goto err_free_device; + } + + retval = platform_device_add_resources(pdev, res, num); + if (retval) + goto err_free_device; + + retval = platform_device_add(pdev); + if (retval) + goto err_free_device; + + return 0; + +err_free_device: + platform_device_put(pdev); + + return retval; +} +device_initcall(vr41xx_rtc_add); -- cgit v1.2.3 From 0db34215c7e0ef618e7b29fbf271194ca5434f8e Mon Sep 17 00:00:00 2001 From: "Kevin D. Kissell" Date: Thu, 12 Jul 2007 16:21:08 +0100 Subject: [MIPS] SMTC: Interrupt mask backstop hack To support multiple TC microthreads acting as "CPUs" within a VPE, VPE-wide interrupt mask bits must be specially manipulated during interrupt handling. To support legacy drivers and interrupt controller management code, SMTC has a "backstop" to track and if necessary restore the interrupt mask. This has some performance impact on interrupt service overhead. Disable it only if you know what you are doing. Signed-off-by: Ralf Baechle --- arch/mips/Kconfig | 13 +++++++++++++ arch/mips/kernel/entry.S | 2 ++ arch/mips/kernel/genex.S | 2 ++ 3 files changed, 17 insertions(+) (limited to 'arch') diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index a00fabe2e4e0..49f02e351244 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1404,6 +1404,19 @@ config MIPS_MT_SMTC_INSTANT_REPLAY it off), but ensures that IPIs are handled promptly even under heavy I/O interrupt load. +config MIPS_MT_SMTC_IM_BACKSTOP + bool "Use per-TC register bits as backstop for inhibited IM bits" + depends on MIPS_MT_SMTC + default y + help + To support multiple TC microthreads acting as "CPUs" within + a VPE, VPE-wide interrupt mask bits must be specially manipulated + during interrupt handling. To support legacy drivers and interrupt + controller management code, SMTC has a "backstop" to track and + if necessary restore the interrupt mask. This has some performance + impact on interrupt service overhead. Disable it only if you know + what you are doing. + config MIPS_VPE_LOADER_TOM bool "Load VPE program into memory hidden from linux" depends on MIPS_VPE_LOADER diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S index 686249c5c328..e29598ae939d 100644 --- a/arch/mips/kernel/entry.S +++ b/arch/mips/kernel/entry.S @@ -84,6 +84,7 @@ FEXPORT(restore_all) # restore full frame LONG_S sp, TI_REGS($28) jal deferred_smtc_ipi LONG_S s0, TI_REGS($28) +#ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP /* Re-arm any temporarily masked interrupts not explicitly "acked" */ mfc0 v0, CP0_TCSTATUS ori v1, v0, TCSTATUS_IXMT @@ -110,6 +111,7 @@ FEXPORT(restore_all) # restore full frame _ehb xor t0, t0, t3 mtc0 t0, CP0_TCCONTEXT +#endif /* CONFIG_MIPS_MT_SMTC_IM_BACKSTOP */ #endif /* CONFIG_MIPS_MT_SMTC */ .set noat RESTORE_TEMP diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S index 297bd56c2347..c0f19d638b98 100644 --- a/arch/mips/kernel/genex.S +++ b/arch/mips/kernel/genex.S @@ -243,9 +243,11 @@ NESTED(except_vec_vi_handler, 0, sp) */ mfc0 t1, CP0_STATUS and t0, a0, t1 +#ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP mfc0 t2, CP0_TCCONTEXT or t0, t0, t2 mtc0 t0, CP0_TCCONTEXT +#endif /* CONFIG_MIPS_MT_SMTC_IM_BACKSTOP */ xor t1, t1, t0 mtc0 t1, CP0_STATUS _ehb -- cgit v1.2.3 From 8ed07a1cce1530d2fd42e23c867a7c0c1170515a Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Fri, 13 Jul 2007 01:26:52 +0900 Subject: [MIPS] Fix a sparse warning in arch/mips/pci/pci.c Fixes this warning: arch/mips/pci/pci.c:284:18: warning: symbol 'dev' shadows an earlier one arch/mips/pci/pci.c:272:17: originally declared here Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/pci/pci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c index 8108231f2e20..99d8f4fd3ff4 100644 --- a/arch/mips/pci/pci.c +++ b/arch/mips/pci/pci.c @@ -269,7 +269,7 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus) } for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) { - struct pci_dev *dev = pci_dev_b(ln); + dev = pci_dev_b(ln); if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI) pcibios_fixup_device_resources(dev, bus); -- cgit v1.2.3 From 28fc582cc9b7fc6ed6a9fbf9565a2b1e56eee880 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Fri, 13 Jul 2007 01:49:49 +0900 Subject: [MIPS] Sparse: Use NULL for pointer This fixes a sparse warning: arch/mips/kernel/traps.c:376:44: warning: Using plain integer as NULL pointer Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/kernel/traps.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 80ea4fa95bd9..5e9fa83c4ef0 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -373,7 +373,7 @@ asmlinkage void do_be(struct pt_regs *regs) action = MIPS_BE_FIXUP; if (board_be_handler) - action = board_be_handler(regs, fixup != 0); + action = board_be_handler(regs, fixup != NULL); switch (action) { case MIPS_BE_DISCARD: -- cgit v1.2.3 From 1f2c6d6b0c553e44273aaee24820c67ebfbbfebe Mon Sep 17 00:00:00 2001 From: Yoichi Yuasa Date: Thu, 7 Jun 2007 22:27:50 +0900 Subject: [MIPS] Remove unused time.c for swarm Signed-off-by: Yoichi Yuasa Signed-off-by: Ralf Baechle --- arch/mips/sibyte/swarm/time.c | 244 ------------------------------------------ 1 file changed, 244 deletions(-) delete mode 100644 arch/mips/sibyte/swarm/time.c (limited to 'arch') diff --git a/arch/mips/sibyte/swarm/time.c b/arch/mips/sibyte/swarm/time.c deleted file mode 100644 index 97c73c793c35..000000000000 --- a/arch/mips/sibyte/swarm/time.c +++ /dev/null @@ -1,244 +0,0 @@ -/* - * Copyright (C) 2000, 2001 Broadcom Corporation - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - */ - -/* - * Time routines for the swarm board. We pass all the hard stuff - * through to the sb1250 handling code. Only thing we really keep - * track of here is what time of day we think it is. And we don't - * really even do a good job of that... - */ - - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -static unsigned long long sec_bias = 0; -static unsigned int usec_bias = 0; - -/* Xicor 1241 definitions */ - -/* - * Register bits - */ - -#define X1241REG_SR_BAT 0x80 /* currently on battery power */ -#define X1241REG_SR_RWEL 0x04 /* r/w latch is enabled, can write RTC */ -#define X1241REG_SR_WEL 0x02 /* r/w latch is unlocked, can enable r/w now */ -#define X1241REG_SR_RTCF 0x01 /* clock failed */ -#define X1241REG_BL_BP2 0x80 /* block protect 2 */ -#define X1241REG_BL_BP1 0x40 /* block protect 1 */ -#define X1241REG_BL_BP0 0x20 /* block protect 0 */ -#define X1241REG_BL_WD1 0x10 -#define X1241REG_BL_WD0 0x08 -#define X1241REG_HR_MIL 0x80 /* military time format */ - -/* - * Register numbers - */ - -#define X1241REG_BL 0x10 /* block protect bits */ -#define X1241REG_INT 0x11 /* */ -#define X1241REG_SC 0x30 /* Seconds */ -#define X1241REG_MN 0x31 /* Minutes */ -#define X1241REG_HR 0x32 /* Hours */ -#define X1241REG_DT 0x33 /* Day of month */ -#define X1241REG_MO 0x34 /* Month */ -#define X1241REG_YR 0x35 /* Year */ -#define X1241REG_DW 0x36 /* Day of Week */ -#define X1241REG_Y2K 0x37 /* Year 2K */ -#define X1241REG_SR 0x3F /* Status register */ - -#define X1241_CCR_ADDRESS 0x6F - -#define SMB_CSR(reg) (IOADDR(A_SMB_REGISTER(1, reg))) - -static int xicor_read(uint8_t addr) -{ - while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) - ; - - __raw_writeq((addr >> 8) & 0x7, SMB_CSR(R_SMB_CMD)); - __raw_writeq(addr & 0xff, SMB_CSR(R_SMB_DATA)); - __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR2BYTE, - SMB_CSR(R_SMB_START)); - - while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) - ; - - __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_RD1BYTE, - SMB_CSR(R_SMB_START)); - - while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) - ; - - if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) { - /* Clear error bit by writing a 1 */ - __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS)); - return -1; - } - - return (__raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff); -} - -static int xicor_write(uint8_t addr, int b) -{ - while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) - ; - - __raw_writeq(addr, SMB_CSR(R_SMB_CMD)); - __raw_writeq((addr & 0xff) | ((b & 0xff) << 8), SMB_CSR(R_SMB_DATA)); - __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR3BYTE, - SMB_CSR(R_SMB_START)); - - while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) - ; - - if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) { - /* Clear error bit by writing a 1 */ - __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS)); - return -1; - } else { - return 0; - } -} - -/* - * In order to set the CMOS clock precisely, set_rtc_mmss has to be - * called 500 ms after the second nowtime has started, because when - * nowtime is written into the registers of the CMOS clock, it will - * jump to the next second precisely 500 ms later. Check the Motorola - * MC146818A or Dallas DS12887 data sheet for details. - * - * BUG: This routine does not handle hour overflow properly; it just - * sets the minutes. Usually you'll only notice that after reboot! - */ -int set_rtc_mmss(unsigned long nowtime) -{ - int retval = 0; - int real_seconds, real_minutes, cmos_minutes; - - cmos_minutes = xicor_read(X1241REG_MN); - cmos_minutes = BCD2BIN(cmos_minutes); - - /* - * since we're only adjusting minutes and seconds, - * don't interfere with hour overflow. This avoids - * messing with unknown time zones but requires your - * RTC not to be off by more than 15 minutes - */ - real_seconds = nowtime % 60; - real_minutes = nowtime / 60; - if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1) - real_minutes += 30; /* correct for half hour time zone */ - real_minutes %= 60; - - /* unlock writes to the CCR */ - xicor_write(X1241REG_SR, X1241REG_SR_WEL); - xicor_write(X1241REG_SR, X1241REG_SR_WEL | X1241REG_SR_RWEL); - - if (abs(real_minutes - cmos_minutes) < 30) { - real_seconds = BIN2BCD(real_seconds); - real_minutes = BIN2BCD(real_minutes); - xicor_write(X1241REG_SC, real_seconds); - xicor_write(X1241REG_MN, real_minutes); - } else { - printk(KERN_WARNING - "set_rtc_mmss: can't update from %d to %d\n", - cmos_minutes, real_minutes); - retval = -1; - } - - xicor_write(X1241REG_SR, 0); - - printk("set_rtc_mmss: %02d:%02d\n", real_minutes, real_seconds); - - return retval; -} - -static unsigned long __init get_swarm_time(void) -{ - unsigned int year, mon, day, hour, min, sec, y2k; - - sec = xicor_read(X1241REG_SC); - min = xicor_read(X1241REG_MN); - hour = xicor_read(X1241REG_HR); - - if (hour & X1241REG_HR_MIL) { - hour &= 0x3f; - } else { - if (hour & 0x20) - hour = (hour & 0xf) + 0x12; - } - - sec = BCD2BIN(sec); - min = BCD2BIN(min); - hour = BCD2BIN(hour); - - day = xicor_read(X1241REG_DT); - mon = xicor_read(X1241REG_MO); - year = xicor_read(X1241REG_YR); - y2k = xicor_read(X1241REG_Y2K); - - day = BCD2BIN(day); - mon = BCD2BIN(mon); - year = BCD2BIN(year); - y2k = BCD2BIN(y2k); - - year += (y2k * 100); - - return mktime(year, mon, day, hour, min, sec); -} - -/* - * Bring up the timer at 100 Hz. - */ -void __init swarm_time_init(void) -{ - unsigned int flags; - int status; - - /* Set up the scd general purpose timer 0 to cpu 0 */ - sb1250_time_init(); - - /* Establish communication with the Xicor 1241 RTC */ - /* XXXKW how do I share the SMBus with the I2C subsystem? */ - - __raw_writeq(K_SMB_FREQ_400KHZ, SMB_CSR(R_SMB_FREQ)); - __raw_writeq(0, SMB_CSR(R_SMB_CONTROL)); - - if ((status = xicor_read(X1241REG_SR_RTCF)) < 0) { - printk("x1241: couldn't detect on SWARM SMBus 1\n"); - } else { - if (status & X1241REG_SR_RTCF) - printk("x1241: battery failed -- time is probably wrong\n"); - write_seqlock_irqsave(&xtime_lock, flags); - xtime.tv_sec = get_swarm_time(); - xtime.tv_nsec = 0; - write_sequnlock_irqrestore(&xtime_lock, flags); - } -} -- cgit v1.2.3 From fdc1f93847ea618e51f001805e022794d8bffff3 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 12 Jul 2007 17:41:21 +0100 Subject: [MIPS] Don't use genrtc. The only pseudo-legitimate MIPS user of genrtc was a systems that doesn't have an RTC in hardware at all. At this point faking one is a little pointless ... --- arch/mips/configs/yosemite_defconfig | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch') diff --git a/arch/mips/configs/yosemite_defconfig b/arch/mips/configs/yosemite_defconfig index f1cdb12f7925..f342d8c887b8 100644 --- a/arch/mips/configs/yosemite_defconfig +++ b/arch/mips/configs/yosemite_defconfig @@ -592,8 +592,6 @@ CONFIG_LEGACY_PTY_COUNT=256 # CONFIG_WATCHDOG is not set # CONFIG_HW_RANDOM is not set # CONFIG_RTC is not set -CONFIG_GEN_RTC=y -CONFIG_GEN_RTC_X=y # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set -- cgit v1.2.3 From de61b542b822746d1498718c40f5dd740da49629 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 12 Jul 2007 17:41:23 +0100 Subject: [MIPS] Rename PC speaker code While the PC speaker is wired up to the i8254 there is more to the i8254 than just the PC speaker so this code was getting in the way under its current name. Signed-off-by: Ralf Baechle --- arch/mips/Kconfig | 8 ++++---- arch/mips/configs/jazz_defconfig | 2 +- arch/mips/configs/qemu_defconfig | 2 +- arch/mips/configs/rm200_defconfig | 2 +- arch/mips/kernel/Makefile | 2 +- arch/mips/kernel/i8253.c | 28 ---------------------------- arch/mips/kernel/pcspeaker.c | 28 ++++++++++++++++++++++++++++ 7 files changed, 36 insertions(+), 36 deletions(-) delete mode 100644 arch/mips/kernel/i8253.c create mode 100644 arch/mips/kernel/pcspeaker.c (limited to 'arch') diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 49f02e351244..5c863bcd5614 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -117,9 +117,9 @@ config MACH_JAZZ select ARC32 select ARCH_MAY_HAVE_PC_FDC select GENERIC_ISA_DMA - select I8253 select I8259 select ISA + select PCSPEAKER select SYS_HAS_CPU_R4X00 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL @@ -347,9 +347,9 @@ config QEMU select DMA_COHERENT select GENERIC_ISA_DMA select HAVE_STD_PC_SERIAL_PORT - select I8253 select I8259 select ISA + select PCSPEAKER select SWAP_IO_SPACE select SYS_HAS_CPU_MIPS32_R1 select SYS_SUPPORTS_32BIT_KERNEL @@ -562,9 +562,9 @@ config SNI_RM select HW_HAS_EISA select HW_HAS_PCI select IRQ_CPU - select I8253 select I8259 select ISA + select PCSPEAKER select SWAP_IO_SPACE if CPU_BIG_ENDIAN select SYS_HAS_CPU_R4X00 select SYS_HAS_CPU_R5000 @@ -1864,7 +1864,7 @@ config MMU bool default y -config I8253 +config PCSPEAKER bool source "drivers/pcmcia/Kconfig" diff --git a/arch/mips/configs/jazz_defconfig b/arch/mips/configs/jazz_defconfig index dd04eece9fd3..8a0b4ac5283d 100644 --- a/arch/mips/configs/jazz_defconfig +++ b/arch/mips/configs/jazz_defconfig @@ -241,7 +241,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" # CONFIG_ISA=y CONFIG_MMU=y -CONFIG_I8253=y +CONFIG_PCSPEAKER=y # # PCCARD (PCMCIA/CardBus) support diff --git a/arch/mips/configs/qemu_defconfig b/arch/mips/configs/qemu_defconfig index 6cca105832ca..703de002e372 100644 --- a/arch/mips/configs/qemu_defconfig +++ b/arch/mips/configs/qemu_defconfig @@ -221,7 +221,7 @@ CONFIG_DEFAULT_IOSCHED="noop" # CONFIG_ISA=y CONFIG_MMU=y -CONFIG_I8253=y +CONFIG_PCSPEAKER=y # # PCCARD (PCMCIA/CardBus) support diff --git a/arch/mips/configs/rm200_defconfig b/arch/mips/configs/rm200_defconfig index 1a67a85aabbb..a5dc5cb97aae 100644 --- a/arch/mips/configs/rm200_defconfig +++ b/arch/mips/configs/rm200_defconfig @@ -251,7 +251,7 @@ CONFIG_PCI=y CONFIG_ISA=y # CONFIG_EISA is not set CONFIG_MMU=y -CONFIG_I8253=y +CONFIG_PCSPEAKER=y # # PCCARD (PCMCIA/CardBus) support diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index 961594cb5214..5c8085b6d7ab 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -63,7 +63,7 @@ obj-$(CONFIG_PROC_FS) += proc.o obj-$(CONFIG_64BIT) += cpu-bugs64.o -obj-$(CONFIG_I8253) += i8253.o +obj-$(CONFIG_PCSPEAKER) += pcspeaker.o obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o obj-$(CONFIG_EARLY_PRINTK) += early_printk.o diff --git a/arch/mips/kernel/i8253.c b/arch/mips/kernel/i8253.c deleted file mode 100644 index 475df6904219..000000000000 --- a/arch/mips/kernel/i8253.c +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Copyright (C) 2006 IBM Corporation - * - * Implements device information for i8253 timer chip - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License version - * 2 as published by the Free Software Foundation - */ - -#include - -static __init int add_pcspkr(void) -{ - struct platform_device *pd; - int ret; - - pd = platform_device_alloc("pcspkr", -1); - if (!pd) - return -ENOMEM; - - ret = platform_device_add(pd); - if (ret) - platform_device_put(pd); - - return ret; -} -device_initcall(add_pcspkr); diff --git a/arch/mips/kernel/pcspeaker.c b/arch/mips/kernel/pcspeaker.c new file mode 100644 index 000000000000..475df6904219 --- /dev/null +++ b/arch/mips/kernel/pcspeaker.c @@ -0,0 +1,28 @@ +/* + * Copyright (C) 2006 IBM Corporation + * + * Implements device information for i8253 timer chip + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation + */ + +#include + +static __init int add_pcspkr(void) +{ + struct platform_device *pd; + int ret; + + pd = platform_device_alloc("pcspkr", -1); + if (!pd) + return -ENOMEM; + + ret = platform_device_add(pd); + if (ret) + platform_device_put(pd); + + return ret; +} +device_initcall(add_pcspkr); -- cgit v1.2.3