From a1b58d475432189b427ed306ca5808b060c81292 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Mon, 22 Apr 2019 09:21:55 +0800 Subject: clk: imx7d: add A7-M4 AMP power management support When M4 is active, Linux needs to take care of the power management considering M4 status, this patch adds runtime check for clock management for M4 active case. Signed-off-by: Anson Huang [ Aisheng: update to CLK HW APIs ] Signed-off-by: Dong Aisheng --- drivers/clk/imx/clk.h | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) (limited to 'drivers/clk/imx/clk.h') diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h index c934e3c53364..abc9ba41ea57 100644 --- a/drivers/clk/imx/clk.h +++ b/drivers/clk/imx/clk.h @@ -4,6 +4,7 @@ #include #include +#include extern spinlock_t imx_ccm_lock; @@ -376,7 +377,17 @@ static inline struct clk *imx_clk_gate2_cgr(const char *name, static inline struct clk_hw *imx_clk_hw_gate3(const char *name, const char *parent, void __iomem *reg, u8 shift) { - return clk_hw_register_gate(NULL, name, parent, + /* + * per design team's suggestion, clk root is NOT consuming + * much power, and clk root enable/disable does NOT have domain + * control, so they suggest to leave clk root always on when + * M4 is enabled. + */ + if (imx_src_is_m4_enabled()) + return clk_hw_register_fixed_factor(NULL, name, parent, + CLK_SET_RATE_PARENT, 1, 1); + else + return clk_hw_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE, reg, shift, 0, &imx_ccm_lock); } -- cgit v1.2.3