From c4e0dd7835d12d9765a372b586a5020ac29cc706 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Thu, 16 Jun 2011 05:08:09 +0000 Subject: dmaengine: shdma: add to_sh_dev define This patch adds "to_sh_dev" macro, and clean up codes. Signed-off-by: Kuninori Morimoto Signed-off-by: Paul Mundt --- drivers/dma/shdma.c | 13 ++++--------- drivers/dma/shdma.h | 2 ++ 2 files changed, 6 insertions(+), 9 deletions(-) (limited to 'drivers/dma') diff --git a/drivers/dma/shdma.c b/drivers/dma/shdma.c index 2a638f9f09a2..d2fb16d31bb9 100644 --- a/drivers/dma/shdma.c +++ b/drivers/dma/shdma.c @@ -130,8 +130,7 @@ static bool dmae_is_busy(struct sh_dmae_chan *sh_chan) static unsigned int calc_xmit_shift(struct sh_dmae_chan *sh_chan, u32 chcr) { - struct sh_dmae_device *shdev = container_of(sh_chan->common.device, - struct sh_dmae_device, common); + struct sh_dmae_device *shdev = to_sh_dev(sh_chan); struct sh_dmae_pdata *pdata = shdev->pdata; int cnt = ((chcr & pdata->ts_low_mask) >> pdata->ts_low_shift) | ((chcr & pdata->ts_high_mask) >> pdata->ts_high_shift); @@ -144,8 +143,7 @@ static unsigned int calc_xmit_shift(struct sh_dmae_chan *sh_chan, u32 chcr) static u32 log2size_to_chcr(struct sh_dmae_chan *sh_chan, int l2size) { - struct sh_dmae_device *shdev = container_of(sh_chan->common.device, - struct sh_dmae_device, common); + struct sh_dmae_device *shdev = to_sh_dev(sh_chan); struct sh_dmae_pdata *pdata = shdev->pdata; int i; @@ -209,8 +207,7 @@ static int dmae_set_chcr(struct sh_dmae_chan *sh_chan, u32 val) static int dmae_set_dmars(struct sh_dmae_chan *sh_chan, u16 val) { - struct sh_dmae_device *shdev = container_of(sh_chan->common.device, - struct sh_dmae_device, common); + struct sh_dmae_device *shdev = to_sh_dev(sh_chan); struct sh_dmae_pdata *pdata = shdev->pdata; const struct sh_dmae_channel *chan_pdata = &pdata->channel[sh_chan->id]; u16 __iomem *addr = shdev->dmars; @@ -296,9 +293,7 @@ static struct sh_desc *sh_dmae_get_desc(struct sh_dmae_chan *sh_chan) static const struct sh_dmae_slave_config *sh_dmae_find_slave( struct sh_dmae_chan *sh_chan, struct sh_dmae_slave *param) { - struct dma_device *dma_dev = sh_chan->common.device; - struct sh_dmae_device *shdev = container_of(dma_dev, - struct sh_dmae_device, common); + struct sh_dmae_device *shdev = to_sh_dev(sh_chan); struct sh_dmae_pdata *pdata = shdev->pdata; int i; diff --git a/drivers/dma/shdma.h b/drivers/dma/shdma.h index 5ae9fc512180..6c73b654a5c3 100644 --- a/drivers/dma/shdma.h +++ b/drivers/dma/shdma.h @@ -52,5 +52,7 @@ struct sh_dmae_device { #define to_sh_chan(chan) container_of(chan, struct sh_dmae_chan, common) #define to_sh_desc(lh) container_of(lh, struct sh_desc, node) #define tx_to_sh_desc(tx) container_of(tx, struct sh_desc, async_tx) +#define to_sh_dev(chan) container_of(chan->common.device,\ + struct sh_dmae_device, common) #endif /* __DMA_SHDMA_H */ -- cgit v1.2.3 From 1d2c0980262e70f5643df34493ffd7e608282c16 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Thu, 16 Jun 2011 05:08:18 +0000 Subject: dmaengine: shdma: tidyup spin_unlock_bh on sh_chan_xfer_ld_queue It is not readable that there is any spin_unlock_bh on same function. Signed-off-by: Kuninori Morimoto Signed-off-by: Paul Mundt --- drivers/dma/shdma.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'drivers/dma') diff --git a/drivers/dma/shdma.c b/drivers/dma/shdma.c index d2fb16d31bb9..3d22eb82289d 100644 --- a/drivers/dma/shdma.c +++ b/drivers/dma/shdma.c @@ -766,10 +766,8 @@ static void sh_chan_xfer_ld_queue(struct sh_dmae_chan *sh_chan) spin_lock_bh(&sh_chan->desc_lock); /* DMA work check */ - if (dmae_is_busy(sh_chan)) { - spin_unlock_bh(&sh_chan->desc_lock); - return; - } + if (dmae_is_busy(sh_chan)) + goto sh_chan_xfer_ld_queue_end; /* Find the first not transferred descriptor */ list_for_each_entry(desc, &sh_chan->ld_queue, node) @@ -783,6 +781,7 @@ static void sh_chan_xfer_ld_queue(struct sh_dmae_chan *sh_chan) break; } +sh_chan_xfer_ld_queue_end: spin_unlock_bh(&sh_chan->desc_lock); } -- cgit v1.2.3 From 090b91805a97f58a7deff0f2b40aad1cc2f1b7e0 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Thu, 16 Jun 2011 05:08:28 +0000 Subject: dmaengine: shdma: fixup parameter definition on dmae_set_dmars chan_pdata->dmars_bit is unsigned int Signed-off-by: Kuninori Morimoto Signed-off-by: Paul Mundt --- drivers/dma/shdma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/dma') diff --git a/drivers/dma/shdma.c b/drivers/dma/shdma.c index 3d22eb82289d..41a21b322960 100644 --- a/drivers/dma/shdma.c +++ b/drivers/dma/shdma.c @@ -211,7 +211,7 @@ static int dmae_set_dmars(struct sh_dmae_chan *sh_chan, u16 val) struct sh_dmae_pdata *pdata = shdev->pdata; const struct sh_dmae_channel *chan_pdata = &pdata->channel[sh_chan->id]; u16 __iomem *addr = shdev->dmars; - int shift = chan_pdata->dmars_bit; + unsigned int shift = chan_pdata->dmars_bit; if (dmae_is_busy(sh_chan)) return -EBUSY; -- cgit v1.2.3 From 5899a723b336da241b492583d7e55f1055f8f3b3 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Fri, 17 Jun 2011 08:20:40 +0000 Subject: dmaengine: shdma: add chcr_write/read function CHCR register position is not same in all DMAC. This patch adds new "chcr_offset" to decide it. Signed-off-by: Kuninori Morimoto Signed-off-by: Paul Mundt --- drivers/dma/shdma.c | 35 +++++++++++++++++++++++++++-------- drivers/dma/shdma.h | 1 + 2 files changed, 28 insertions(+), 8 deletions(-) (limited to 'drivers/dma') diff --git a/drivers/dma/shdma.c b/drivers/dma/shdma.c index 41a21b322960..40900c1cee9a 100644 --- a/drivers/dma/shdma.c +++ b/drivers/dma/shdma.c @@ -78,6 +78,20 @@ static void dmaor_write(struct sh_dmae_device *shdev, u16 data) __raw_writew(data, shdev->chan_reg + DMAOR / sizeof(u32)); } +static void chcr_write(struct sh_dmae_chan *sh_dc, u32 data) +{ + struct sh_dmae_device *shdev = to_sh_dev(sh_dc); + + __raw_writel(data, sh_dc->base + shdev->chcr_offset / sizeof(u32)); +} + +static u32 chcr_read(struct sh_dmae_chan *sh_dc) +{ + struct sh_dmae_device *shdev = to_sh_dev(sh_dc); + + return __raw_readl(sh_dc->base + shdev->chcr_offset / sizeof(u32)); +} + /* * Reset DMA controller * @@ -120,7 +134,7 @@ static int sh_dmae_rst(struct sh_dmae_device *shdev) static bool dmae_is_busy(struct sh_dmae_chan *sh_chan) { - u32 chcr = sh_dmae_readl(sh_chan, CHCR); + u32 chcr = chcr_read(sh_chan); if ((chcr & (CHCR_DE | CHCR_TE)) == CHCR_DE) return true; /* working */ @@ -167,18 +181,18 @@ static void dmae_set_reg(struct sh_dmae_chan *sh_chan, struct sh_dmae_regs *hw) static void dmae_start(struct sh_dmae_chan *sh_chan) { - u32 chcr = sh_dmae_readl(sh_chan, CHCR); + u32 chcr = chcr_read(sh_chan); chcr |= CHCR_DE | CHCR_IE; - sh_dmae_writel(sh_chan, chcr & ~CHCR_TE, CHCR); + chcr_write(sh_chan, chcr & ~CHCR_TE); } static void dmae_halt(struct sh_dmae_chan *sh_chan) { - u32 chcr = sh_dmae_readl(sh_chan, CHCR); + u32 chcr = chcr_read(sh_chan); chcr &= ~(CHCR_DE | CHCR_TE | CHCR_IE); - sh_dmae_writel(sh_chan, chcr, CHCR); + chcr_write(sh_chan, chcr); } static void dmae_init(struct sh_dmae_chan *sh_chan) @@ -190,7 +204,7 @@ static void dmae_init(struct sh_dmae_chan *sh_chan) u32 chcr = DM_INC | SM_INC | 0x400 | log2size_to_chcr(sh_chan, LOG2_DEFAULT_XFER_SIZE); sh_chan->xmit_shift = calc_xmit_shift(sh_chan, chcr); - sh_dmae_writel(sh_chan, chcr, CHCR); + chcr_write(sh_chan, chcr); } static int dmae_set_chcr(struct sh_dmae_chan *sh_chan, u32 val) @@ -200,7 +214,7 @@ static int dmae_set_chcr(struct sh_dmae_chan *sh_chan, u32 val) return -EBUSY; sh_chan->xmit_shift = calc_xmit_shift(sh_chan, val); - sh_dmae_writel(sh_chan, val, CHCR); + chcr_write(sh_chan, val); return 0; } @@ -840,7 +854,7 @@ static irqreturn_t sh_dmae_interrupt(int irq, void *data) spin_lock(&sh_chan->desc_lock); - chcr = sh_dmae_readl(sh_chan, CHCR); + chcr = chcr_read(sh_chan); if (chcr & CHCR_TE) { /* DMA stop */ @@ -1138,6 +1152,11 @@ static int __init sh_dmae_probe(struct platform_device *pdev) /* platform data */ shdev->pdata = pdata; + if (pdata->chcr_offset) + shdev->chcr_offset = pdata->chcr_offset; + else + shdev->chcr_offset = CHCR; + platform_set_drvdata(pdev, shdev); pm_runtime_enable(&pdev->dev); diff --git a/drivers/dma/shdma.h b/drivers/dma/shdma.h index 6c73b654a5c3..6f064cad6c0f 100644 --- a/drivers/dma/shdma.h +++ b/drivers/dma/shdma.h @@ -47,6 +47,7 @@ struct sh_dmae_device { struct list_head node; u32 __iomem *chan_reg; u16 __iomem *dmars; + unsigned int chcr_offset; }; #define to_sh_chan(chan) container_of(chan, struct sh_dmae_chan, common) -- cgit v1.2.3 From 67c6269e5c998b53c2c08ce2befbbe20a7b6f57f Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Fri, 17 Jun 2011 08:20:51 +0000 Subject: dmaengine: shdma: add chcr_ie_bit IE bit position on CHCR register is not same in all DMAC. This patch adds new "chcr_ie_bit" to decide it. Signed-off-by: Kuninori Morimoto Signed-off-by: Paul Mundt --- drivers/dma/shdma.c | 11 +++++++++-- drivers/dma/shdma.h | 1 + 2 files changed, 10 insertions(+), 2 deletions(-) (limited to 'drivers/dma') diff --git a/drivers/dma/shdma.c b/drivers/dma/shdma.c index 40900c1cee9a..9412de3ef899 100644 --- a/drivers/dma/shdma.c +++ b/drivers/dma/shdma.c @@ -181,17 +181,19 @@ static void dmae_set_reg(struct sh_dmae_chan *sh_chan, struct sh_dmae_regs *hw) static void dmae_start(struct sh_dmae_chan *sh_chan) { + struct sh_dmae_device *shdev = to_sh_dev(sh_chan); u32 chcr = chcr_read(sh_chan); - chcr |= CHCR_DE | CHCR_IE; + chcr |= CHCR_DE | shdev->chcr_ie_bit; chcr_write(sh_chan, chcr & ~CHCR_TE); } static void dmae_halt(struct sh_dmae_chan *sh_chan) { + struct sh_dmae_device *shdev = to_sh_dev(sh_chan); u32 chcr = chcr_read(sh_chan); - chcr &= ~(CHCR_DE | CHCR_TE | CHCR_IE); + chcr &= ~(CHCR_DE | CHCR_TE | shdev->chcr_ie_bit); chcr_write(sh_chan, chcr); } @@ -1157,6 +1159,11 @@ static int __init sh_dmae_probe(struct platform_device *pdev) else shdev->chcr_offset = CHCR; + if (pdata->chcr_ie_bit) + shdev->chcr_ie_bit = pdata->chcr_ie_bit; + else + shdev->chcr_ie_bit = CHCR_IE; + platform_set_drvdata(pdev, shdev); pm_runtime_enable(&pdev->dev); diff --git a/drivers/dma/shdma.h b/drivers/dma/shdma.h index 6f064cad6c0f..dc56576f9fdb 100644 --- a/drivers/dma/shdma.h +++ b/drivers/dma/shdma.h @@ -48,6 +48,7 @@ struct sh_dmae_device { u32 __iomem *chan_reg; u16 __iomem *dmars; unsigned int chcr_offset; + u32 chcr_ie_bit; }; #define to_sh_chan(chan) container_of(chan, struct sh_dmae_chan, common) -- cgit v1.2.3 From e76c3af873025f5a704d56a28882be761e15657b Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Fri, 17 Jun 2011 08:20:56 +0000 Subject: dmaengine: shdma: add dmaor_is_32bit flag Signed-off-by: Kuninori Morimoto Signed-off-by: Paul Mundt --- drivers/dma/shdma.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) (limited to 'drivers/dma') diff --git a/drivers/dma/shdma.c b/drivers/dma/shdma.c index 9412de3ef899..6a21cd843ab7 100644 --- a/drivers/dma/shdma.c +++ b/drivers/dma/shdma.c @@ -70,12 +70,22 @@ static u32 sh_dmae_readl(struct sh_dmae_chan *sh_dc, u32 reg) static u16 dmaor_read(struct sh_dmae_device *shdev) { - return __raw_readw(shdev->chan_reg + DMAOR / sizeof(u32)); + u32 __iomem *addr = shdev->chan_reg + DMAOR / sizeof(u32); + + if (shdev->pdata->dmaor_is_32bit) + return __raw_readl(addr); + else + return __raw_readw(addr); } static void dmaor_write(struct sh_dmae_device *shdev, u16 data) { - __raw_writew(data, shdev->chan_reg + DMAOR / sizeof(u32)); + u32 __iomem *addr = shdev->chan_reg + DMAOR / sizeof(u32); + + if (shdev->pdata->dmaor_is_32bit) + __raw_writel(data, addr); + else + __raw_writew(data, addr); } static void chcr_write(struct sh_dmae_chan *sh_dc, u32 data) -- cgit v1.2.3 From 260bf2c5f69f419b04b6861ca91565b5fb16ce48 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Fri, 17 Jun 2011 08:21:05 +0000 Subject: dmaengine: shdma: add .needs_tend_set / .no_dmars flags Signed-off-by: Kuninori Morimoto Signed-off-by: Paul Mundt --- drivers/dma/shdma.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'drivers/dma') diff --git a/drivers/dma/shdma.c b/drivers/dma/shdma.c index 6a21cd843ab7..0f3ec8d57a7a 100644 --- a/drivers/dma/shdma.c +++ b/drivers/dma/shdma.c @@ -194,6 +194,9 @@ static void dmae_start(struct sh_dmae_chan *sh_chan) struct sh_dmae_device *shdev = to_sh_dev(sh_chan); u32 chcr = chcr_read(sh_chan); + if (shdev->pdata->needs_tend_set) + sh_dmae_writel(sh_chan, 0xFFFFFFFF, TEND); + chcr |= CHCR_DE | shdev->chcr_ie_bit; chcr_write(sh_chan, chcr & ~CHCR_TE); } @@ -242,6 +245,9 @@ static int dmae_set_dmars(struct sh_dmae_chan *sh_chan, u16 val) if (dmae_is_busy(sh_chan)) return -EBUSY; + if (pdata->no_dmars) + return 0; + /* in the case of a missing DMARS resource use first memory window */ if (!addr) addr = (u16 __iomem *)shdev->chan_reg; -- cgit v1.2.3