From bcd781f46a5f892ef2ae5843839849aa579fe096 Mon Sep 17 00:00:00 2001 From: Borislav Petkov Date: Fri, 7 Jan 2011 16:17:46 +0100 Subject: amd64_edac: Cleanup NBSH cruft Remove reporting of errors with UC bit set - this is done by the MCE decoding code anyway and this driver deals with DRAM ECC errors only. UC (NB uncorrectable error) doesn't necessarily mean it is a DRAM error. Remove unused macros while at it. Signed-off-by: Borislav Petkov --- drivers/edac/amd64_edac.c | 15 ++------------- 1 file changed, 2 insertions(+), 13 deletions(-) (limited to 'drivers/edac/amd64_edac.c') diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index dfa7ac7a4837..04d481b578e4 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -1748,7 +1748,7 @@ static void amd64_handle_ce(struct mem_ctl_info *mci, u64 sys_addr; /* Ensure that the Error Address is VALID */ - if (!(info->nbsh & K8_NBSH_VALID_ERROR_ADDR)) { + if (!(info->nbsh & NBSH_VALID_ERROR_ADDR)) { amd64_mc_err(mci, "HW has no ERROR_ADDRESS available\n"); edac_mc_handle_ce_no_info(mci, EDAC_MOD_STR); return; @@ -1773,7 +1773,7 @@ static void amd64_handle_ue(struct mem_ctl_info *mci, log_mci = mci; - if (!(info->nbsh & K8_NBSH_VALID_ERROR_ADDR)) { + if (!(info->nbsh & NBSH_VALID_ERROR_ADDR)) { amd64_mc_err(mci, "HW has no ERROR_ADDRESS available\n"); edac_mc_handle_ue_no_info(log_mci, EDAC_MOD_STR); return; @@ -1839,17 +1839,6 @@ void amd64_decode_bus_error(int node_id, struct mce *m, u32 nbcfg) regs.nbcfg = nbcfg; __amd64_decode_bus_error(mci, ®s); - - /* - * Check the UE bit of the NB status high register, if set generate some - * logs. If NOT a GART error, then process the event as a NO-INFO event. - * If it was a GART error, skip that process. - * - * FIXME: this should go somewhere else, if at all. - */ - if (regs.nbsh & K8_NBSH_UC_ERR && !report_gart_errors) - edac_mc_handle_ue_no_info(mci, "UE bit is set"); - } /* -- cgit v1.2.3