From 0ba1d03cd878313af5ad601d44450db076049959 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Thu, 10 Jun 2021 21:32:29 +0300 Subject: drm/i915/fbc: s/threshold/limit/ MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Let's call the compression limit the limit. Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20210610183237.3920-2-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_fbc.c | 50 ++++++++++++++++---------------- 1 file changed, 25 insertions(+), 25 deletions(-) (limited to 'drivers/gpu/drm/i915/display/intel_fbc.c') diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index 1847a161cb37..715f5c60d9c5 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -104,7 +104,7 @@ static void i8xx_fbc_activate(struct drm_i915_private *dev_priv) int i; u32 fbc_ctl; - /* Note: fbc.threshold == 1 for i8xx */ + /* Note: fbc.limit == 1 for i8xx */ cfb_pitch = params->cfb_size / FBC_LL_SIZE; if (params->fb.stride < cfb_pitch) cfb_pitch = params->fb.stride; @@ -235,13 +235,13 @@ static void ilk_fbc_activate(struct drm_i915_private *dev_priv) { struct intel_fbc_reg_params *params = &dev_priv->fbc.params; u32 dpfc_ctl; - int threshold = dev_priv->fbc.threshold; + int limit = dev_priv->fbc.limit; dpfc_ctl = DPFC_CTL_PLANE(params->crtc.i9xx_plane); if (params->fb.format->cpp[0] == 2) - threshold++; + limit++; - switch (threshold) { + switch (limit) { case 4: case 3: dpfc_ctl |= DPFC_CTL_LIMIT_4X; @@ -300,7 +300,7 @@ static void gen7_fbc_activate(struct drm_i915_private *dev_priv) { struct intel_fbc_reg_params *params = &dev_priv->fbc.params; u32 dpfc_ctl; - int threshold = dev_priv->fbc.threshold; + int limit = dev_priv->fbc.limit; /* Display WA #0529: skl, kbl, bxt. */ if (DISPLAY_VER(dev_priv) == 9) { @@ -319,9 +319,9 @@ static void gen7_fbc_activate(struct drm_i915_private *dev_priv) dpfc_ctl |= IVB_DPFC_CTL_PLANE(params->crtc.i9xx_plane); if (params->fb.format->cpp[0] == 2) - threshold++; + limit++; - switch (threshold) { + switch (limit) { case 4: case 3: dpfc_ctl |= DPFC_CTL_LIMIT_4X; @@ -433,12 +433,12 @@ static u64 intel_fbc_cfb_base_max(struct drm_i915_private *i915) return BIT_ULL(32); } -static int find_compression_threshold(struct drm_i915_private *dev_priv, - struct drm_mm_node *node, - unsigned int size, - unsigned int fb_cpp) +static int find_compression_limit(struct drm_i915_private *dev_priv, + struct drm_mm_node *node, + unsigned int size, + unsigned int fb_cpp) { - int compression_threshold = 1; + int compression_limit = 1; int ret; u64 end; @@ -458,19 +458,19 @@ static int find_compression_threshold(struct drm_i915_private *dev_priv, * code changes, this code needs to change as well. * * The enable_fbc code will attempt to use one of our 2 compression - * thresholds, therefore, in that case, we only have 1 resort. + * limits, therefore, in that case, we only have 1 resort. */ /* Try to over-allocate to reduce reallocations and fragmentation. */ ret = i915_gem_stolen_insert_node_in_range(dev_priv, node, size <<= 1, 4096, 0, end); if (ret == 0) - return compression_threshold; + return compression_limit; again: /* HW's ability to limit the CFB is 1:4 */ - if (compression_threshold > 4 || - (fb_cpp == 2 && compression_threshold == 2)) + if (compression_limit > 4 || + (fb_cpp == 2 && compression_limit == 2)) return 0; ret = i915_gem_stolen_insert_node_in_range(dev_priv, node, size >>= 1, @@ -478,10 +478,10 @@ again: if (ret && DISPLAY_VER(dev_priv) <= 4) { return 0; } else if (ret) { - compression_threshold <<= 1; + compression_limit <<= 1; goto again; } else { - return compression_threshold; + return compression_limit; } } @@ -495,8 +495,8 @@ static int intel_fbc_alloc_cfb(struct drm_i915_private *dev_priv, drm_WARN_ON(&dev_priv->drm, drm_mm_node_allocated(&fbc->compressed_fb)); - ret = find_compression_threshold(dev_priv, &fbc->compressed_fb, - size, fb_cpp); + ret = find_compression_limit(dev_priv, &fbc->compressed_fb, + size, fb_cpp); if (!ret) goto err_llb; else if (ret > 1) { @@ -504,7 +504,7 @@ static int intel_fbc_alloc_cfb(struct drm_i915_private *dev_priv, "Reducing the compressed framebuffer size. This may lead to less power savings than a non-reduced-size. Try to increase stolen memory size if available in BIOS.\n"); } - fbc->threshold = ret; + fbc->limit = ret; if (DISPLAY_VER(dev_priv) >= 5) intel_de_write(dev_priv, ILK_DPFC_CB_BASE, @@ -537,8 +537,8 @@ static int intel_fbc_alloc_cfb(struct drm_i915_private *dev_priv, } drm_dbg_kms(&dev_priv->drm, - "reserved %llu bytes of contiguous stolen space for FBC, threshold: %d\n", - fbc->compressed_fb.size, fbc->threshold); + "reserved %llu bytes of contiguous stolen space for FBC, limit: %d\n", + fbc->compressed_fb.size, fbc->limit); return 0; @@ -753,7 +753,7 @@ static bool intel_fbc_cfb_size_changed(struct drm_i915_private *dev_priv) struct intel_fbc *fbc = &dev_priv->fbc; return intel_fbc_calculate_cfb_size(dev_priv, &fbc->state_cache) > - fbc->compressed_fb.size * fbc->threshold; + fbc->compressed_fb.size * fbc->limit; } static u16 intel_fbc_gen9_wa_cfb_stride(struct drm_i915_private *dev_priv) @@ -763,7 +763,7 @@ static u16 intel_fbc_gen9_wa_cfb_stride(struct drm_i915_private *dev_priv) if ((DISPLAY_VER(dev_priv) == 9) && cache->fb.modifier != I915_FORMAT_MOD_X_TILED) - return DIV_ROUND_UP(cache->plane.src_w, 32 * fbc->threshold) * 8; + return DIV_ROUND_UP(cache->plane.src_w, 32 * fbc->limit) * 8; else return 0; } -- cgit v1.2.3 From 5826d9f2115c7cf7e0f7be4743d2d2665d0af625 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Thu, 10 Jun 2021 21:32:30 +0300 Subject: drm/i915/fbc: Extract intel_fbc_program_cfb() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Extract the CFB (+LLB) programming into a separate function. Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20210610183237.3920-3-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_fbc.c | 46 +++++++++++++++++++------------- 1 file changed, 28 insertions(+), 18 deletions(-) (limited to 'drivers/gpu/drm/i915/display/intel_fbc.c') diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index 715f5c60d9c5..3b0e3e913ef9 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -506,13 +506,7 @@ static int intel_fbc_alloc_cfb(struct drm_i915_private *dev_priv, fbc->limit = ret; - if (DISPLAY_VER(dev_priv) >= 5) - intel_de_write(dev_priv, ILK_DPFC_CB_BASE, - fbc->compressed_fb.start); - else if (IS_GM45(dev_priv)) { - intel_de_write(dev_priv, DPFC_CB_BASE, - fbc->compressed_fb.start); - } else { + if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) { compressed_llb = kzalloc(sizeof(*compressed_llb), GFP_KERNEL); if (!compressed_llb) goto err_fb; @@ -523,17 +517,6 @@ static int intel_fbc_alloc_cfb(struct drm_i915_private *dev_priv, goto err_fb; fbc->compressed_llb = compressed_llb; - - GEM_BUG_ON(range_overflows_end_t(u64, dev_priv->dsm.start, - fbc->compressed_fb.start, - U32_MAX)); - GEM_BUG_ON(range_overflows_end_t(u64, dev_priv->dsm.start, - fbc->compressed_llb->start, - U32_MAX)); - intel_de_write(dev_priv, FBC_CFB_BASE, - dev_priv->dsm.start + fbc->compressed_fb.start); - intel_de_write(dev_priv, FBC_LL_BASE, - dev_priv->dsm.start + compressed_llb->start); } drm_dbg_kms(&dev_priv->drm, @@ -551,6 +534,31 @@ err_llb: return -ENOSPC; } +static void intel_fbc_program_cfb(struct drm_i915_private *dev_priv) +{ + struct intel_fbc *fbc = &dev_priv->fbc; + + if (DISPLAY_VER(dev_priv) >= 5) { + intel_de_write(dev_priv, ILK_DPFC_CB_BASE, + fbc->compressed_fb.start); + } else if (IS_GM45(dev_priv)) { + intel_de_write(dev_priv, DPFC_CB_BASE, + fbc->compressed_fb.start); + } else { + GEM_BUG_ON(range_overflows_end_t(u64, dev_priv->dsm.start, + fbc->compressed_fb.start, + U32_MAX)); + GEM_BUG_ON(range_overflows_end_t(u64, dev_priv->dsm.start, + fbc->compressed_llb->start, + U32_MAX)); + + intel_de_write(dev_priv, FBC_CFB_BASE, + dev_priv->dsm.start + fbc->compressed_fb.start); + intel_de_write(dev_priv, FBC_LL_BASE, + dev_priv->dsm.start + fbc->compressed_llb->start); + } +} + static void __intel_fbc_cleanup_cfb(struct drm_i915_private *dev_priv) { struct intel_fbc *fbc = &dev_priv->fbc; @@ -1302,6 +1310,8 @@ void intel_fbc_enable(struct intel_atomic_state *state, fbc->no_fbc_reason = "FBC enabled but not active yet\n"; fbc->crtc = crtc; + + intel_fbc_program_cfb(dev_priv); out: mutex_unlock(&fbc->lock); } -- cgit v1.2.3 From 45a321a7ee0ad9fb3f80ccdb4ef320309efbbc93 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Thu, 10 Jun 2021 21:32:31 +0300 Subject: drm/i915/fbc: Embed the compressed_llb node MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Not much point in dynamically allocating the line length buffer mm node that I can see. Just embed it directly like we do the for the cfb node. One less failure point to worry about. Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20210610183237.3920-4-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_fbc.c | 29 +++++++++-------------------- 1 file changed, 9 insertions(+), 20 deletions(-) (limited to 'drivers/gpu/drm/i915/display/intel_fbc.c') diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index 3b0e3e913ef9..99f386f06f7b 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -489,11 +489,12 @@ static int intel_fbc_alloc_cfb(struct drm_i915_private *dev_priv, unsigned int size, unsigned int fb_cpp) { struct intel_fbc *fbc = &dev_priv->fbc; - struct drm_mm_node *compressed_llb; int ret; drm_WARN_ON(&dev_priv->drm, drm_mm_node_allocated(&fbc->compressed_fb)); + drm_WARN_ON(&dev_priv->drm, + drm_mm_node_allocated(&fbc->compressed_llb)); ret = find_compression_limit(dev_priv, &fbc->compressed_fb, size, fb_cpp); @@ -507,16 +508,10 @@ static int intel_fbc_alloc_cfb(struct drm_i915_private *dev_priv, fbc->limit = ret; if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) { - compressed_llb = kzalloc(sizeof(*compressed_llb), GFP_KERNEL); - if (!compressed_llb) - goto err_fb; - - ret = i915_gem_stolen_insert_node(dev_priv, compressed_llb, + ret = i915_gem_stolen_insert_node(dev_priv, &fbc->compressed_llb, 4096, 4096); if (ret) goto err_fb; - - fbc->compressed_llb = compressed_llb; } drm_dbg_kms(&dev_priv->drm, @@ -526,7 +521,6 @@ static int intel_fbc_alloc_cfb(struct drm_i915_private *dev_priv, return 0; err_fb: - kfree(compressed_llb); i915_gem_stolen_remove_node(dev_priv, &fbc->compressed_fb); err_llb: if (drm_mm_initialized(&dev_priv->mm.stolen)) @@ -549,13 +543,13 @@ static void intel_fbc_program_cfb(struct drm_i915_private *dev_priv) fbc->compressed_fb.start, U32_MAX)); GEM_BUG_ON(range_overflows_end_t(u64, dev_priv->dsm.start, - fbc->compressed_llb->start, + fbc->compressed_llb.start, U32_MAX)); intel_de_write(dev_priv, FBC_CFB_BASE, dev_priv->dsm.start + fbc->compressed_fb.start); intel_de_write(dev_priv, FBC_LL_BASE, - dev_priv->dsm.start + fbc->compressed_llb->start); + dev_priv->dsm.start + fbc->compressed_llb.start); } } @@ -566,15 +560,10 @@ static void __intel_fbc_cleanup_cfb(struct drm_i915_private *dev_priv) if (WARN_ON(intel_fbc_hw_is_active(dev_priv))) return; - if (!drm_mm_node_allocated(&fbc->compressed_fb)) - return; - - if (fbc->compressed_llb) { - i915_gem_stolen_remove_node(dev_priv, fbc->compressed_llb); - kfree(fbc->compressed_llb); - } - - i915_gem_stolen_remove_node(dev_priv, &fbc->compressed_fb); + if (drm_mm_node_allocated(&fbc->compressed_llb)) + i915_gem_stolen_remove_node(dev_priv, &fbc->compressed_llb); + if (drm_mm_node_allocated(&fbc->compressed_fb)) + i915_gem_stolen_remove_node(dev_priv, &fbc->compressed_fb); } void intel_fbc_cleanup_cfb(struct drm_i915_private *dev_priv) -- cgit v1.2.3 From 337e54f77cee46c5d0de43370fb6bb38c0794890 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Thu, 10 Jun 2021 21:32:32 +0300 Subject: drm/i915/fbc: Don't pass around the mm node MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit No point in passing the mm node explicitly to find_compression_limit() since it's always the same node for the cfb. Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20210610183237.3920-5-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_fbc.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) (limited to 'drivers/gpu/drm/i915/display/intel_fbc.c') diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index 99f386f06f7b..55bc708e8712 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -434,10 +434,10 @@ static u64 intel_fbc_cfb_base_max(struct drm_i915_private *i915) } static int find_compression_limit(struct drm_i915_private *dev_priv, - struct drm_mm_node *node, unsigned int size, unsigned int fb_cpp) { + struct intel_fbc *fbc = &dev_priv->fbc; int compression_limit = 1; int ret; u64 end; @@ -462,8 +462,8 @@ static int find_compression_limit(struct drm_i915_private *dev_priv, */ /* Try to over-allocate to reduce reallocations and fragmentation. */ - ret = i915_gem_stolen_insert_node_in_range(dev_priv, node, size <<= 1, - 4096, 0, end); + ret = i915_gem_stolen_insert_node_in_range(dev_priv, &fbc->compressed_fb, + size <<= 1, 4096, 0, end); if (ret == 0) return compression_limit; @@ -473,8 +473,8 @@ again: (fb_cpp == 2 && compression_limit == 2)) return 0; - ret = i915_gem_stolen_insert_node_in_range(dev_priv, node, size >>= 1, - 4096, 0, end); + ret = i915_gem_stolen_insert_node_in_range(dev_priv, &fbc->compressed_fb, + size >>= 1, 4096, 0, end); if (ret && DISPLAY_VER(dev_priv) <= 4) { return 0; } else if (ret) { @@ -496,8 +496,7 @@ static int intel_fbc_alloc_cfb(struct drm_i915_private *dev_priv, drm_WARN_ON(&dev_priv->drm, drm_mm_node_allocated(&fbc->compressed_llb)); - ret = find_compression_limit(dev_priv, &fbc->compressed_fb, - size, fb_cpp); + ret = find_compression_limit(dev_priv, size, fb_cpp); if (!ret) goto err_llb; else if (ret > 1) { -- cgit v1.2.3 From d502f6c4389f27fd316c417cfc58d69bf2831839 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Thu, 10 Jun 2021 21:32:33 +0300 Subject: drm/i915/fbc: Handle 16bpp compression limit better MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The limit++ for the 16bpp case is nonsense since the compression limit is always supposed to be power of two. Replace it with <<=1. Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20210610183237.3920-6-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_fbc.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'drivers/gpu/drm/i915/display/intel_fbc.c') diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index 55bc708e8712..1c220cea8977 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -239,11 +239,10 @@ static void ilk_fbc_activate(struct drm_i915_private *dev_priv) dpfc_ctl = DPFC_CTL_PLANE(params->crtc.i9xx_plane); if (params->fb.format->cpp[0] == 2) - limit++; + limit <<= 1; switch (limit) { case 4: - case 3: dpfc_ctl |= DPFC_CTL_LIMIT_4X; break; case 2: @@ -319,11 +318,10 @@ static void gen7_fbc_activate(struct drm_i915_private *dev_priv) dpfc_ctl |= IVB_DPFC_CTL_PLANE(params->crtc.i9xx_plane); if (params->fb.format->cpp[0] == 2) - limit++; + limit <<= 1; switch (limit) { case 4: - case 3: dpfc_ctl |= DPFC_CTL_LIMIT_4X; break; case 2: -- cgit v1.2.3 From 9c8a442d9d37600f3b2d528980da8719bc7fa5ec Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Thu, 10 Jun 2021 21:32:34 +0300 Subject: drm/i915/fbc: Introduce g4x_dpfc_ctl_limit() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Exctract the limit->register value conversion into a common helper. Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20210610183237.3920-7-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_fbc.c | 58 ++++++++++++++------------------ 1 file changed, 25 insertions(+), 33 deletions(-) (limited to 'drivers/gpu/drm/i915/display/intel_fbc.c') diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index 1c220cea8977..31ac1163f55b 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -148,16 +148,35 @@ static bool i8xx_fbc_is_active(struct drm_i915_private *dev_priv) return intel_de_read(dev_priv, FBC_CONTROL) & FBC_CTL_EN; } +static u32 g4x_dpfc_ctl_limit(struct drm_i915_private *i915) +{ + const struct intel_fbc_reg_params *params = &i915->fbc.params; + int limit = i915->fbc.limit; + + if (params->fb.format->cpp[0] == 2) + limit <<= 1; + + switch (limit) { + default: + MISSING_CASE(limit); + fallthrough; + case 1: + return DPFC_CTL_LIMIT_1X; + case 2: + return DPFC_CTL_LIMIT_2X; + case 4: + return DPFC_CTL_LIMIT_4X; + } +} + static void g4x_fbc_activate(struct drm_i915_private *dev_priv) { struct intel_fbc_reg_params *params = &dev_priv->fbc.params; u32 dpfc_ctl; dpfc_ctl = DPFC_CTL_PLANE(params->crtc.i9xx_plane) | DPFC_SR_EN; - if (params->fb.format->cpp[0] == 2) - dpfc_ctl |= DPFC_CTL_LIMIT_2X; - else - dpfc_ctl |= DPFC_CTL_LIMIT_1X; + + dpfc_ctl |= g4x_dpfc_ctl_limit(dev_priv); if (params->fence_id >= 0) { dpfc_ctl |= DPFC_CTL_FENCE_EN | params->fence_id; @@ -235,23 +254,10 @@ static void ilk_fbc_activate(struct drm_i915_private *dev_priv) { struct intel_fbc_reg_params *params = &dev_priv->fbc.params; u32 dpfc_ctl; - int limit = dev_priv->fbc.limit; dpfc_ctl = DPFC_CTL_PLANE(params->crtc.i9xx_plane); - if (params->fb.format->cpp[0] == 2) - limit <<= 1; - switch (limit) { - case 4: - dpfc_ctl |= DPFC_CTL_LIMIT_4X; - break; - case 2: - dpfc_ctl |= DPFC_CTL_LIMIT_2X; - break; - case 1: - dpfc_ctl |= DPFC_CTL_LIMIT_1X; - break; - } + dpfc_ctl |= g4x_dpfc_ctl_limit(dev_priv); if (params->fence_id >= 0) { dpfc_ctl |= DPFC_CTL_FENCE_EN; @@ -299,7 +305,6 @@ static void gen7_fbc_activate(struct drm_i915_private *dev_priv) { struct intel_fbc_reg_params *params = &dev_priv->fbc.params; u32 dpfc_ctl; - int limit = dev_priv->fbc.limit; /* Display WA #0529: skl, kbl, bxt. */ if (DISPLAY_VER(dev_priv) == 9) { @@ -317,20 +322,7 @@ static void gen7_fbc_activate(struct drm_i915_private *dev_priv) if (IS_IVYBRIDGE(dev_priv)) dpfc_ctl |= IVB_DPFC_CTL_PLANE(params->crtc.i9xx_plane); - if (params->fb.format->cpp[0] == 2) - limit <<= 1; - - switch (limit) { - case 4: - dpfc_ctl |= DPFC_CTL_LIMIT_4X; - break; - case 2: - dpfc_ctl |= DPFC_CTL_LIMIT_2X; - break; - case 1: - dpfc_ctl |= DPFC_CTL_LIMIT_1X; - break; - } + dpfc_ctl |= g4x_dpfc_ctl_limit(dev_priv); if (params->fence_id >= 0) { dpfc_ctl |= IVB_DPFC_CTL_FENCE_EN; -- cgit v1.2.3 From c48f67ee91ad44466a1e63a089ac4835f3f2db4f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Thu, 10 Jun 2021 21:32:35 +0300 Subject: drm/i915/fbc: Extract intel_fbc_stolen_end() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Declutter find_compression_limit() a bit by extracting intel_fbc_stolen_end(). Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20210610183237.3920-8-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_fbc.c | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) (limited to 'drivers/gpu/drm/i915/display/intel_fbc.c') diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index 31ac1163f55b..6415f2cfd1ac 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -423,13 +423,8 @@ static u64 intel_fbc_cfb_base_max(struct drm_i915_private *i915) return BIT_ULL(32); } -static int find_compression_limit(struct drm_i915_private *dev_priv, - unsigned int size, - unsigned int fb_cpp) +static u64 intel_fbc_stolen_end(struct drm_i915_private *dev_priv) { - struct intel_fbc *fbc = &dev_priv->fbc; - int compression_limit = 1; - int ret; u64 end; /* The FBC hardware for BDW/SKL doesn't have access to the stolen @@ -442,7 +437,17 @@ static int find_compression_limit(struct drm_i915_private *dev_priv, else end = U64_MAX; - end = min(end, intel_fbc_cfb_base_max(dev_priv)); + return min(end, intel_fbc_cfb_base_max(dev_priv)); +} + +static int find_compression_limit(struct drm_i915_private *dev_priv, + unsigned int size, + unsigned int fb_cpp) +{ + struct intel_fbc *fbc = &dev_priv->fbc; + u64 end = intel_fbc_stolen_end(dev_priv); + int compression_limit = 1; + int ret; /* HACK: This code depends on what we will do in *_enable_fbc. If that * code changes, this code needs to change as well. -- cgit v1.2.3 From 8538d78e26ecaf2c9f0d43526207c643972c2cc1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Thu, 10 Jun 2021 21:32:36 +0300 Subject: drm/i915/fbc: Make the cfb allocation loop a bit more legible MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Write the cfb allocation loop as an actual loop instead of some hard to read goto thing. Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20210610183237.3920-9-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_fbc.c | 51 ++++++++++++++++---------------- 1 file changed, 26 insertions(+), 25 deletions(-) (limited to 'drivers/gpu/drm/i915/display/intel_fbc.c') diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index 6415f2cfd1ac..b6bfb4439a8b 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -440,44 +440,45 @@ static u64 intel_fbc_stolen_end(struct drm_i915_private *dev_priv) return min(end, intel_fbc_cfb_base_max(dev_priv)); } +static int intel_fbc_max_limit(struct drm_i915_private *dev_priv, int fb_cpp) +{ + /* + * FIXME: FBC1 can have arbitrary cfb stride, + * so we could support different compression ratios. + */ + if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) + return 1; + + /* WaFbcOnly1to1Ratio:ctg */ + if (IS_G4X(dev_priv)) + return 1; + + /* FBC2 can only do 1:1, 1:2, 1:4 */ + return fb_cpp == 2 ? 2 : 4; +} + static int find_compression_limit(struct drm_i915_private *dev_priv, unsigned int size, unsigned int fb_cpp) { struct intel_fbc *fbc = &dev_priv->fbc; u64 end = intel_fbc_stolen_end(dev_priv); - int compression_limit = 1; - int ret; - - /* HACK: This code depends on what we will do in *_enable_fbc. If that - * code changes, this code needs to change as well. - * - * The enable_fbc code will attempt to use one of our 2 compression - * limits, therefore, in that case, we only have 1 resort. - */ + int ret, limit = 1; /* Try to over-allocate to reduce reallocations and fragmentation. */ ret = i915_gem_stolen_insert_node_in_range(dev_priv, &fbc->compressed_fb, size <<= 1, 4096, 0, end); if (ret == 0) - return compression_limit; - -again: - /* HW's ability to limit the CFB is 1:4 */ - if (compression_limit > 4 || - (fb_cpp == 2 && compression_limit == 2)) - return 0; + return limit; - ret = i915_gem_stolen_insert_node_in_range(dev_priv, &fbc->compressed_fb, - size >>= 1, 4096, 0, end); - if (ret && DISPLAY_VER(dev_priv) <= 4) { - return 0; - } else if (ret) { - compression_limit <<= 1; - goto again; - } else { - return compression_limit; + for (; limit <= intel_fbc_max_limit(dev_priv, fb_cpp); limit <<= 1) { + ret = i915_gem_stolen_insert_node_in_range(dev_priv, &fbc->compressed_fb, + size >>= 1, 4096, 0, end); + if (ret == 0) + return limit; } + + return 0; } static int intel_fbc_alloc_cfb(struct drm_i915_private *dev_priv, -- cgit v1.2.3 From 46b2c40e0af3cdcba7ad7bf89ca1410d519a83c6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Thu, 10 Jun 2021 21:32:37 +0300 Subject: drm/i915/fbc: Allocate llb before cfb MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since the llb allocation has a fixed size, let's grab it before the potentially variable sized cfb. That should avoid some allocation failure cases once we allow different compression ratios for FBC1. Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20210610183237.3920-10-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_fbc.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) (limited to 'drivers/gpu/drm/i915/display/intel_fbc.c') diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index b6bfb4439a8b..7dc72e4a4656 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -492,6 +492,13 @@ static int intel_fbc_alloc_cfb(struct drm_i915_private *dev_priv, drm_WARN_ON(&dev_priv->drm, drm_mm_node_allocated(&fbc->compressed_llb)); + if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) { + ret = i915_gem_stolen_insert_node(dev_priv, &fbc->compressed_llb, + 4096, 4096); + if (ret) + goto err; + } + ret = find_compression_limit(dev_priv, size, fb_cpp); if (!ret) goto err_llb; @@ -502,22 +509,15 @@ static int intel_fbc_alloc_cfb(struct drm_i915_private *dev_priv, fbc->limit = ret; - if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) { - ret = i915_gem_stolen_insert_node(dev_priv, &fbc->compressed_llb, - 4096, 4096); - if (ret) - goto err_fb; - } - drm_dbg_kms(&dev_priv->drm, "reserved %llu bytes of contiguous stolen space for FBC, limit: %d\n", fbc->compressed_fb.size, fbc->limit); return 0; -err_fb: - i915_gem_stolen_remove_node(dev_priv, &fbc->compressed_fb); err_llb: + i915_gem_stolen_remove_node(dev_priv, &fbc->compressed_llb); +err: if (drm_mm_initialized(&dev_priv->mm.stolen)) drm_info_once(&dev_priv->drm, "not enough stolen space for compressed buffer (need %d more bytes), disabling. Hint: you may be able to increase stolen memory size in the BIOS to avoid this.\n", size); return -ENOSPC; -- cgit v1.2.3 From 01fa662091bd24830ae4cd35bd0ce5c1f030424c Mon Sep 17 00:00:00 2001 From: Matthew Auld Date: Thu, 1 Jul 2021 10:03:26 +0100 Subject: drm/i915/display: check if compressed_llb was allocated MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit If we hit the error path here we unconditionally call i915_gem_stolen_remove_node, even though we only allocate the compressed_llb on older platforms. Therefore we should first check that we actually allocated the node before trying to remove it. References: https://gitlab.freedesktop.org/drm/intel/-/issues/3709 Fixes: 46b2c40e0af3 ("drm/i915/fbc: Allocate llb before cfb") Signed-off-by: Matthew Auld Cc: Ville Syrjälä Cc: José Roberto de Souza Reviewed-by: José Roberto de Souza Reviewed-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20210701090326.1056452-1-matthew.auld@intel.com --- drivers/gpu/drm/i915/display/intel_fbc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/drm/i915/display/intel_fbc.c') diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index 7dc72e4a4656..82effb64a3b9 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -516,7 +516,8 @@ static int intel_fbc_alloc_cfb(struct drm_i915_private *dev_priv, return 0; err_llb: - i915_gem_stolen_remove_node(dev_priv, &fbc->compressed_llb); + if (drm_mm_node_allocated(&fbc->compressed_llb)) + i915_gem_stolen_remove_node(dev_priv, &fbc->compressed_llb); err: if (drm_mm_initialized(&dev_priv->mm.stolen)) drm_info_once(&dev_priv->drm, "not enough stolen space for compressed buffer (need %d more bytes), disabling. Hint: you may be able to increase stolen memory size in the BIOS to avoid this.\n", size); -- cgit v1.2.3 From 425057e725934b46760b0386b18bb4eb8ee066a7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jos=C3=A9=20Roberto=20de=20Souza?= Date: Fri, 25 Jun 2021 16:56:00 -0700 Subject: drm/i915/display: Disable FBC when PSR2 is enabled display 12 and newer MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is now a requirement for all display 12 and newer, not only for tigerlake. BSpec: 50422 Cc: Gwan-gyeong Mun Signed-off-by: José Roberto de Souza Reviewed-by: Lucas De Marchi Link: https://patchwork.freedesktop.org/patch/msgid/20210625235600.765677-2-jose.souza@intel.com --- drivers/gpu/drm/i915/display/intel_fbc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/gpu/drm/i915/display/intel_fbc.c') diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index 82effb64a3b9..ddfc17e21668 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -912,11 +912,11 @@ static bool intel_fbc_can_activate(struct intel_crtc *crtc) } /* - * Tigerlake is not supporting FBC with PSR2. + * Display 12+ is not supporting FBC with PSR2. * Recommendation is to keep this combination disabled * Bspec: 50422 HSD: 14010260002 */ - if (fbc->state_cache.psr2_active && IS_TIGERLAKE(dev_priv)) { + if (fbc->state_cache.psr2_active && DISPLAY_VER(dev_priv) >= 12) { fbc->no_fbc_reason = "not supported with PSR2"; return false; } -- cgit v1.2.3