From abae50ed12b6f556afce0febb41639f0ede28fb9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Tue, 1 Oct 2013 18:02:16 +0300 Subject: drm/i915: Do the fbc vs. primary plane enable/disable in the right order MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Disable fbc before disabling the primary plane, and enable fbc after the primary plane has been enabled again. Also use intel_disable_fbc() to disable FBC to avoid the pointless overhead of intel_update_fbc(), and especially avoid having to clean up and set up the stolen mem compressed buffer again. Signed-off-by: Ville Syrjälä Reviewed-by: Chris Wilson Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_sprite.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) (limited to 'drivers/gpu/drm/i915/intel_sprite.c') diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 276c3a6a9168..d19146992f34 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -526,11 +526,11 @@ intel_enable_primary(struct drm_crtc *crtc) intel_crtc->primary_disabled = false; + I915_WRITE(reg, I915_READ(reg) | DISPLAY_PLANE_ENABLE); + mutex_lock(&dev->struct_mutex); intel_update_fbc(dev); mutex_unlock(&dev->struct_mutex); - - I915_WRITE(reg, I915_READ(reg) | DISPLAY_PLANE_ENABLE); } static void @@ -544,13 +544,14 @@ intel_disable_primary(struct drm_crtc *crtc) if (intel_crtc->primary_disabled) return; - I915_WRITE(reg, I915_READ(reg) & ~DISPLAY_PLANE_ENABLE); - intel_crtc->primary_disabled = true; mutex_lock(&dev->struct_mutex); - intel_update_fbc(dev); + if (dev_priv->fbc.plane == intel_crtc->plane) + intel_disable_fbc(dev); mutex_unlock(&dev->struct_mutex); + + I915_WRITE(reg, I915_READ(reg) & ~DISPLAY_PLANE_ENABLE); } static int -- cgit v1.2.3