From d8e0b3a28736a8bed4e7b6b63b2e03225d463549 Mon Sep 17 00:00:00 2001 From: Harry Hong Date: Wed, 8 Feb 2012 17:19:26 +0900 Subject: mmc: tegra: Clear SPI_MODE_CLKEN_OVERRIDE bit by default This bit should always be 0 according to TRM. Bug 929985 Signed-off-by: Harry Hong Reviewed-on: http://git-master/r/79975 (cherry picked from commit 9371d04b4f9d79f1e03e60120bf1bba28af77d4b) Change-Id: I225d6b5442f63809a77ce92d9cbd152dc4112ac4 Reviewed-on: http://git-master/r/87640 Reviewed-by: Pavan Kunapuli Tested-by: Harry Hong Reviewed-by: Sachin Nikam --- drivers/mmc/host/sdhci-tegra.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers/mmc') diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index 6d61aaee5fbe..fb728291ffe8 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -36,6 +36,7 @@ #define SDHCI_VENDOR_CLOCK_CNTRL 0x100 #define SDHCI_VENDOR_CLOCK_CNTRL_SDMMC_CLK 0x1 #define SDHCI_VENDOR_CLOCK_CNTRL_PADPIPE_CLKEN_OVERRIDE 0x8 +#define SDHCI_VENDOR_CLOCK_CNTRL_SPI_MODE_CLKEN_OVERRIDE 0x4 #define SDHCI_VENDOR_CLOCK_CNTRL_BASE_CLK_FREQ_SHIFT 8 #define SDHCI_VENDOR_CLOCK_CNTRL_TAP_VALUE_SHIFT 16 #define SDHCI_VENDOR_CLOCK_CNTRL_SDR50_TUNING 0x20 @@ -190,6 +191,8 @@ static void tegra3_sdhci_post_reset_init(struct sdhci_host *sdhci) vendor_ctrl |= (tegra3_sdhost_max_clk[tegra_host->instance] / 1000000) << SDHCI_VENDOR_CLOCK_CNTRL_BASE_CLK_FREQ_SHIFT; vendor_ctrl |= SDHCI_VENDOR_CLOCK_CNTRL_PADPIPE_CLKEN_OVERRIDE; + vendor_ctrl &= ~SDHCI_VENDOR_CLOCK_CNTRL_SPI_MODE_CLKEN_OVERRIDE; + /* Set tap delay */ if (plat->tap_delay) { vendor_ctrl &= ~(0xFF << -- cgit v1.2.3