From 66804274c8e2646755d5f757a8c24fc2c09ae2a1 Mon Sep 17 00:00:00 2001 From: Huang Chaofan Date: Wed, 15 Aug 2018 15:58:10 +0800 Subject: MLK-19226 VPU: Add support for i.MX8QM B0 vpu decoder and encoder Add support for i.MX8QM B0 vpu decoder and encoder and it is compatiable with i.MX8QXP B0 VPU. Signed-off-by: Huang Chaofan --- drivers/mxc/vpu-decoder-b0/mediasys_types.h | 2 +- drivers/mxc/vpu-decoder-b0/vpu_b0.c | 32 +++++++++++++++++++++++++---- drivers/mxc/vpu-decoder-b0/vpu_b0.h | 5 +++++ drivers/mxc/vpu-decoder-b0/vpu_rpc.c | 3 ++- 4 files changed, 36 insertions(+), 6 deletions(-) (limited to 'drivers/mxc/vpu-decoder-b0') diff --git a/drivers/mxc/vpu-decoder-b0/mediasys_types.h b/drivers/mxc/vpu-decoder-b0/mediasys_types.h index 947aad663b65..aae9fe59bfab 100644 --- a/drivers/mxc/vpu-decoder-b0/mediasys_types.h +++ b/drivers/mxc/vpu-decoder-b0/mediasys_types.h @@ -634,7 +634,7 @@ typedef struct { u_int32 uHeapBase; u_int32 uHeapSize; - u_int32 uFSLCacheBaseAddr; + u_int32 uFSLCacheBaseAddr[2]; } MEDIAIP_FW_SYSTEM_CONFIG, *pMEDIAIP_FW_SYSTEM_CONFIG; diff --git a/drivers/mxc/vpu-decoder-b0/vpu_b0.c b/drivers/mxc/vpu-decoder-b0/vpu_b0.c index f15e93d7e21e..e5601216e2bb 100755 --- a/drivers/mxc/vpu-decoder-b0/vpu_b0.c +++ b/drivers/mxc/vpu-decoder-b0/vpu_b0.c @@ -2401,6 +2401,7 @@ static int vpu_firmware_download(struct vpu_dev *This) unsigned int FW_Size = 0; void *csr_offset, *csr_cpuwait; int ret = 0; + char *p = This->m0_p_fw_space_vir; ret = request_firmware((const struct firmware **)&This->m0_pfw, M0FW_FILENAME, @@ -2429,10 +2430,18 @@ static int vpu_firmware_download(struct vpu_dev *This) #ifdef CM4 boot_CM4_up(This, This->m0_p_fw_space_vir); #else - csr_offset = ioremap(0x2d040000, 4); - writel(This->m0_p_fw_space_phy, csr_offset); - csr_cpuwait = ioremap(0x2d040004, 4); - writel(0x0, csr_cpuwait); + if (This->plat_type == IMX8QM) { //decoder use M core 0 + p[16] = IMX8QM; + csr_offset = ioremap(0x2d080000, 4); + writel(This->m0_p_fw_space_phy, csr_offset); + csr_cpuwait = ioremap(0x2d080004, 4); + writel(0x0, csr_cpuwait); + } else { + csr_offset = ioremap(0x2d040000, 4); + writel(This->m0_p_fw_space_phy, csr_offset); + csr_cpuwait = ioremap(0x2d040004, 4); + writel(0x0, csr_cpuwait); + } #endif return ret; } @@ -2848,6 +2857,7 @@ static void vpu_reset(struct vpu_dev *This) static int vpu_enable_hw(struct vpu_dev *This) { vpu_dbg(LVL_INFO, "%s()\n", __func__); +#if 0 This->vpu_clk = clk_get(&This->plat_dev->dev, "vpu_clk"); if (IS_ERR(This->vpu_clk)) { vpu_dbg(LVL_ERR, "vpu_clk get error\n"); @@ -2855,15 +2865,18 @@ static int vpu_enable_hw(struct vpu_dev *This) } clk_set_rate(This->vpu_clk, 600000000); clk_prepare_enable(This->vpu_clk); +#endif vpu_setup(This); return 0; } static void vpu_disable_hw(struct vpu_dev *This) { vpu_reset(This); +#if 0 if (This->vpu_clk) { clk_put(This->vpu_clk); } +#endif } static int reset_vpu_firmware(struct vpu_dev *dev) @@ -2895,6 +2908,7 @@ static int vpu_probe(struct platform_device *pdev) struct device_node *reserved_node; struct resource reserved_res; unsigned int mu_id; + u_int32 core_type; int ret; dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL); @@ -2912,6 +2926,15 @@ static int vpu_probe(struct platform_device *pdev) } if (np) { + ret = of_property_read_u32(np, "core_type", &core_type); + if (ret) { + vpu_dbg(LVL_ERR, "error: Cannot get core num %d\n", ret); + return -EINVAL; + } + if (core_type == 2) + dev->plat_type = IMX8QM; + else + dev->plat_type = IMX8QXP; reserved_node = of_parse_phandle(np, "boot-region", 0); if (!reserved_node) { vpu_dbg(LVL_ERR, "error: boot-region of_parse_phandle error\n"); @@ -3028,6 +3051,7 @@ static int vpu_probe(struct platform_device *pdev) return ret; } #endif + ret = vpu_mu_init(dev); if (ret) { vpu_dbg(LVL_ERR, "error: %s vpu mu init failed\n", __func__); diff --git a/drivers/mxc/vpu-decoder-b0/vpu_b0.h b/drivers/mxc/vpu-decoder-b0/vpu_b0.h index 6230988125a7..5d7f3051288d 100755 --- a/drivers/mxc/vpu-decoder-b0/vpu_b0.h +++ b/drivers/mxc/vpu-decoder-b0/vpu_b0.h @@ -87,6 +87,10 @@ typedef enum{ EVENT } MSG_Type; +enum PLAT_TYPE { + IMX8QXP = 0, + IMX8QM = 1, +}; enum QUEUE_TYPE { V4L2_SRC = 0, @@ -212,6 +216,7 @@ struct vpu_dev { void __iomem *mu_base_virtaddr; unsigned int vpu_mu_id; int vpu_mu_init; + u_int32 plat_type; struct clk *clk_m0; void __iomem *regs_base; diff --git a/drivers/mxc/vpu-decoder-b0/vpu_rpc.c b/drivers/mxc/vpu-decoder-b0/vpu_rpc.c index 232f481ef4c2..d3a3b95f23a9 100644 --- a/drivers/mxc/vpu-decoder-b0/vpu_rpc.c +++ b/drivers/mxc/vpu-decoder-b0/vpu_rpc.c @@ -197,7 +197,8 @@ void rpc_set_system_cfg_value(void *Interface, u_int32 regs_base) pSystemCfg->uDPVBaseAddr = 0x0; pSystemCfg->uDPVIrqPin = 0x0; pSystemCfg->uPixIfBaseAddr = (unsigned int)(regs_base + 0x180000 + 0x20000); - pSystemCfg->uFSLCacheBaseAddr = (unsigned int)(regs_base + 0x60000); + pSystemCfg->uFSLCacheBaseAddr[0] = (unsigned int)(regs_base + 0x60000); + pSystemCfg->uFSLCacheBaseAddr[1] = (unsigned int)(regs_base + 0x68000); } u_int32 rpc_MediaIPFW_Video_buffer_space_check(MediaIPFW_Video_BufDesc *pBufDesc, -- cgit v1.2.3