From 345f84227b50e90329dd303499024603596566f4 Mon Sep 17 00:00:00 2001 From: Haiying Wang Date: Wed, 29 Apr 2009 14:14:35 -0400 Subject: net/ucc_geth: update riscTx and riscRx in ucc_geth Change the definition of riscTx and riscRx to unsigned integer instead of enum, and change their values to support 4 risc allocation if the qe has 4 RISC engines. Signed-off-by: Haiying Wang Acked-by: David S. Miller Signed-off-by: Kumar Gala --- drivers/net/ucc_geth.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/net/ucc_geth.h') diff --git a/drivers/net/ucc_geth.h b/drivers/net/ucc_geth.h index 2f8ee7c87efe..46bb1d233597 100644 --- a/drivers/net/ucc_geth.h +++ b/drivers/net/ucc_geth.h @@ -1120,8 +1120,8 @@ struct ucc_geth_info { enum ucc_geth_maccfg2_pad_and_crc_mode padAndCrc; enum ucc_geth_num_of_threads numThreadsTx; enum ucc_geth_num_of_threads numThreadsRx; - enum qe_risc_allocation riscTx; - enum qe_risc_allocation riscRx; + unsigned int riscTx; + unsigned int riscRx; }; /* structure representing UCC GETH */ -- cgit v1.2.3