From a15f96ec6de6c511fc2183a81a6fba67fc034ddc Mon Sep 17 00:00:00 2001 From: Greg Meiste Date: Thu, 30 Sep 2010 11:40:22 -0500 Subject: spi: tegra: Increase delay between CS and clock start Some SPI devices require a delay between the CS and when the clock starts. Increase SS_SETUP to accommodate these devices. Change-Id: I301e3583e70c722cadde5a9f91119881805dd3a5 Signed-off-by: Greg Meiste --- drivers/spi/spi-tegra.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-tegra.c b/drivers/spi/spi-tegra.c index aa25ed77f0b5..b268583ddc23 100644 --- a/drivers/spi/spi-tegra.c +++ b/drivers/spi/spi-tegra.c @@ -274,6 +274,7 @@ static void spi_tegra_start_transfer(struct spi_device *spi, val |= SLINK_TXEN; val |= SLINK_SS_EN_CS(spi->chip_select); val |= SLINK_SPIE; + val |= SLINK_SS_SETUP(3); spi_tegra_writel(tspi, val, SLINK_COMMAND2); val = spi_tegra_readl(tspi, SLINK_COMMAND); -- cgit v1.2.3