From 3c8676967bce1c9b8723129625a2125b7704674f Mon Sep 17 00:00:00 2001 From: Omar Ramirez Luna Date: Wed, 24 Oct 2012 17:09:17 -0500 Subject: staging: tidspbridge: change type to __iomem for per and core addresses Currently per_pm_base and core_pm_base are declared as u32, however _raw_* changed the data type, since: 195bbca ARM: 7500/1: io: avoid writeback addressing modes for __raw_ accessors This should fix warnings for per and core accesses: warning: passing argument 2 of '__raw_writel' makes pointer from integer without a cast ../io.h:88: note: expected 'volatile void *' but argument is of type 'u32' Signed-off-by: Omar Ramirez Luna Signed-off-by: Greg Kroah-Hartman --- drivers/staging/tidspbridge/rmgr/drv.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'drivers/staging/tidspbridge/rmgr/drv.c') diff --git a/drivers/staging/tidspbridge/rmgr/drv.c b/drivers/staging/tidspbridge/rmgr/drv.c index 6795205b0155..db1da28cecba 100644 --- a/drivers/staging/tidspbridge/rmgr/drv.c +++ b/drivers/staging/tidspbridge/rmgr/drv.c @@ -667,10 +667,10 @@ int drv_request_bridge_res_dsp(void **phost_resources) OMAP_DSP_MEM3_SIZE); host_res->per_base = ioremap(OMAP_PER_CM_BASE, OMAP_PER_CM_SIZE); - host_res->per_pm_base = (u32) ioremap(OMAP_PER_PRM_BASE, - OMAP_PER_PRM_SIZE); - host_res->core_pm_base = (u32) ioremap(OMAP_CORE_PRM_BASE, - OMAP_CORE_PRM_SIZE); + host_res->per_pm_base = ioremap(OMAP_PER_PRM_BASE, + OMAP_PER_PRM_SIZE); + host_res->core_pm_base = ioremap(OMAP_CORE_PRM_BASE, + OMAP_CORE_PRM_SIZE); host_res->dmmu_base = ioremap(OMAP_DMMU_BASE, OMAP_DMMU_SIZE); -- cgit v1.2.3