From 514820eb982eb85677ed2ecef9710e90e24fbdab Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 8 Jun 2011 18:51:32 +0900 Subject: serial: sh-sci: Consolidate RXD pin handling. Non-SCI parts do not have the special port reg necessary for cases where the RX and SCI pins are muxed and need to be manually polled, so these like always fall back on the normal FIFO processing paths. SH7760 is in a class in and of itself with regards to mapping its SIM card interface via the SCI port class despite not having any of the RXD lines wired up and so implicitly behaving more like a SCIF in this regard. Out of the other CPUs, some support the port check via the same block while others do it through an external SuperI/O, so it's not even possible to perform the check relative to the ioremapped cookie offset, so the separate read semantics are preserved here, too. Signed-off-by: Paul Mundt --- drivers/tty/serial/sh-sci.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'drivers/tty/serial/sh-sci.c') diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index bb27885ea2e5..3248ddaa889d 100644 --- a/drivers/tty/serial/sh-sci.c +++ b/drivers/tty/serial/sh-sci.c @@ -363,6 +363,19 @@ static int sci_rxfill(struct uart_port *port) return (sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0; } +/* + * SCI helper for checking the state of the muxed port/RXD pins. + */ +static inline int sci_rxd_in(struct uart_port *port) +{ + struct sci_port *s = to_sci_port(port); + + if (s->cfg->port_reg <= 0) + return 1; + + return !!__raw_readb(s->cfg->port_reg); +} + /* ********************************************************************** * * the interrupt related routines * * ********************************************************************** */ -- cgit v1.2.3