From 0306ab11c396f93056009152464ff104e4721817 Mon Sep 17 00:00:00 2001 From: Harald Welte Date: Tue, 22 Sep 2009 16:47:35 -0700 Subject: viafb: add support for the VX855 chipset Add support for a new VIA integrated graphics chipset, the VX855. Signed-off-by: HaraldWelte Signed-off-by: Florian Tobias Schandinat Cc: Scott Fang Cc: Joseph Chan Cc: Jonathan Corbet Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/via/hw.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'drivers/video/via/hw.h') diff --git a/drivers/video/via/hw.h b/drivers/video/via/hw.h index 7302b403e453..4e54b2f92d0f 100644 --- a/drivers/video/via/hw.h +++ b/drivers/video/via/hw.h @@ -324,6 +324,17 @@ is reserved, so it may have problem to set 1600x1200 on IGA2. */ /* location: {CR94,0,6} */ #define VX800_IGA2_DISPLAY_QUEUE_EXPIRE_NUM 128 +/* For VT3409 */ +#define VX855_IGA1_FIFO_MAX_DEPTH 400 +#define VX855_IGA1_FIFO_THRESHOLD 320 +#define VX855_IGA1_FIFO_HIGH_THRESHOLD 320 +#define VX855_IGA1_DISPLAY_QUEUE_EXPIRE_NUM 160 + +#define VX855_IGA2_FIFO_MAX_DEPTH 200 +#define VX855_IGA2_FIFO_THRESHOLD 160 +#define VX855_IGA2_FIFO_HIGH_THRESHOLD 160 +#define VX855_IGA2_DISPLAY_QUEUE_EXPIRE_NUM 320 + #define IGA1_FIFO_DEPTH_SELECT_REG_NUM 1 #define IGA1_FIFO_THRESHOLD_REG_NUM 2 #define IGA1_FIFO_HIGH_THRESHOLD_REG_NUM 2 @@ -688,6 +699,7 @@ struct pll_map { u32 cle266_pll; u32 k800_pll; u32 cx700_pll; + u32 vx855_pll; }; struct rgbLUT { @@ -832,6 +844,8 @@ struct iga2_crtc_timing { #define P4M900_FUNCTION3 0x3364 /* VT3353 chipset*/ #define VX800_FUNCTION3 0x3353 +/* VT3409 chipset*/ +#define VX855_FUNCTION3 0x3409 #define NUM_TOTAL_PLL_TABLE ARRAY_SIZE(pll_value) -- cgit v1.2.3