From 474f1a667d4bd40b6dcacc6870b70f4d2ba4e155 Mon Sep 17 00:00:00 2001 From: Sonic Zhang Date: Fri, 29 Jun 2007 16:35:17 +0800 Subject: Blackfin arch: kgdb specific code Signed-off-by: Sonic Zhang Signed-off-by: Bryan Wu --- drivers/serial/Kconfig | 2 +- drivers/serial/bfin_5xx.c | 105 ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 106 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 315ea9916456..71a4ac53a7ef 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -556,7 +556,7 @@ choice config SERIAL_BFIN_DMA bool "DMA mode" - depends on DMA_UNCACHED_1M + depends on DMA_UNCACHED_1M && !KGDB_UART help This driver works under DMA mode. If this option is selected, the blackfin simple dma driver is also enabled. diff --git a/drivers/serial/bfin_5xx.c b/drivers/serial/bfin_5xx.c index 22569bd5d821..f7926dc7fa78 100644 --- a/drivers/serial/bfin_5xx.c +++ b/drivers/serial/bfin_5xx.c @@ -41,6 +41,11 @@ #include #include +#ifdef CONFIG_KGDB_UART +#include +#include +#endif + #include #include @@ -119,6 +124,9 @@ static void bfin_serial_stop_rx(struct uart_port *port) unsigned short ier; ier = UART_GET_IER(uart); +#ifdef CONFIG_KGDB_UART + if (uart->port.line != CONFIG_KGDB_UART_PORT) +#endif ier &= ~ERBFI; UART_PUT_IER(uart, ier); } @@ -130,6 +138,49 @@ static void bfin_serial_enable_ms(struct uart_port *port) { } +#ifdef CONFIG_KGDB_UART +static int kgdb_entry_state; + +void kgdb_put_debug_char(int chr) +{ + struct bfin_serial_port *uart; + + if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS) + uart = &bfin_serial_ports[0]; + else + uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT]; + + while (!(UART_GET_LSR(uart) & THRE)) { + __builtin_bfin_ssync(); + } + UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB)); + __builtin_bfin_ssync(); + UART_PUT_CHAR(uart, (unsigned char)chr); + __builtin_bfin_ssync(); +} + +int kgdb_get_debug_char(void) +{ + struct bfin_serial_port *uart; + unsigned char chr; + + if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS) + uart = &bfin_serial_ports[0]; + else + uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT]; + + while(!(UART_GET_LSR(uart) & DR)) { + __builtin_bfin_ssync(); + } + UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB)); + __builtin_bfin_ssync(); + chr = UART_GET_CHAR(uart); + __builtin_bfin_ssync(); + + return chr; +} +#endif + #ifdef CONFIG_SERIAL_BFIN_PIO static void local_put_char(struct bfin_serial_port *uart, char ch) { @@ -152,6 +203,9 @@ static void bfin_serial_rx_chars(struct bfin_serial_port *uart) { struct tty_struct *tty = uart->port.info->tty; unsigned int status, ch, flg; +#ifdef CONFIG_KGDB_UART + struct pt_regs *regs = get_irq_regs(); +#endif #ifdef BF533_FAMILY static int in_break = 0; #endif @@ -160,6 +214,27 @@ static void bfin_serial_rx_chars(struct bfin_serial_port *uart) ch = UART_GET_CHAR(uart); uart->port.icount.rx++; +#ifdef CONFIG_KGDB_UART + if (uart->port.line == CONFIG_KGDB_UART_PORT) { + if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */ + kgdb_breakkey_pressed(regs); + return; + } else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */ + kgdb_entry_state = 1; + } else if (kgdb_entry_state == 1 && ch == 'q') { + kgdb_entry_state = 0; + kgdb_breakkey_pressed(regs); + return; + } else if (ch == 0x3) {/* Ctrl + C */ + kgdb_entry_state = 0; + kgdb_breakkey_pressed(regs); + return; + } else { + kgdb_entry_state = 0; + } + } +#endif + #ifdef BF533_FAMILY /* The BF533 family of processors have a nice misbehavior where * they continuously generate characters for a "single" break. @@ -571,7 +646,11 @@ static int bfin_serial_startup(struct uart_port *port) uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES; add_timer(&(uart->rx_dma_timer)); #else +# ifdef CONFIG_KGDB_UART + if (uart->port.line != CONFIG_KGDB_UART_PORT && request_irq +# else if (request_irq +# endif (uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED, "BFIN_UART_RX", uart)) { printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n"); @@ -601,6 +680,9 @@ static void bfin_serial_shutdown(struct uart_port *port) free_dma(uart->rx_dma_channel); del_timer(&(uart->rx_dma_timer)); #else +#ifdef CONFIG_KGDB_UART + if (uart->port.line != CONFIG_KGDB_UART_PORT) +#endif free_irq(uart->port.irq, uart); free_irq(uart->port.irq+1, uart); #endif @@ -931,6 +1013,10 @@ static int __init bfin_serial_rs_console_init(void) { bfin_serial_init_ports(); register_console(&bfin_serial_console); +#ifdef CONFIG_KGDB_UART + kgdb_entry_state = 0; + init_kgdb_uart(); +#endif return 0; } console_initcall(bfin_serial_rs_console_init); @@ -1023,6 +1109,10 @@ static struct platform_driver bfin_serial_driver = { static int __init bfin_serial_init(void) { int ret; +#ifdef CONFIG_KGDB_UART + struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT]; + struct termios t; +#endif pr_info("Serial: Blackfin serial driver\n"); @@ -1036,6 +1126,21 @@ static int __init bfin_serial_init(void) uart_unregister_driver(&bfin_serial_reg); } } +#ifdef CONFIG_KGDB_UART + if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) { + request_irq(uart->port.irq, bfin_serial_int, + IRQF_DISABLED, "BFIN_UART_RX", uart); + pr_info("Request irq for kgdb uart port\n"); + UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI); + __builtin_bfin_ssync(); + t.c_cflag = CS8|B57600; + t.c_iflag = 0; + t.c_oflag = 0; + t.c_lflag = ICANON; + t.c_line = CONFIG_KGDB_UART_PORT; + bfin_serial_set_termios(&uart->port, &t, &t); + } +#endif return ret; } -- cgit v1.2.3 From f40d24d909ad99c802a6813ff32b6feb20ab8c71 Mon Sep 17 00:00:00 2001 From: Alex Landau Date: Thu, 12 Jul 2007 12:11:48 +0800 Subject: Blackfin arch: Port the dm9000 driver to Blackfin by using the correct low-level io routines Signed-off-by: Alex Landau Signed-off-by: Bryan Wu --- drivers/net/Kconfig | 2 +- drivers/net/dm9000.c | 17 ++++++++++++++++- 2 files changed, 17 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index b941c74a06c4..80572e2c9dab 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -877,7 +877,7 @@ config NET_NETX config DM9000 tristate "DM9000 support" - depends on ARM || MIPS + depends on ARM || BLACKFIN || MIPS select CRC32 select MII ---help--- diff --git a/drivers/net/dm9000.c b/drivers/net/dm9000.c index 264fa0e2e075..c3de81bf090a 100644 --- a/drivers/net/dm9000.c +++ b/drivers/net/dm9000.c @@ -104,6 +104,18 @@ #define PRINTK(args...) printk(KERN_DEBUG args) #endif +#ifdef CONFIG_BLACKFIN +#define readsb insb +#define readsw insw +#define readsl insl +#define writesb outsb +#define writesw outsw +#define writesl outsl +#define DM9000_IRQ_FLAGS (IRQF_SHARED | IRQF_TRIGGER_HIGH) +#else +#define DM9000_IRQ_FLAGS IRQF_SHARED +#endif + /* * Transmit timeout, default 5 seconds. */ @@ -431,6 +443,9 @@ dm9000_probe(struct platform_device *pdev) db->io_addr = (void __iomem *)base; db->io_data = (void __iomem *)(base + 4); + /* ensure at least we have a default set of IO routines */ + dm9000_set_io(db, 2); + } else { db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1); @@ -614,7 +629,7 @@ dm9000_open(struct net_device *dev) PRINTK2("entering dm9000_open\n"); - if (request_irq(dev->irq, &dm9000_interrupt, IRQF_SHARED, dev->name, dev)) + if (request_irq(dev->irq, &dm9000_interrupt, DM9000_IRQ_FLAGS, dev->name, dev)) return -EAGAIN; /* Initialize DM9000 board */ -- cgit v1.2.3 From db83b991bce1b4792125d4b23bb108e8cfd5d366 Mon Sep 17 00:00:00 2001 From: Michael Hennerich Date: Thu, 12 Jul 2007 12:07:40 +0800 Subject: Video Console: Blackfin doesnt support VGA console Signed-off-by: Michael Hennerich Signed-off-by: Bryan Wu --- drivers/video/console/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/video/console/Kconfig b/drivers/video/console/Kconfig index 63b85bf81a65..d3b8a6be2916 100644 --- a/drivers/video/console/Kconfig +++ b/drivers/video/console/Kconfig @@ -6,7 +6,7 @@ menu "Console display driver support" config VGA_CONSOLE bool "VGA text console" if EMBEDDED || !X86 - depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE && !SUPERH + depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE && !SUPERH && !BFIN default y help Saying Y here will allow you to use Linux in text mode through a -- cgit v1.2.3 From f4d640c9be1979a603ed017e1e03a16ba3a4d7a1 Mon Sep 17 00:00:00 2001 From: Roy Huang Date: Thu, 12 Jul 2007 16:43:46 +0800 Subject: Blackfin serial driver: supporting BF548-EZKIT serial port Signed-off-by: Roy Huang Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu --- drivers/serial/Kconfig | 46 ++++++++++++++++++++++++++-- drivers/serial/bfin_5xx.c | 77 +++++++++++++++++++++++++++++++++++++++++++++-- 2 files changed, 117 insertions(+), 6 deletions(-) (limited to 'drivers') diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 71a4ac53a7ef..2adbed4e10f3 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -599,7 +599,7 @@ config UART0_RTS_PIN config SERIAL_BFIN_UART1 bool "Enable UART1" - depends on SERIAL_BFIN && (BF534 || BF536 || BF537) + depends on SERIAL_BFIN && (BF534 || BF536 || BF537 || BF54x) help Enable UART1 @@ -612,18 +612,58 @@ config BFIN_UART1_CTSRTS config UART1_CTS_PIN int "UART1 CTS pin" - depends on BFIN_UART1_CTSRTS + depends on BFIN_UART1_CTSRTS && (BF53x || BF561) default -1 help Refer to ./include/asm-blackfin/gpio.h to see the GPIO map. config UART1_RTS_PIN int "UART1 RTS pin" - depends on BFIN_UART1_CTSRTS + depends on BFIN_UART1_CTSRTS && (BF53x || BF561) default -1 help Refer to ./include/asm-blackfin/gpio.h to see the GPIO map. +config SERIAL_BFIN_UART2 + bool "Enable UART2" + depends on SERIAL_BFIN && (BF54x) + help + Enable UART2 + +config BFIN_UART2_CTSRTS + bool "Enable UART2 hardware flow control" + depends on SERIAL_BFIN_UART2 + help + Enable hardware flow control in the driver. Using GPIO emulate the CTS/RTS + signal. + +config UART2_CTS_PIN + int "UART2 CTS pin" + depends on BFIN_UART2_CTSRTS + default -1 + help + Refer to ./include/asm-blackfin/gpio.h to see the GPIO map. + +config UART2_RTS_PIN + int "UART2 RTS pin" + depends on BFIN_UART2_CTSRTS + default -1 + help + Refer to ./include/asm-blackfin/gpio.h to see the GPIO map. + +config SERIAL_BFIN_UART3 + bool "Enable UART3" + depends on SERIAL_BFIN && (BF54x) + help + Enable UART3 + +config BFIN_UART3_CTSRTS + bool "Enable UART3 hardware flow control" + depends on SERIAL_BFIN_UART3 + help + Enable hardware flow control in the driver. Using GPIO emulate the CTS/RTS + signal. + config SERIAL_IMX bool "IMX serial port support" depends on ARM && ARCH_IMX diff --git a/drivers/serial/bfin_5xx.c b/drivers/serial/bfin_5xx.c index f7926dc7fa78..66c92bc36f3d 100644 --- a/drivers/serial/bfin_5xx.c +++ b/drivers/serial/bfin_5xx.c @@ -86,8 +86,21 @@ static void bfin_serial_stop_tx(struct uart_port *port) { struct bfin_serial_port *uart = (struct bfin_serial_port *)port; +#ifdef CONFIG_BF54x + while (!(UART_GET_LSR(uart) & TEMT)) + continue; +#endif + #ifdef CONFIG_SERIAL_BFIN_DMA disable_dma(uart->tx_dma_channel); +#else +#ifdef CONFIG_BF54x + /* Waiting for Transmission Finished */ + while (!(UART_GET_LSR(uart) & TFI)) + continue; + /* Clear TFI bit */ + UART_PUT_LSR(uart, TFI); + UART_CLEAR_IER(uart, ETBEI); #else unsigned short ier; @@ -95,6 +108,7 @@ static void bfin_serial_stop_tx(struct uart_port *port) ier &= ~ETBEI; UART_PUT_IER(uart, ier); #endif +#endif } /* @@ -106,6 +120,9 @@ static void bfin_serial_start_tx(struct uart_port *port) #ifdef CONFIG_SERIAL_BFIN_DMA bfin_serial_dma_tx_chars(uart); +#else +#ifdef CONFIG_BF54x + UART_SET_IER(uart, ETBEI); #else unsigned short ier; ier = UART_GET_IER(uart); @@ -113,6 +130,7 @@ static void bfin_serial_start_tx(struct uart_port *port) UART_PUT_IER(uart, ier); bfin_serial_tx_chars(uart); #endif +#endif } /* @@ -121,6 +139,9 @@ static void bfin_serial_start_tx(struct uart_port *port) static void bfin_serial_stop_rx(struct uart_port *port) { struct bfin_serial_port *uart = (struct bfin_serial_port *)port; +#ifdef CONFIG_BF54x + UART_CLEAR_IER(uart, ERBFI); +#else unsigned short ier; ier = UART_GET_IER(uart); @@ -129,6 +150,7 @@ static void bfin_serial_stop_rx(struct uart_port *port) #endif ier &= ~ERBFI; UART_PUT_IER(uart, ier); +#endif } /* @@ -325,10 +347,21 @@ static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id) { struct bfin_serial_port *uart = dev_id; +#ifdef CONFIG_BF54x + unsigned short status; + spin_lock(&uart->port.lock); + status = UART_GET_LSR(uart); + while ((UART_GET_IER(uart) & ERBFI) && (status & DR)) { + bfin_serial_rx_chars(uart); + status = UART_GET_LSR(uart); + } + spin_unlock(&uart->port.lock); +#else spin_lock(&uart->port.lock); while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_RX_READY) bfin_serial_rx_chars(uart); spin_unlock(&uart->port.lock); +#endif return IRQ_HANDLED; } @@ -336,10 +369,21 @@ static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id) { struct bfin_serial_port *uart = dev_id; +#ifdef CONFIG_BF54x + unsigned short status; + spin_lock(&uart->port.lock); + status = UART_GET_LSR(uart); + while ((UART_GET_IER(uart) & ETBEI) && (status & THRE)) { + bfin_serial_tx_chars(uart); + status = UART_GET_LSR(uart); + } + spin_unlock(&uart->port.lock); +#else spin_lock(&uart->port.lock); while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_TX_READY) bfin_serial_tx_chars(uart); spin_unlock(&uart->port.lock); +#endif return IRQ_HANDLED; } @@ -350,7 +394,6 @@ static void bfin_serial_do_work(struct work_struct *work) bfin_serial_mctrl_check(uart); } - #endif #ifdef CONFIG_SERIAL_BFIN_DMA @@ -399,9 +442,13 @@ static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart) set_dma_x_count(uart->tx_dma_channel, uart->tx_count); set_dma_x_modify(uart->tx_dma_channel, 1); enable_dma(uart->tx_dma_channel); +#ifdef CONFIG_BF54x + UART_SET_IER(uart, ETBEI); +#else ier = UART_GET_IER(uart); ier |= ETBEI; UART_PUT_IER(uart, ier); +#endif spin_unlock_irqrestore(&uart->port.lock, flags); } @@ -481,9 +528,13 @@ static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id) if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) { clear_dma_irqstat(uart->tx_dma_channel); disable_dma(uart->tx_dma_channel); +#ifdef CONFIG_BF54x + UART_CLEAR_IER(uart, ETBEI); +#else ier = UART_GET_IER(uart); ier &= ~ETBEI; UART_PUT_IER(uart, ier); +#endif xmit->tail = (xmit->tail+uart->tx_count) &(UART_XMIT_SIZE -1); uart->port.icount.tx+=uart->tx_count; @@ -665,7 +716,11 @@ static int bfin_serial_startup(struct uart_port *port) return -EBUSY; } #endif +#ifdef CONFIG_BF54x + UART_SET_IER(uart, ERBFI); +#else UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI); +#endif return 0; } @@ -756,29 +811,41 @@ bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios, /* Disable UART */ ier = UART_GET_IER(uart); +#ifdef CONFIG_BF54x + UART_CLEAR_IER(uart, 0xF); +#else UART_PUT_IER(uart, 0); +#endif +#ifndef CONFIG_BF54x /* Set DLAB in LCR to Access DLL and DLH */ val = UART_GET_LCR(uart); val |= DLAB; UART_PUT_LCR(uart, val); SSYNC(); +#endif UART_PUT_DLL(uart, quot & 0xFF); SSYNC(); UART_PUT_DLH(uart, (quot >> 8) & 0xFF); SSYNC(); +#ifndef CONFIG_BF54x /* Clear DLAB in LCR to Access THR RBR IER */ val = UART_GET_LCR(uart); val &= ~DLAB; UART_PUT_LCR(uart, val); SSYNC(); +#endif UART_PUT_LCR(uart, lcr); /* Enable UART */ +#ifdef CONFIG_BF54x + UART_SET_IER(uart, ier); +#else UART_PUT_IER(uart, ier); +#endif val = UART_GET_GCTL(uart); val |= UCEN; @@ -890,15 +957,15 @@ static void __init bfin_serial_init_ports(void) bfin_serial_resource[i].uart_rts_pin; #endif bfin_serial_hw_init(&bfin_serial_ports[i]); - } + } #ifdef CONFIG_SERIAL_BFIN_CONSOLE static void bfin_serial_console_putchar(struct uart_port *port, int ch) { struct bfin_serial_port *uart = (struct bfin_serial_port *)port; - while (!(UART_GET_LSR(uart))) + while (!(UART_GET_LSR(uart) & THRE)) barrier(); UART_PUT_CHAR(uart, ch); SSYNC(); @@ -950,18 +1017,22 @@ bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud, case 2: *bits = 7; break; case 3: *bits = 8; break; } +#ifndef CONFIG_BF54x /* Set DLAB in LCR to Access DLL and DLH */ val = UART_GET_LCR(uart); val |= DLAB; UART_PUT_LCR(uart, val); +#endif dll = UART_GET_DLL(uart); dlh = UART_GET_DLH(uart); +#ifndef CONFIG_BF54x /* Clear DLAB in LCR to Access THR RBR IER */ val = UART_GET_LCR(uart); val &= ~DLAB; UART_PUT_LCR(uart, val); +#endif *baud = get_sclk() / (16*(dll | dlh << 8)); } -- cgit v1.2.3