From e64001e8efc107992fd835770f6383d0dc731594 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 20 Nov 2013 13:17:07 +0000 Subject: ASoC: wm5110: Add extra AIF2 channels Signed-off-by: D.J. Barrow Signed-off-by: Richard Fitzgerald Signed-off-by: Mark Brown --- include/linux/mfd/arizona/registers.h | 121 ++++++++++++++++++++++++++++++++++ 1 file changed, 121 insertions(+) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 4706d3d46e56..8f4c9d77ab20 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -511,6 +511,38 @@ #define ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME 0x74D #define ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE 0x74E #define ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME 0x74F +#define ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE 0x750 +#define ARIZONA_AIF2TX3MIX_INPUT_1_VOLUME 0x751 +#define ARIZONA_AIF2TX3MIX_INPUT_2_SOURCE 0x752 +#define ARIZONA_AIF2TX3MIX_INPUT_2_VOLUME 0x753 +#define ARIZONA_AIF2TX3MIX_INPUT_3_SOURCE 0x754 +#define ARIZONA_AIF2TX3MIX_INPUT_3_VOLUME 0x755 +#define ARIZONA_AIF2TX3MIX_INPUT_4_SOURCE 0x756 +#define ARIZONA_AIF2TX3MIX_INPUT_4_VOLUME 0x757 +#define ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE 0x758 +#define ARIZONA_AIF2TX4MIX_INPUT_1_VOLUME 0x759 +#define ARIZONA_AIF2TX4MIX_INPUT_2_SOURCE 0x75A +#define ARIZONA_AIF2TX4MIX_INPUT_2_VOLUME 0x75B +#define ARIZONA_AIF2TX4MIX_INPUT_3_SOURCE 0x75C +#define ARIZONA_AIF2TX4MIX_INPUT_3_VOLUME 0x75D +#define ARIZONA_AIF2TX4MIX_INPUT_4_SOURCE 0x75E +#define ARIZONA_AIF2TX4MIX_INPUT_4_VOLUME 0x75F +#define ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE 0x760 +#define ARIZONA_AIF2TX5MIX_INPUT_1_VOLUME 0x761 +#define ARIZONA_AIF2TX5MIX_INPUT_2_SOURCE 0x762 +#define ARIZONA_AIF2TX5MIX_INPUT_2_VOLUME 0x763 +#define ARIZONA_AIF2TX5MIX_INPUT_3_SOURCE 0x764 +#define ARIZONA_AIF2TX5MIX_INPUT_3_VOLUME 0x765 +#define ARIZONA_AIF2TX5MIX_INPUT_4_SOURCE 0x766 +#define ARIZONA_AIF2TX5MIX_INPUT_4_VOLUME 0x767 +#define ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE 0x768 +#define ARIZONA_AIF2TX6MIX_INPUT_1_VOLUME 0x769 +#define ARIZONA_AIF2TX6MIX_INPUT_2_SOURCE 0x76A +#define ARIZONA_AIF2TX6MIX_INPUT_2_VOLUME 0x76B +#define ARIZONA_AIF2TX6MIX_INPUT_3_SOURCE 0x76C +#define ARIZONA_AIF2TX6MIX_INPUT_3_VOLUME 0x76D +#define ARIZONA_AIF2TX6MIX_INPUT_4_SOURCE 0x76E +#define ARIZONA_AIF2TX6MIX_INPUT_4_VOLUME 0x76F #define ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE 0x780 #define ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME 0x781 #define ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE 0x782 @@ -3725,6 +3757,35 @@ #define ARIZONA_AIF2TX2_SLOT_SHIFT 0 /* AIF2TX2_SLOT - [5:0] */ #define ARIZONA_AIF2TX2_SLOT_WIDTH 6 /* AIF2TX2_SLOT - [5:0] */ +/* + * R1355 (0x54B) - AIF2 Frame Ctrl 5 + */ +#define ARIZONA_AIF2TX3_SLOT_MASK 0x003F /* AIF2TX3_SLOT - [5:0] */ +#define ARIZONA_AIF2TX3_SLOT_SHIFT 0 /* AIF2TX3_SLOT - [5:0] */ +#define ARIZONA_AIF2TX3_SLOT_WIDTH 6 /* AIF2TX3_SLOT - [5:0] */ + +/* + * R1356 (0x54C) - AIF2 Frame Ctrl 6 + */ +#define ARIZONA_AIF2TX4_SLOT_MASK 0x003F /* AIF2TX4_SLOT - [5:0] */ +#define ARIZONA_AIF2TX4_SLOT_SHIFT 0 /* AIF2TX4_SLOT - [5:0] */ +#define ARIZONA_AIF2TX4_SLOT_WIDTH 6 /* AIF2TX4_SLOT - [5:0] */ + + +/* + * R1357 (0x54D) - AIF2 Frame Ctrl 7 + */ +#define ARIZONA_AIF2TX5_SLOT_MASK 0x003F /* AIF2TX5_SLOT - [5:0] */ +#define ARIZONA_AIF2TX5_SLOT_SHIFT 0 /* AIF2TX5_SLOT - [5:0] */ +#define ARIZONA_AIF2TX5_SLOT_WIDTH 6 /* AIF2TX5_SLOT - [5:0] */ + +/* + * R1358 (0x54E) - AIF2 Frame Ctrl 8 + */ +#define ARIZONA_AIF2TX6_SLOT_MASK 0x003F /* AIF2TX6_SLOT - [5:0] */ +#define ARIZONA_AIF2TX6_SLOT_SHIFT 0 /* AIF2TX6_SLOT - [5:0] */ +#define ARIZONA_AIF2TX6_SLOT_WIDTH 6 /* AIF2TX6_SLOT - [5:0] */ + /* * R1361 (0x551) - AIF2 Frame Ctrl 11 */ @@ -3739,9 +3800,53 @@ #define ARIZONA_AIF2RX2_SLOT_SHIFT 0 /* AIF2RX2_SLOT - [5:0] */ #define ARIZONA_AIF2RX2_SLOT_WIDTH 6 /* AIF2RX2_SLOT - [5:0] */ +/* + * R1363 (0x553) - AIF2 Frame Ctrl 13 + */ +#define ARIZONA_AIF2RX3_SLOT_MASK 0x003F /* AIF2RX3_SLOT - [5:0] */ +#define ARIZONA_AIF2RX3_SLOT_SHIFT 0 /* AIF2RX3_SLOT - [5:0] */ +#define ARIZONA_AIF2RX3_SLOT_WIDTH 6 /* AIF2RX3_SLOT - [5:0] */ + +/* + * R1364 (0x554) - AIF2 Frame Ctrl 14 + */ +#define ARIZONA_AIF2RX4_SLOT_MASK 0x003F /* AIF2RX4_SLOT - [5:0] */ +#define ARIZONA_AIF2RX4_SLOT_SHIFT 0 /* AIF2RX4_SLOT - [5:0] */ +#define ARIZONA_AIF2RX4_SLOT_WIDTH 6 /* AIF2RX4_SLOT - [5:0] */ + +/* + * R1365 (0x555) - AIF2 Frame Ctrl 15 + */ +#define ARIZONA_AIF2RX5_SLOT_MASK 0x003F /* AIF2RX5_SLOT - [5:0] */ +#define ARIZONA_AIF2RX5_SLOT_SHIFT 0 /* AIF2RX5_SLOT - [5:0] */ +#define ARIZONA_AIF2RX5_SLOT_WIDTH 6 /* AIF2RX5_SLOT - [5:0] */ + +/* + * R1366 (0x556) - AIF2 Frame Ctrl 16 + */ +#define ARIZONA_AIF2RX6_SLOT_MASK 0x003F /* AIF2RX6_SLOT - [5:0] */ +#define ARIZONA_AIF2RX6_SLOT_SHIFT 0 /* AIF2RX6_SLOT - [5:0] */ +#define ARIZONA_AIF2RX6_SLOT_WIDTH 6 /* AIF2RX6_SLOT - [5:0] */ + /* * R1369 (0x559) - AIF2 Tx Enables */ +#define ARIZONA_AIF2TX6_ENA 0x0020 /* AIF2TX6_ENA */ +#define ARIZONA_AIF2TX6_ENA_MASK 0x0020 /* AIF2TX6_ENA */ +#define ARIZONA_AIF2TX6_ENA_SHIFT 5 /* AIF2TX6_ENA */ +#define ARIZONA_AIF2TX6_ENA_WIDTH 1 /* AIF2TX6_ENA */ +#define ARIZONA_AIF2TX5_ENA 0x0010 /* AIF2TX5_ENA */ +#define ARIZONA_AIF2TX5_ENA_MASK 0x0010 /* AIF2TX5_ENA */ +#define ARIZONA_AIF2TX5_ENA_SHIFT 4 /* AIF2TX5_ENA */ +#define ARIZONA_AIF2TX5_ENA_WIDTH 1 /* AIF2TX5_ENA */ +#define ARIZONA_AIF2TX4_ENA 0x0008 /* AIF2TX4_ENA */ +#define ARIZONA_AIF2TX4_ENA_MASK 0x0008 /* AIF2TX4_ENA */ +#define ARIZONA_AIF2TX4_ENA_SHIFT 3 /* AIF2TX4_ENA */ +#define ARIZONA_AIF2TX4_ENA_WIDTH 1 /* AIF2TX4_ENA */ +#define ARIZONA_AIF2TX3_ENA 0x0004 /* AIF2TX3_ENA */ +#define ARIZONA_AIF2TX3_ENA_MASK 0x0004 /* AIF2TX3_ENA */ +#define ARIZONA_AIF2TX3_ENA_SHIFT 2 /* AIF2TX3_ENA */ +#define ARIZONA_AIF2TX3_ENA_WIDTH 1 /* AIF2TX3_ENA */ #define ARIZONA_AIF2TX2_ENA 0x0002 /* AIF2TX2_ENA */ #define ARIZONA_AIF2TX2_ENA_MASK 0x0002 /* AIF2TX2_ENA */ #define ARIZONA_AIF2TX2_ENA_SHIFT 1 /* AIF2TX2_ENA */ @@ -3754,6 +3859,22 @@ /* * R1370 (0x55A) - AIF2 Rx Enables */ +#define ARIZONA_AIF2RX6_ENA 0x0020 /* AIF2RX6_ENA */ +#define ARIZONA_AIF2RX6_ENA_MASK 0x0020 /* AIF2RX6_ENA */ +#define ARIZONA_AIF2RX6_ENA_SHIFT 5 /* AIF2RX6_ENA */ +#define ARIZONA_AIF2RX6_ENA_WIDTH 1 /* AIF2RX6_ENA */ +#define ARIZONA_AIF2RX5_ENA 0x0010 /* AIF2RX5_ENA */ +#define ARIZONA_AIF2RX5_ENA_MASK 0x0010 /* AIF2RX5_ENA */ +#define ARIZONA_AIF2RX5_ENA_SHIFT 4 /* AIF2RX5_ENA */ +#define ARIZONA_AIF2RX5_ENA_WIDTH 1 /* AIF2RX5_ENA */ +#define ARIZONA_AIF2RX4_ENA 0x0008 /* AIF2RX4_ENA */ +#define ARIZONA_AIF2RX4_ENA_MASK 0x0008 /* AIF2RX4_ENA */ +#define ARIZONA_AIF2RX4_ENA_SHIFT 3 /* AIF2RX4_ENA */ +#define ARIZONA_AIF2RX4_ENA_WIDTH 1 /* AIF2RX4_ENA */ +#define ARIZONA_AIF2RX3_ENA 0x0004 /* AIF2RX3_ENA */ +#define ARIZONA_AIF2RX3_ENA_MASK 0x0004 /* AIF2RX3_ENA */ +#define ARIZONA_AIF2RX3_ENA_SHIFT 2 /* AIF2RX3_ENA */ +#define ARIZONA_AIF2RX3_ENA_WIDTH 1 /* AIF2RX3_ENA */ #define ARIZONA_AIF2RX2_ENA 0x0002 /* AIF2RX2_ENA */ #define ARIZONA_AIF2RX2_ENA_MASK 0x0002 /* AIF2RX2_ENA */ #define ARIZONA_AIF2RX2_ENA_SHIFT 1 /* AIF2RX2_ENA */ -- cgit v1.2.3 From 254dc326dbfd23c2678fafad1b84fc0e42ac4374 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 19 Nov 2013 16:04:03 +0000 Subject: ASoC: wm5110: Expose input high pass filter controls Acked-by: Mark Brown Signed-off-by: Charles Keepax Signed-off-by: Lee Jones --- include/linux/mfd/arizona/registers.h | 37 +++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 4706d3d46e56..cdf1f5acbe53 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -139,6 +139,7 @@ #define ARIZONA_INPUT_ENABLES_STATUS 0x301 #define ARIZONA_INPUT_RATE 0x308 #define ARIZONA_INPUT_VOLUME_RAMP 0x309 +#define ARIZONA_HPF_CONTROL 0x30C #define ARIZONA_IN1L_CONTROL 0x310 #define ARIZONA_ADC_DIGITAL_VOLUME_1L 0x311 #define ARIZONA_DMIC1L_CONTROL 0x312 @@ -160,6 +161,7 @@ #define ARIZONA_IN4L_CONTROL 0x328 #define ARIZONA_ADC_DIGITAL_VOLUME_4L 0x329 #define ARIZONA_DMIC4L_CONTROL 0x32A +#define ARIZONA_IN4R_CONTROL 0x32C #define ARIZONA_ADC_DIGITAL_VOLUME_4R 0x32D #define ARIZONA_DMIC4R_CONTROL 0x32E #define ARIZONA_OUTPUT_ENABLES_1 0x400 @@ -2292,9 +2294,19 @@ #define ARIZONA_IN_VI_RAMP_SHIFT 0 /* IN_VI_RAMP - [2:0] */ #define ARIZONA_IN_VI_RAMP_WIDTH 3 /* IN_VI_RAMP - [2:0] */ +/* + * R780 (0x30C) - HPF Control + */ +#define ARIZONA_IN_HPF_CUT_MASK 0x0007 /* IN_HPF_CUT [2:0] */ +#define ARIZONA_IN_HPF_CUT_SHIFT 0 /* IN_HPF_CUT [2:0] */ +#define ARIZONA_IN_HPF_CUT_WIDTH 3 /* IN_HPF_CUT [2:0] */ + /* * R784 (0x310) - IN1L Control */ +#define ARIZONA_IN1L_HPF_MASK 0x8000 /* IN1L_HPF - [15] */ +#define ARIZONA_IN1L_HPF_SHIFT 15 /* IN1L_HPF - [15] */ +#define ARIZONA_IN1L_HPF_WIDTH 1 /* IN1L_HPF - [15] */ #define ARIZONA_IN1_OSR_MASK 0x6000 /* IN1_OSR - [14:13] */ #define ARIZONA_IN1_OSR_SHIFT 13 /* IN1_OSR - [14:13] */ #define ARIZONA_IN1_OSR_WIDTH 2 /* IN1_OSR - [14:13] */ @@ -2333,6 +2345,9 @@ /* * R788 (0x314) - IN1R Control */ +#define ARIZONA_IN1R_HPF_MASK 0x8000 /* IN1R_HPF - [15] */ +#define ARIZONA_IN1R_HPF_SHIFT 15 /* IN1R_HPF - [15] */ +#define ARIZONA_IN1R_HPF_WIDTH 1 /* IN1R_HPF - [15] */ #define ARIZONA_IN1R_PGA_VOL_MASK 0x00FE /* IN1R_PGA_VOL - [7:1] */ #define ARIZONA_IN1R_PGA_VOL_SHIFT 1 /* IN1R_PGA_VOL - [7:1] */ #define ARIZONA_IN1R_PGA_VOL_WIDTH 7 /* IN1R_PGA_VOL - [7:1] */ @@ -2362,6 +2377,9 @@ /* * R792 (0x318) - IN2L Control */ +#define ARIZONA_IN2L_HPF_MASK 0x8000 /* IN2L_HPF - [15] */ +#define ARIZONA_IN2L_HPF_SHIFT 15 /* IN2L_HPF - [15] */ +#define ARIZONA_IN2L_HPF_WIDTH 1 /* IN2L_HPF - [15] */ #define ARIZONA_IN2_OSR_MASK 0x6000 /* IN2_OSR - [14:13] */ #define ARIZONA_IN2_OSR_SHIFT 13 /* IN2_OSR - [14:13] */ #define ARIZONA_IN2_OSR_WIDTH 2 /* IN2_OSR - [14:13] */ @@ -2400,6 +2418,9 @@ /* * R796 (0x31C) - IN2R Control */ +#define ARIZONA_IN2R_HPF_MASK 0x8000 /* IN2R_HPF - [15] */ +#define ARIZONA_IN2R_HPF_SHIFT 15 /* IN2R_HPF - [15] */ +#define ARIZONA_IN2R_HPF_WIDTH 1 /* IN2R_HPF - [15] */ #define ARIZONA_IN2R_PGA_VOL_MASK 0x00FE /* IN2R_PGA_VOL - [7:1] */ #define ARIZONA_IN2R_PGA_VOL_SHIFT 1 /* IN2R_PGA_VOL - [7:1] */ #define ARIZONA_IN2R_PGA_VOL_WIDTH 7 /* IN2R_PGA_VOL - [7:1] */ @@ -2429,6 +2450,9 @@ /* * R800 (0x320) - IN3L Control */ +#define ARIZONA_IN3L_HPF_MASK 0x8000 /* IN3L_HPF - [15] */ +#define ARIZONA_IN3L_HPF_SHIFT 15 /* IN3L_HPF - [15] */ +#define ARIZONA_IN3L_HPF_WIDTH 1 /* IN3L_HPF - [15] */ #define ARIZONA_IN3_OSR_MASK 0x6000 /* IN3_OSR - [14:13] */ #define ARIZONA_IN3_OSR_SHIFT 13 /* IN3_OSR - [14:13] */ #define ARIZONA_IN3_OSR_WIDTH 2 /* IN3_OSR - [14:13] */ @@ -2467,6 +2491,9 @@ /* * R804 (0x324) - IN3R Control */ +#define ARIZONA_IN3R_HPF_MASK 0x8000 /* IN3R_HPF - [15] */ +#define ARIZONA_IN3R_HPF_SHIFT 15 /* IN3R_HPF - [15] */ +#define ARIZONA_IN3R_HPF_WIDTH 1 /* IN3R_HPF - [15] */ #define ARIZONA_IN3R_PGA_VOL_MASK 0x00FE /* IN3R_PGA_VOL - [7:1] */ #define ARIZONA_IN3R_PGA_VOL_SHIFT 1 /* IN3R_PGA_VOL - [7:1] */ #define ARIZONA_IN3R_PGA_VOL_WIDTH 7 /* IN3R_PGA_VOL - [7:1] */ @@ -2496,6 +2523,9 @@ /* * R808 (0x328) - IN4 Control */ +#define ARIZONA_IN4L_HPF_MASK 0x8000 /* IN4L_HPF - [15] */ +#define ARIZONA_IN4L_HPF_SHIFT 15 /* IN4L_HPF - [15] */ +#define ARIZONA_IN4L_HPF_WIDTH 1 /* IN4L_HPF - [15] */ #define ARIZONA_IN4_OSR_MASK 0x6000 /* IN4_OSR - [14:13] */ #define ARIZONA_IN4_OSR_SHIFT 13 /* IN4_OSR - [14:13] */ #define ARIZONA_IN4_OSR_WIDTH 2 /* IN4_OSR - [14:13] */ @@ -2525,6 +2555,13 @@ #define ARIZONA_IN4L_DMIC_DLY_SHIFT 0 /* IN4L_DMIC_DLY - [5:0] */ #define ARIZONA_IN4L_DMIC_DLY_WIDTH 6 /* IN4L_DMIC_DLY - [5:0] */ +/* + * R812 (0x32C) - IN4R Control + */ +#define ARIZONA_IN4R_HPF_MASK 0x8000 /* IN4R_HPF - [15] */ +#define ARIZONA_IN4R_HPF_SHIFT 15 /* IN4R_HPF - [15] */ +#define ARIZONA_IN4R_HPF_WIDTH 1 /* IN4R_HPF - [15] */ + /* * R813 (0x32D) - ADC Digital Volume 4R */ -- cgit v1.2.3 From 9aaf880ed4ee3c3cb1aa628e76c177035ce000ae Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Fri, 29 Nov 2013 08:46:32 -0200 Subject: imx-drm: Add mx6 hdmi transmitter support Add mx6 hdmi transmitter support. Original work has been done by Sascha Hauer and Tony Prisk. Special thanks to Russell King for his carefully review, many bug fixes and testing of the mx6 HDMI driver. Tested on the following boards: - mx6q sabresd - mx6dl sabresd - mx6solo wandboard Signed-off-by: Russell King Signed-off-by: Fabio Estevam Signed-off-by: Greg Kroah-Hartman --- include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h index b6d36b38b99c..866e355fa409 100644 --- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h +++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h @@ -212,6 +212,7 @@ #define IMX6Q_GPR3_MIPI_MUX_CTL_IPU1_DI1 (0x1 << 4) #define IMX6Q_GPR3_MIPI_MUX_CTL_IPU2_DI0 (0x2 << 4) #define IMX6Q_GPR3_MIPI_MUX_CTL_IPU2_DI1 (0x3 << 4) +#define IMX6Q_GPR3_HDMI_MUX_CTL_SHIFT 2 #define IMX6Q_GPR3_HDMI_MUX_CTL_MASK (0x3 << 2) #define IMX6Q_GPR3_HDMI_MUX_CTL_IPU1_DI0 (0x0 << 2) #define IMX6Q_GPR3_HDMI_MUX_CTL_IPU1_DI1 (0x1 << 2) -- cgit v1.2.3 From 79b53d199b83a44811cd57091751ef122351ae85 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 10 Dec 2013 10:09:42 +0100 Subject: regulator: s5m8767: Define symbol for buck control mask Replace hard-coded value for mask used in BUCKX_CTRL registers (for BUCKX_EN field) with a symbol. This also removes two local variables. Signed-off-by: Krzysztof Kozlowski Acked-by: Lee Jones Reviewed-by: Sachin Kamat Signed-off-by: Mark Brown --- include/linux/mfd/samsung/s5m8767.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/samsung/s5m8767.h b/include/linux/mfd/samsung/s5m8767.h index 306a95fc558c..9198377ee859 100644 --- a/include/linux/mfd/samsung/s5m8767.h +++ b/include/linux/mfd/samsung/s5m8767.h @@ -183,6 +183,7 @@ enum s5m8767_regulators { S5M8767_REG_MAX, }; -#define S5M8767_ENCTRL_SHIFT 6 +#define S5M8767_ENCTRL_SHIFT 6 +#define S5M8767_ENCTRL_MASK (0x3 << S5M8767_ENCTRL_SHIFT) #endif /* __LINUX_MFD_S5M8767_H */ -- cgit v1.2.3 From f37ff6b6ab9bff6f78dbfbdd123673a09e04cb7f Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 17 Dec 2013 14:23:17 +0100 Subject: regulator: s5m8767: Add symbols for hard-coded DVS_RAMP register Add symbols for hard-coded values of BUCK_RAMP field in DVS_RAMP register. This simplifies a little the code as register update is called only once. Signed-off-by: Krzysztof Kozlowski Acked-by: Lee Jones Signed-off-by: Mark Brown --- include/linux/mfd/samsung/s5m8767.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/samsung/s5m8767.h b/include/linux/mfd/samsung/s5m8767.h index 9198377ee859..2ab0b0f03641 100644 --- a/include/linux/mfd/samsung/s5m8767.h +++ b/include/linux/mfd/samsung/s5m8767.h @@ -186,4 +186,19 @@ enum s5m8767_regulators { #define S5M8767_ENCTRL_SHIFT 6 #define S5M8767_ENCTRL_MASK (0x3 << S5M8767_ENCTRL_SHIFT) +/* + * Values for BUCK_RAMP field in DVS_RAMP register, matching raw values + * in mV/us. + */ +enum s5m8767_dvs_buck_ramp_values { + S5M8767_DVS_BUCK_RAMP_5 = 0x4, + S5M8767_DVS_BUCK_RAMP_10 = 0x9, + S5M8767_DVS_BUCK_RAMP_12_5 = 0xb, + S5M8767_DVS_BUCK_RAMP_25 = 0xd, + S5M8767_DVS_BUCK_RAMP_50 = 0xe, + S5M8767_DVS_BUCK_RAMP_100 = 0xf, +}; +#define S5M8767_DVS_BUCK_RAMP_SHIFT 4 +#define S5M8767_DVS_BUCK_RAMP_MASK (0xf << S5M8767_DVS_BUCK_RAMP_SHIFT) + #endif /* __LINUX_MFD_S5M8767_H */ -- cgit v1.2.3 From ee5182b59f65e7975d8fec73d511f4d6c44f6ed3 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 17 Dec 2013 14:23:19 +0100 Subject: mfd: sec: Remove sec_reg* regmap helpers Remove sec_reg* helpers as they are not used anymore. These helpers were error-prone as they mixed u8 with unsigned int and they changed order of some of parameters (val and mask in sec_reg_update()). Also the helpers didn't give any way of useful abstraction as they just called corresponding regmap function. Signed-off-by: Krzysztof Kozlowski Acked-by: Lee Jones Signed-off-by: Mark Brown --- include/linux/mfd/samsung/core.h | 6 ------ 1 file changed, 6 deletions(-) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/core.h index cab2dd279076..41c9bde410c5 100644 --- a/include/linux/mfd/samsung/core.h +++ b/include/linux/mfd/samsung/core.h @@ -59,12 +59,6 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic); void sec_irq_exit(struct sec_pmic_dev *sec_pmic); int sec_irq_resume(struct sec_pmic_dev *sec_pmic); -extern int sec_reg_read(struct sec_pmic_dev *sec_pmic, u8 reg, void *dest); -extern int sec_bulk_read(struct sec_pmic_dev *sec_pmic, u8 reg, int count, u8 *buf); -extern int sec_reg_write(struct sec_pmic_dev *sec_pmic, u8 reg, u8 value); -extern int sec_bulk_write(struct sec_pmic_dev *sec_pmic, u8 reg, int count, u8 *buf); -extern int sec_reg_update(struct sec_pmic_dev *sec_pmic, u8 reg, u8 val, u8 mask); - struct sec_platform_data { struct sec_regulator_data *regulators; struct sec_opmode_data *opmode; -- cgit v1.2.3 From 792b62e705048f4da9a6f570c15093ab669839b6 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 19 Dec 2013 09:11:01 +0000 Subject: mfd: wm5110: Expose DRE control registers Certain use-cases require the DRE to be disabled so expose registers necessary to control the DRE enables. Signed-off-by: Charles Keepax Acked-by: Lee Jones Signed-off-by: Mark Brown --- include/linux/mfd/arizona/registers.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 89878149a43f..22916c0f1ca4 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -3207,6 +3207,10 @@ /* * R1088 (0x440) - DRE Enable */ +#define ARIZONA_DRE3R_ENA 0x0020 /* DRE3R_ENA */ +#define ARIZONA_DRE3R_ENA_MASK 0x0020 /* DRE3R_ENA */ +#define ARIZONA_DRE3R_ENA_SHIFT 5 /* DRE3R_ENA */ +#define ARIZONA_DRE3R_ENA_WIDTH 1 /* DRE3R_ENA */ #define ARIZONA_DRE3L_ENA 0x0010 /* DRE3L_ENA */ #define ARIZONA_DRE3L_ENA_MASK 0x0010 /* DRE3L_ENA */ #define ARIZONA_DRE3L_ENA_SHIFT 4 /* DRE3L_ENA */ -- cgit v1.2.3 From 03746dcbde75fc2b0ee8a9d65e3fb3efee8deb4a Mon Sep 17 00:00:00 2001 From: Markus Pargmann Date: Fri, 20 Dec 2013 12:43:27 +0100 Subject: regulator: tps65910: Add backup battery regulator tps65910 has a backup battery charger with a configurable voltage. This patch adds a regulator for the backup battery. Signed-off-by: Markus Pargmann Signed-off-by: Mark Brown --- include/linux/mfd/tps65910.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/tps65910.h b/include/linux/mfd/tps65910.h index 20e433e551e3..1adeee186194 100644 --- a/include/linux/mfd/tps65910.h +++ b/include/linux/mfd/tps65910.h @@ -833,6 +833,7 @@ #define TPS65910_REG_VAUX2 10 #define TPS65910_REG_VAUX33 11 #define TPS65910_REG_VMMC 12 +#define TPS65910_REG_VBB 13 #define TPS65911_REG_VDDCTRL 4 #define TPS65911_REG_LDO1 5 @@ -845,7 +846,7 @@ #define TPS65911_REG_LDO8 12 /* Max number of TPS65910/11 regulators */ -#define TPS65910_NUM_REGS 13 +#define TPS65910_NUM_REGS 14 /* External sleep controls through EN1/EN2/EN3/SLEEP inputs */ #define TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 0x1 -- cgit v1.2.3 From b8903eb9836e4e968d1bf9758b501de2c38cfb83 Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Sun, 29 Dec 2013 17:00:20 +0800 Subject: regulator: tps65910: Simplify setting enable_mask for regulators BBCH_BBCHEN_MASK is equivalent to TPS65910_SUPPLY_STATE_ENABLED. So all regulators have the same enable_mask setting. BBCH_BBCHEN_MASK and BBCH_BBCHEN_SHIFT are not used now, remove them. Signed-off-by: Axel Lin Signed-off-by: Mark Brown --- include/linux/mfd/tps65910.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/tps65910.h b/include/linux/mfd/tps65910.h index 1adeee186194..16c2335c2856 100644 --- a/include/linux/mfd/tps65910.h +++ b/include/linux/mfd/tps65910.h @@ -358,8 +358,6 @@ /*Register BBCH (0x80) register.RegisterDescription */ #define BBCH_BBSEL_MASK 0x06 #define BBCH_BBSEL_SHIFT 1 -#define BBCH_BBCHEN_MASK 0x01 -#define BBCH_BBCHEN_SHIFT 0 /*Register DCDCCTRL (0x80) register.RegisterDescription */ -- cgit v1.2.3 From 762a8ee808972354ce4bca988309aa7fb63ed5ae Mon Sep 17 00:00:00 2001 From: Andrew Bresticker Date: Thu, 26 Dec 2013 13:48:46 -0800 Subject: regulator: as3722: detect SD0 low-voltage mode SD0 may operate in low-voltage mode, with a minimum of 0.41V and a maximum of 1.5V. This is indicated by bit 4 of FUSE7. Signed-off-by: Andrew Bresticker Signed-off-by: Vince Hsu broonie.e6264@m.evernote.com Signed-off-by: Mark Brown --- include/linux/mfd/as3722.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/as3722.h b/include/linux/mfd/as3722.h index 16bf8a0dcd97..bb9616dc0efa 100644 --- a/include/linux/mfd/as3722.h +++ b/include/linux/mfd/as3722.h @@ -151,6 +151,7 @@ #define AS3722_ASIC_ID1_REG 0x90 #define AS3722_ASIC_ID2_REG 0x91 #define AS3722_LOCK_REG 0x9E +#define AS3722_FUSE7_REG 0xA7 #define AS3722_MAX_REGISTER 0xF4 #define AS3722_SD0_EXT_ENABLE_MASK 0x03 @@ -224,6 +225,7 @@ #define AS3722_SD_VSEL_MASK 0x7F #define AS3722_SD0_VSEL_MIN 0x01 #define AS3722_SD0_VSEL_MAX 0x5A +#define AS3722_SD0_VSEL_LOW_VOL_MAX 0x6E #define AS3722_SD2_VSEL_MIN 0x01 #define AS3722_SD2_VSEL_MAX 0x7F @@ -341,6 +343,8 @@ #define AS3722_EXT_CONTROL_ENABLE2 0x2 #define AS3722_EXT_CONTROL_ENABLE3 0x3 +#define AS3722_FUSE7_SD0_LOW_VOLTAGE BIT(4) + /* Interrupt IDs */ enum as3722_irq { AS3722_IRQ_LID, -- cgit v1.2.3 From ffae24fed8a83afd5682865e0262731eac369a5b Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 14 Nov 2013 16:18:21 +0000 Subject: extcon: arizona: Add defines for microphone detection levels Improve readability by creating a define for each microphone detection level. Acked-by: Lee Jones Signed-off-by: Charles Keepax Signed-off-by: Chanwoo Choi --- include/linux/mfd/arizona/registers.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index cb49417f8ba9..b31976595eba 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -2196,6 +2196,15 @@ /* * R677 (0x2A5) - Mic Detect 3 */ +#define ARIZONA_MICD_LVL_0 0x0004 /* MICD_LVL - [2] */ +#define ARIZONA_MICD_LVL_1 0x0008 /* MICD_LVL - [3] */ +#define ARIZONA_MICD_LVL_2 0x0010 /* MICD_LVL - [4] */ +#define ARIZONA_MICD_LVL_3 0x0020 /* MICD_LVL - [5] */ +#define ARIZONA_MICD_LVL_4 0x0040 /* MICD_LVL - [6] */ +#define ARIZONA_MICD_LVL_5 0x0080 /* MICD_LVL - [7] */ +#define ARIZONA_MICD_LVL_6 0x0100 /* MICD_LVL - [8] */ +#define ARIZONA_MICD_LVL_7 0x0200 /* MICD_LVL - [9] */ +#define ARIZONA_MICD_LVL_8 0x0400 /* MICD_LVL - [10] */ #define ARIZONA_MICD_LVL_MASK 0x07FC /* MICD_LVL - [10:2] */ #define ARIZONA_MICD_LVL_SHIFT 2 /* MICD_LVL - [10:2] */ #define ARIZONA_MICD_LVL_WIDTH 9 /* MICD_LVL - [10:2] */ -- cgit v1.2.3 From 3466bd2273b81a0a29d0e134ba1c78b64b84f40b Mon Sep 17 00:00:00 2001 From: Sebastian Andrzej Siewior Date: Thu, 19 Dec 2013 16:28:28 +0100 Subject: mfd: ti_am335x_tscadc: Make am335x_tsc_se_update() local Since the "recent" changes, am335x_tsc_se_update() has no longer any users outside of this file so make it local. Signed-off-by: Sebastian Andrzej Siewior Signed-off-by: Lee Jones --- include/linux/mfd/ti_am335x_tscadc.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/ti_am335x_tscadc.h b/include/linux/mfd/ti_am335x_tscadc.h index d498d98f0c2c..1fe72199e670 100644 --- a/include/linux/mfd/ti_am335x_tscadc.h +++ b/include/linux/mfd/ti_am335x_tscadc.h @@ -176,7 +176,6 @@ static inline struct ti_tscadc_dev *ti_tscadc_dev_get(struct platform_device *p) return *tscadc_dev; } -void am335x_tsc_se_update(struct ti_tscadc_dev *tsadc); void am335x_tsc_se_set(struct ti_tscadc_dev *tsadc, u32 val); void am335x_tsc_se_clr(struct ti_tscadc_dev *tsadc, u32 val); -- cgit v1.2.3 From 7e170c6e4f7501bea900aa66b2b27a6ce5001e25 Mon Sep 17 00:00:00 2001 From: Sebastian Andrzej Siewior Date: Thu, 19 Dec 2013 16:28:29 +0100 Subject: mfd: ti_am335x_tscadc: Don't read back REG_SE The purpose of reg_se_cache has been defeated. It should avoid the read-back of the register to avoid the latency and the fact that the bits are reset to 0 after the individual conversation took place. The reason why this is required like this to work, is that read-back of the register removes the bits of the ADC so they do not start another conversation after the register is re-written from the TSC side for the update. To avoid the not required read-back I introduce a "set once" variant which does not update the cache mask. After the conversation completes, the bit is removed from the SE register anyway and we don't plan a new conversation "any time soon". The current set function is renamed to set_cache to distinguish the two operations. This is a small preparation for a larger sync-rework. Signed-off-by: Sebastian Andrzej Siewior Acked-by: Dmitry Torokhov Acked-by: Jonathan Cameron Signed-off-by: Lee Jones --- include/linux/mfd/ti_am335x_tscadc.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/ti_am335x_tscadc.h b/include/linux/mfd/ti_am335x_tscadc.h index 1fe72199e670..2fa9c0613da4 100644 --- a/include/linux/mfd/ti_am335x_tscadc.h +++ b/include/linux/mfd/ti_am335x_tscadc.h @@ -176,7 +176,8 @@ static inline struct ti_tscadc_dev *ti_tscadc_dev_get(struct platform_device *p) return *tscadc_dev; } -void am335x_tsc_se_set(struct ti_tscadc_dev *tsadc, u32 val); +void am335x_tsc_se_set_cache(struct ti_tscadc_dev *tsadc, u32 val); +void am335x_tsc_se_set_once(struct ti_tscadc_dev *tsadc, u32 val); void am335x_tsc_se_clr(struct ti_tscadc_dev *tsadc, u32 val); #endif -- cgit v1.2.3 From 7ca6740cd1cd410828a01151a044b51910d06eff Mon Sep 17 00:00:00 2001 From: Sebastian Andrzej Siewior Date: Thu, 19 Dec 2013 16:28:31 +0100 Subject: mfd: input: iio: ti_amm335x: Rework TSC/ADC synchronization The ADC driver always programs all possible ADC values and discards them except for the value IIO asked for. On the am335x-evm the driver programs four values and it takes 500us to gather them. Reducing the number of conversations down to the (required) one also reduces the busy loop down to 125us. This leads to another error, namely the FIFOCOUNT register is sometimes (like one out of 10 attempts) not updated in time leading to EBUSY. The next read has the FIFOCOUNT register updated. Checking for the ADCSTAT register for being idle isn't a good choice either. The problem is that if TSC is used at the same time, the HW completes the conversation for ADC *and* before the driver noticed it, the HW begins to perform a TSC conversation and so the driver never seen the HW idle. The next time we would have two values in the FIFO but since the driver reads everything we always see the current one. So instead of polling for the IDLE bit in ADCStatus register, we should check the FIFOCOUNT register. It should be one instead of zero because we request one value. This change in turn leads to another error. Sometimes if TSC & ADC are used together the TSC starts generating interrupts even if nobody actually touched the touchscreen. The interrupts seem valid because TSC's FIFO is filled with values for each channel of the TSC. This condition stops after a few ADC reads but will occur again. Not good. On top of this (even without the changes I just mentioned) there is a ADC & TSC lockup condition which was reported to me by Jeff Lance including the following test case: A busy loop of "cat /sys/bus/iio/devices/iio\:device0/in_voltage4_raw" and a mug on touch screen. With this setup, the hardware will lockup after something between 20 minutes and it could take up to a couple of hours. During that lockup, the ADCSTAT register says 0x30 (or 0x70) which means STEP_ID = IDLE and FSM_BUSY = yes. That means the hardware says that it is idle and busy at the same time which is an invalid condition. For all this reasons I decided to rework this TSC/ADC part and add a handshake / synchronization here: First the ADC signals that it needs the HW and writes a 0 mask into the SE register. The HW (if active) will complete the current conversation and become idle. The TSC driver will gather the values from the FIFO (woken up by an interrupt) and won't "enable" another conversation. Instead it will wake up the ADC driver which is already waiting. The ADC driver will start "its" conversation and once it is done, it will enable the TSC steps so the TSC will work again. After this rework I haven't observed the lockup so far. Plus the busy loop has been reduced from 500us to 125us. The continues-read mode remains unchanged. Signed-off-by: Sebastian Andrzej Siewior Acked-by: Jonathan Cameron Signed-off-by: Lee Jones --- include/linux/mfd/ti_am335x_tscadc.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/ti_am335x_tscadc.h b/include/linux/mfd/ti_am335x_tscadc.h index 2fa9c0613da4..fb96c84dada5 100644 --- a/include/linux/mfd/ti_am335x_tscadc.h +++ b/include/linux/mfd/ti_am335x_tscadc.h @@ -159,6 +159,9 @@ struct ti_tscadc_dev { int adc_cell; /* -1 if not used */ struct mfd_cell cells[TSCADC_CELLS]; u32 reg_se_cache; + bool adc_waiting; + bool adc_in_use; + wait_queue_head_t reg_se_wait; spinlock_t reg_lock; unsigned int clk_div; @@ -179,5 +182,6 @@ static inline struct ti_tscadc_dev *ti_tscadc_dev_get(struct platform_device *p) void am335x_tsc_se_set_cache(struct ti_tscadc_dev *tsadc, u32 val); void am335x_tsc_se_set_once(struct ti_tscadc_dev *tsadc, u32 val); void am335x_tsc_se_clr(struct ti_tscadc_dev *tsadc, u32 val); +void am335x_tsc_se_adc_done(struct ti_tscadc_dev *tsadc); #endif -- cgit v1.2.3 From 08e2d592582e6b780bd925efcdb4971bf173f39a Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 9 Jan 2014 14:29:24 +0000 Subject: mfd: wm5110: Add registers for headphone short circuit control Add the registers necessary to enable/disable the headphone short circuit protection. Signed-off-by: Charles Keepax Acked-by: Lee Jones Signed-off-by: Mark Brown --- include/linux/mfd/arizona/registers.h | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 22916c0f1ca4..19883aeb1ac8 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -226,6 +226,9 @@ #define ARIZONA_PDM_SPK1_CTRL_2 0x491 #define ARIZONA_PDM_SPK2_CTRL_1 0x492 #define ARIZONA_PDM_SPK2_CTRL_2 0x493 +#define ARIZONA_HP1_SHORT_CIRCUIT_CTRL 0x4A0 +#define ARIZONA_HP2_SHORT_CIRCUIT_CTRL 0x4A1 +#define ARIZONA_HP3_SHORT_CIRCUIT_CTRL 0x4A2 #define ARIZONA_SPK_CTRL_2 0x4B5 #define ARIZONA_SPK_CTRL_3 0x4B6 #define ARIZONA_DAC_COMP_1 0x4DC @@ -3332,6 +3335,30 @@ #define ARIZONA_SPK2_FMT_SHIFT 0 /* SPK2_FMT */ #define ARIZONA_SPK2_FMT_WIDTH 1 /* SPK2_FMT */ +/* + * R1184 (0x4A0) - HP1 Short Circuit Ctrl + */ +#define ARIZONA_HP1_SC_ENA 0x1000 /* HP1_SC_ENA */ +#define ARIZONA_HP1_SC_ENA_MASK 0x1000 /* HP1_SC_ENA */ +#define ARIZONA_HP1_SC_ENA_SHIFT 12 /* HP1_SC_ENA */ +#define ARIZONA_HP1_SC_ENA_WIDTH 1 /* HP1_SC_ENA */ + +/* + * R1185 (0x4A1) - HP2 Short Circuit Ctrl + */ +#define ARIZONA_HP2_SC_ENA 0x1000 /* HP2_SC_ENA */ +#define ARIZONA_HP2_SC_ENA_MASK 0x1000 /* HP2_SC_ENA */ +#define ARIZONA_HP2_SC_ENA_SHIFT 12 /* HP2_SC_ENA */ +#define ARIZONA_HP2_SC_ENA_WIDTH 1 /* HP2_SC_ENA */ + +/* + * R1186 (0x4A2) - HP3 Short Circuit Ctrl + */ +#define ARIZONA_HP3_SC_ENA 0x1000 /* HP3_SC_ENA */ +#define ARIZONA_HP3_SC_ENA_MASK 0x1000 /* HP3_SC_ENA */ +#define ARIZONA_HP3_SC_ENA_SHIFT 12 /* HP3_SC_ENA */ +#define ARIZONA_HP3_SC_ENA_WIDTH 1 /* HP3_SC_ENA */ + /* * R1244 (0x4DC) - DAC comp 1 */ -- cgit v1.2.3 From 3b159a6e955c8d468f4ffa212c8b5d68d8323a8d Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Wed, 20 Nov 2013 00:30:55 -0800 Subject: mmc: tmio: bus_shift become tmio_mmc_data member .bus_shift is used to 16/32bit register access offset calculation on tmio driver. tmio_mmc_xxx is used from Toshiba/Renesas now, but this bus_shift value depends on HW IP. This patch moves .bus_shift to tmio_mmc_data member and sets it on each driver. Signed-off-by: Kuninori Morimoto Signed-off-by: Chris Ball --- include/linux/mfd/tmio.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h index b22883d60500..92f72cf5311f 100644 --- a/include/linux/mfd/tmio.h +++ b/include/linux/mfd/tmio.h @@ -102,6 +102,7 @@ struct tmio_mmc_data { unsigned long capabilities; unsigned long capabilities2; unsigned long flags; + unsigned long bus_shift; u32 ocr_mask; /* available voltages */ struct tmio_mmc_dma *dma; struct device *dev; -- cgit v1.2.3 From 5d60e500541ed154112809627f12d86056ac5f09 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Wed, 20 Nov 2013 00:31:06 -0800 Subject: mmc: tmio: add new TMIO_MMC_HAVE_HIGH_REG flags The accessibility checking method to the higher register was added by 69d1fe18e92afb (mmc: tmio: only access registers above 0xff, if available) But, it doesn't care 32bit register. It is impossible to calculate it from the resource size, since there is 16/32 bit register IP (e.g. VERSION is located on 0xe2 if 16bit register, but it is located on 0x1c4 if 32bit register). This patch adds new TMIO_MMC_HAVE_HIGH_REG flags, tmio_mmc driver has it, and sh_mobile_sdhi doesn't have it today. Signed-off-by: Kuninori Morimoto Signed-off-by: Chris Ball --- include/linux/mfd/tmio.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h index 92f72cf5311f..8f6f2e91e7ae 100644 --- a/include/linux/mfd/tmio.h +++ b/include/linux/mfd/tmio.h @@ -76,6 +76,13 @@ */ #define TMIO_MMC_USE_GPIO_CD (1 << 5) +/* + * Some controllers doesn't have over 0x100 register. + * it is used to checking accessibility of + * CTL_SD_CARD_CLK_CTL / CTL_CLK_AND_WAIT_CTL + */ +#define TMIO_MMC_HAVE_HIGH_REG (1 << 6) + int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base); int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base); void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state); -- cgit v1.2.3 From f8720e5ec752c33259c7c14349945d5feb069229 Mon Sep 17 00:00:00 2001 From: Mallikarjun Kasoju Date: Tue, 7 Jan 2014 14:10:56 +0530 Subject: pinctrl: as3722: Set pin to output mode for some function If pins are used for function output like pwm, clk32k, power good etc then set it as output mode default. Signed-off-by: Mallikarjun Kasoju Signed-off-by: Laxman Dewangan Acked-by: Lee Jones Signed-off-by: Linus Walleij --- include/linux/mfd/as3722.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/as3722.h b/include/linux/mfd/as3722.h index 16bf8a0dcd97..f654a7a42260 100644 --- a/include/linux/mfd/as3722.h +++ b/include/linux/mfd/as3722.h @@ -314,6 +314,7 @@ #define AS3722_GPIO_IOSF_GPIO_INTERRUPT_IN AS3722_GPIO_IOSF_VAL(3) #define AS3722_GPIO_IOSF_ISINK_PWM_IN AS3722_GPIO_IOSF_VAL(4) #define AS3722_GPIO_IOSF_VOLTAGE_STBY AS3722_GPIO_IOSF_VAL(5) +#define AS3722_GPIO_IOSF_SD0_OUT AS3722_GPIO_IOSF_VAL(6) #define AS3722_GPIO_IOSF_PWR_GOOD_OUT AS3722_GPIO_IOSF_VAL(7) #define AS3722_GPIO_IOSF_Q32K_OUT AS3722_GPIO_IOSF_VAL(8) #define AS3722_GPIO_IOSF_WATCHDOG_IN AS3722_GPIO_IOSF_VAL(9) -- cgit v1.2.3 From 3008ddbe061b0f1d5c8ffbb599f105b67cf06637 Mon Sep 17 00:00:00 2001 From: Chanwoo Choi Date: Fri, 22 Nov 2013 16:51:05 +0100 Subject: mfd: max14577: Add max14577 MFD driver core This patch adds max14577 core/irq driver to support MUIC(Micro USB IC) device and charger device and support irq domain method to control internal interrupt of max14577 device. Also, this patch supports DT binding with max14577_i2c_parse_dt(). The MAXIM 14577 chip contains Micro-USB Interface Circuit and Li+ Battery Charger. It contains accessory and USB charger detection logic. It supports USB 2.0 Hi-Speed, UART and stereo audio signals over Micro-USB connector. The battery charger is compliant with the USB Battery Charging Specification Revision 1.1. It has also SFOUT LDO output for powering USB devices. Reviewed-by: Mark Brown Signed-off-by: Chanwoo Choi Signed-off-by: Krzysztof Kozlowski Signed-off-by: Kyungmin Park Signed-off-by: Lee Jones --- include/linux/mfd/max14577-private.h | 330 +++++++++++++++++++++++++++++++++++ include/linux/mfd/max14577.h | 69 ++++++++ 2 files changed, 399 insertions(+) create mode 100644 include/linux/mfd/max14577-private.h create mode 100644 include/linux/mfd/max14577.h (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/max14577-private.h b/include/linux/mfd/max14577-private.h new file mode 100644 index 000000000000..a3d0185196d3 --- /dev/null +++ b/include/linux/mfd/max14577-private.h @@ -0,0 +1,330 @@ +/* + * max14577-private.h - Common API for the Maxim 14577 internal sub chip + * + * Copyright (C) 2013 Samsung Electrnoics + * Chanwoo Choi + * Krzysztof Kozlowski + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __MAX14577_PRIVATE_H__ +#define __MAX14577_PRIVATE_H__ + +#include +#include + +#define MAX14577_REG_INVALID (0xff) + +/* Slave addr = 0x4A: Interrupt */ +enum max14577_reg { + MAX14577_REG_DEVICEID = 0x00, + MAX14577_REG_INT1 = 0x01, + MAX14577_REG_INT2 = 0x02, + MAX14577_REG_INT3 = 0x03, + MAX14577_REG_STATUS1 = 0x04, + MAX14577_REG_STATUS2 = 0x05, + MAX14577_REG_STATUS3 = 0x06, + MAX14577_REG_INTMASK1 = 0x07, + MAX14577_REG_INTMASK2 = 0x08, + MAX14577_REG_INTMASK3 = 0x09, + MAX14577_REG_CDETCTRL1 = 0x0A, + MAX14577_REG_RFU = 0x0B, + MAX14577_REG_CONTROL1 = 0x0C, + MAX14577_REG_CONTROL2 = 0x0D, + MAX14577_REG_CONTROL3 = 0x0E, + MAX14577_REG_CHGCTRL1 = 0x0F, + MAX14577_REG_CHGCTRL2 = 0x10, + MAX14577_REG_CHGCTRL3 = 0x11, + MAX14577_REG_CHGCTRL4 = 0x12, + MAX14577_REG_CHGCTRL5 = 0x13, + MAX14577_REG_CHGCTRL6 = 0x14, + MAX14577_REG_CHGCTRL7 = 0x15, + + MAX14577_REG_END, +}; + +/* Slave addr = 0x4A: MUIC */ +enum max14577_muic_reg { + MAX14577_MUIC_REG_STATUS1 = 0x04, + MAX14577_MUIC_REG_STATUS2 = 0x05, + MAX14577_MUIC_REG_CONTROL1 = 0x0C, + MAX14577_MUIC_REG_CONTROL3 = 0x0E, + + MAX14577_MUIC_REG_END, +}; + +enum max14577_muic_charger_type { + MAX14577_CHARGER_TYPE_NONE = 0, + MAX14577_CHARGER_TYPE_USB, + MAX14577_CHARGER_TYPE_DOWNSTREAM_PORT, + MAX14577_CHARGER_TYPE_DEDICATED_CHG, + MAX14577_CHARGER_TYPE_SPECIAL_500MA, + MAX14577_CHARGER_TYPE_SPECIAL_1A, + MAX14577_CHARGER_TYPE_RESERVED, + MAX14577_CHARGER_TYPE_DEAD_BATTERY = 7, +}; + +/* MAX14577 interrupts */ +#define INT1_ADC_MASK (0x1 << 0) +#define INT1_ADCLOW_MASK (0x1 << 1) +#define INT1_ADCERR_MASK (0x1 << 2) + +#define INT2_CHGTYP_MASK (0x1 << 0) +#define INT2_CHGDETRUN_MASK (0x1 << 1) +#define INT2_DCDTMR_MASK (0x1 << 2) +#define INT2_DBCHG_MASK (0x1 << 3) +#define INT2_VBVOLT_MASK (0x1 << 4) + +#define INT3_EOC_MASK (0x1 << 0) +#define INT3_CGMBC_MASK (0x1 << 1) +#define INT3_OVP_MASK (0x1 << 2) +#define INT3_MBCCHGERR_MASK (0x1 << 3) + +/* MAX14577 DEVICE ID register */ +#define DEVID_VENDORID_SHIFT 0 +#define DEVID_DEVICEID_SHIFT 3 +#define DEVID_VENDORID_MASK (0x07 << DEVID_VENDORID_SHIFT) +#define DEVID_DEVICEID_MASK (0x1f << DEVID_DEVICEID_SHIFT) + +/* MAX14577 STATUS1 register */ +#define STATUS1_ADC_SHIFT 0 +#define STATUS1_ADCLOW_SHIFT 5 +#define STATUS1_ADCERR_SHIFT 6 +#define STATUS1_ADC_MASK (0x1f << STATUS1_ADC_SHIFT) +#define STATUS1_ADCLOW_MASK (0x1 << STATUS1_ADCLOW_SHIFT) +#define STATUS1_ADCERR_MASK (0x1 << STATUS1_ADCERR_SHIFT) + +/* MAX14577 STATUS2 register */ +#define STATUS2_CHGTYP_SHIFT 0 +#define STATUS2_CHGDETRUN_SHIFT 3 +#define STATUS2_DCDTMR_SHIFT 4 +#define STATUS2_DBCHG_SHIFT 5 +#define STATUS2_VBVOLT_SHIFT 6 +#define STATUS2_CHGTYP_MASK (0x7 << STATUS2_CHGTYP_SHIFT) +#define STATUS2_CHGDETRUN_MASK (0x1 << STATUS2_CHGDETRUN_SHIFT) +#define STATUS2_DCDTMR_MASK (0x1 << STATUS2_DCDTMR_SHIFT) +#define STATUS2_DBCHG_MASK (0x1 << STATUS2_DBCHG_SHIFT) +#define STATUS2_VBVOLT_MASK (0x1 << STATUS2_VBVOLT_SHIFT) + +/* MAX14577 CONTROL1 register */ +#define COMN1SW_SHIFT 0 +#define COMP2SW_SHIFT 3 +#define MICEN_SHIFT 6 +#define IDBEN_SHIFT 7 +#define COMN1SW_MASK (0x7 << COMN1SW_SHIFT) +#define COMP2SW_MASK (0x7 << COMP2SW_SHIFT) +#define MICEN_MASK (0x1 << MICEN_SHIFT) +#define IDBEN_MASK (0x1 << IDBEN_SHIFT) +#define CLEAR_IDBEN_MICEN_MASK (COMN1SW_MASK | COMP2SW_MASK) +#define CTRL1_SW_USB ((1 << COMP2SW_SHIFT) \ + | (1 << COMN1SW_SHIFT)) +#define CTRL1_SW_AUDIO ((2 << COMP2SW_SHIFT) \ + | (2 << COMN1SW_SHIFT)) +#define CTRL1_SW_UART ((3 << COMP2SW_SHIFT) \ + | (3 << COMN1SW_SHIFT)) +#define CTRL1_SW_OPEN ((0 << COMP2SW_SHIFT) \ + | (0 << COMN1SW_SHIFT)) + +/* MAX14577 CONTROL2 register */ +#define CTRL2_LOWPWR_SHIFT (0) +#define CTRL2_ADCEN_SHIFT (1) +#define CTRL2_CPEN_SHIFT (2) +#define CTRL2_SFOUTASRT_SHIFT (3) +#define CTRL2_SFOUTORD_SHIFT (4) +#define CTRL2_ACCDET_SHIFT (5) +#define CTRL2_USBCPINT_SHIFT (6) +#define CTRL2_RCPS_SHIFT (7) +#define CTRL2_LOWPWR_MASK (0x1 << CTRL2_LOWPWR_SHIFT) +#define CTRL2_ADCEN_MASK (0x1 << CTRL2_ADCEN_SHIFT) +#define CTRL2_CPEN_MASK (0x1 << CTRL2_CPEN_SHIFT) +#define CTRL2_SFOUTASRT_MASK (0x1 << CTRL2_SFOUTASRT_SHIFT) +#define CTRL2_SFOUTORD_MASK (0x1 << CTRL2_SFOUTORD_SHIFT) +#define CTRL2_ACCDET_MASK (0x1 << CTRL2_ACCDET_SHIFT) +#define CTRL2_USBCPINT_MASK (0x1 << CTRL2_USBCPINT_SHIFT) +#define CTRL2_RCPS_MASK (0x1 << CTR2_RCPS_SHIFT) + +#define CTRL2_CPEN1_LOWPWR0 ((1 << CTRL2_CPEN_SHIFT) | \ + (0 << CTRL2_LOWPWR_SHIFT)) +#define CTRL2_CPEN0_LOWPWR1 ((0 << CTRL2_CPEN_SHIFT) | \ + (1 << CTRL2_LOWPWR_SHIFT)) + +/* MAX14577 CONTROL3 register */ +#define CTRL3_JIGSET_SHIFT 0 +#define CTRL3_BOOTSET_SHIFT 2 +#define CTRL3_ADCDBSET_SHIFT 4 +#define CTRL3_JIGSET_MASK (0x3 << CTRL3_JIGSET_SHIFT) +#define CTRL3_BOOTSET_MASK (0x3 << CTRL3_BOOTSET_SHIFT) +#define CTRL3_ADCDBSET_MASK (0x3 << CTRL3_ADCDBSET_SHIFT) + +/* Slave addr = 0x4A: Charger */ +enum max14577_charger_reg { + MAX14577_CHG_REG_STATUS3 = 0x06, + MAX14577_CHG_REG_CHG_CTRL1 = 0x0F, + MAX14577_CHG_REG_CHG_CTRL2 = 0x10, + MAX14577_CHG_REG_CHG_CTRL3 = 0x11, + MAX14577_CHG_REG_CHG_CTRL4 = 0x12, + MAX14577_CHG_REG_CHG_CTRL5 = 0x13, + MAX14577_CHG_REG_CHG_CTRL6 = 0x14, + MAX14577_CHG_REG_CHG_CTRL7 = 0x15, + + MAX14577_CHG_REG_END, +}; + +/* MAX14577 STATUS3 register */ +#define STATUS3_EOC_SHIFT 0 +#define STATUS3_CGMBC_SHIFT 1 +#define STATUS3_OVP_SHIFT 2 +#define STATUS3_MBCCHGERR_SHIFT 3 +#define STATUS3_EOC_MASK (0x1 << STATUS3_EOC_SHIFT) +#define STATUS3_CGMBC_MASK (0x1 << STATUS3_CGMBC_SHIFT) +#define STATUS3_OVP_MASK (0x1 << STATUS3_OVP_SHIFT) +#define STATUS3_MBCCHGERR_MASK (0x1 << STATUS3_MBCCHGERR_SHIFT) + +/* MAX14577 CDETCTRL1 register */ +#define CDETCTRL1_CHGDETEN_SHIFT 0 +#define CDETCTRL1_CHGTYPMAN_SHIFT 1 +#define CDETCTRL1_DCDEN_SHIFT 2 +#define CDETCTRL1_DCD2SCT_SHIFT 3 +#define CDETCTRL1_DCHKTM_SHIFT 4 +#define CDETCTRL1_DBEXIT_SHIFT 5 +#define CDETCTRL1_DBIDLE_SHIFT 6 +#define CDETCTRL1_CDPDET_SHIFT 7 +#define CDETCTRL1_CHGDETEN_MASK (0x1 << CDETCTRL1_CHGDETEN_SHIFT) +#define CDETCTRL1_CHGTYPMAN_MASK (0x1 << CDETCTRL1_CHGTYPMAN_SHIFT) +#define CDETCTRL1_DCDEN_MASK (0x1 << CDETCTRL1_DCDEN_SHIFT) +#define CDETCTRL1_DCD2SCT_MASK (0x1 << CDETCTRL1_DCD2SCT_SHIFT) +#define CDETCTRL1_DCHKTM_MASK (0x1 << CDETCTRL1_DCHKTM_SHIFT) +#define CDETCTRL1_DBEXIT_MASK (0x1 << CDETCTRL1_DBEXIT_SHIFT) +#define CDETCTRL1_DBIDLE_MASK (0x1 << CDETCTRL1_DBIDLE_SHIFT) +#define CDETCTRL1_CDPDET_MASK (0x1 << CDETCTRL1_CDPDET_SHIFT) + +/* MAX14577 CHGCTRL1 register */ +#define CHGCTRL1_TCHW_SHIFT 4 +#define CHGCTRL1_TCHW_MASK (0x7 << CHGCTRL1_TCHW_SHIFT) + +/* MAX14577 CHGCTRL2 register */ +#define CHGCTRL2_MBCHOSTEN_SHIFT 6 +#define CHGCTRL2_MBCHOSTEN_MASK (0x1 << CHGCTRL2_MBCHOSTEN_SHIFT) +#define CHGCTRL2_VCHGR_RC_SHIFT 7 +#define CHGCTRL2_VCHGR_RC_MASK (0x1 << CHGCTRL2_VCHGR_RC_SHIFT) + +/* MAX14577 CHGCTRL3 register */ +#define CHGCTRL3_MBCCVWRC_SHIFT 0 +#define CHGCTRL3_MBCCVWRC_MASK (0xf << CHGCTRL3_MBCCVWRC_SHIFT) + +/* MAX14577 CHGCTRL4 register */ +#define CHGCTRL4_MBCICHWRCH_SHIFT 0 +#define CHGCTRL4_MBCICHWRCH_MASK (0xf << CHGCTRL4_MBCICHWRCH_SHIFT) +#define CHGCTRL4_MBCICHWRCL_SHIFT 4 +#define CHGCTRL4_MBCICHWRCL_MASK (0x1 << CHGCTRL4_MBCICHWRCL_SHIFT) + +/* MAX14577 CHGCTRL5 register */ +#define CHGCTRL5_EOCS_SHIFT 0 +#define CHGCTRL5_EOCS_MASK (0xf << CHGCTRL5_EOCS_SHIFT) + +/* MAX14577 CHGCTRL6 register */ +#define CHGCTRL6_AUTOSTOP_SHIFT 5 +#define CHGCTRL6_AUTOSTOP_MASK (0x1 << CHGCTRL6_AUTOSTOP_SHIFT) + +/* MAX14577 CHGCTRL7 register */ +#define CHGCTRL7_OTPCGHCVS_SHIFT 0 +#define CHGCTRL7_OTPCGHCVS_MASK (0x3 << CHGCTRL7_OTPCGHCVS_SHIFT) + +/* MAX14577 regulator current limits (as in CHGCTRL4 register), uA */ +#define MAX14577_REGULATOR_CURRENT_LIMIT_MIN 90000 +#define MAX14577_REGULATOR_CURRENT_LIMIT_HIGH_START 200000 +#define MAX14577_REGULATOR_CURRENT_LIMIT_HIGH_STEP 50000 +#define MAX14577_REGULATOR_CURRENT_LIMIT_MAX 950000 + +/* MAX14577 regulator SFOUT LDO voltage, fixed, uV */ +#define MAX14577_REGULATOR_SAFEOUT_VOLTAGE 4900000 + +enum max14577_irq_source { + MAX14577_IRQ_INT1 = 0, + MAX14577_IRQ_INT2, + MAX14577_IRQ_INT3, + + MAX14577_IRQ_REGS_NUM, +}; + +enum max14577_irq { + /* INT1 */ + MAX14577_IRQ_INT1_ADC, + MAX14577_IRQ_INT1_ADCLOW, + MAX14577_IRQ_INT1_ADCERR, + + /* INT2 */ + MAX14577_IRQ_INT2_CHGTYP, + MAX14577_IRQ_INT2_CHGDETRUN, + MAX14577_IRQ_INT2_DCDTMR, + MAX14577_IRQ_INT2_DBCHG, + MAX14577_IRQ_INT2_VBVOLT, + + /* INT3 */ + MAX14577_IRQ_INT3_EOC, + MAX14577_IRQ_INT3_CGMBC, + MAX14577_IRQ_INT3_OVP, + MAX14577_IRQ_INT3_MBCCHGERR, + + MAX14577_IRQ_NUM, +}; + +struct max14577 { + struct device *dev; + struct i2c_client *i2c; /* Slave addr = 0x4A */ + + struct regmap *regmap; + + struct regmap_irq_chip_data *irq_data; + int irq; + + /* Device ID */ + u8 vendor_id; /* Vendor Identification */ + u8 device_id; /* Chip Version */ +}; + +/* MAX14577 shared regmap API function */ +static inline int max14577_read_reg(struct regmap *map, u8 reg, u8 *dest) +{ + unsigned int val; + int ret; + + ret = regmap_read(map, reg, &val); + *dest = val; + + return ret; +} + +static inline int max14577_bulk_read(struct regmap *map, u8 reg, u8 *buf, + int count) +{ + return regmap_bulk_read(map, reg, buf, count); +} + +static inline int max14577_write_reg(struct regmap *map, u8 reg, u8 value) +{ + return regmap_write(map, reg, value); +} + +static inline int max14577_bulk_write(struct regmap *map, u8 reg, u8 *buf, + int count) +{ + return regmap_bulk_write(map, reg, buf, count); +} + +static inline int max14577_update_reg(struct regmap *map, u8 reg, u8 mask, + u8 val) +{ + return regmap_update_bits(map, reg, mask, val); +} + +#endif /* __MAX14577_PRIVATE_H__ */ diff --git a/include/linux/mfd/max14577.h b/include/linux/mfd/max14577.h new file mode 100644 index 000000000000..247b021dfaaf --- /dev/null +++ b/include/linux/mfd/max14577.h @@ -0,0 +1,69 @@ +/* + * max14577.h - Driver for the Maxim 14577 + * + * Copyright (C) 2013 Samsung Electrnoics + * Chanwoo Choi + * Krzysztof Kozlowski + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * This driver is based on max8997.h + * + * MAX14577 has MUIC, Charger devices. + * The devices share the same I2C bus and interrupt line + * included in this mfd driver. + */ + +#ifndef __MAX14577_H__ +#define __MAX14577_H__ + +#include +#include + +/* + * MAX14577 Regulator + */ + +/* MAX14577 regulator IDs */ +enum max14577_regulators { + MAX14577_SAFEOUT = 0, + MAX14577_CHARGER, + + MAX14577_REG_MAX, +}; + +struct max14577_regulator_platform_data { + int id; + struct regulator_init_data *initdata; + struct device_node *of_node; +}; + +/* + * MAX14577 MFD platform data + */ +struct max14577_platform_data { + /* IRQ */ + int irq_base; + + /* current control GPIOs */ + int gpio_pogo_vbatt_en; + int gpio_pogo_vbus_en; + + /* current control GPIO control function */ + int (*set_gpio_pogo_vbatt_en) (int gpio_val); + int (*set_gpio_pogo_vbus_en) (int gpio_val); + + int (*set_gpio_pogo_cb) (int new_dev); + + struct max14577_regulator_platform_data *regulators; +}; + +#endif /* __MAX14577_H__ */ -- cgit v1.2.3 From 45e842235626fa4ff78d53aa92c45f8fbc9a69c4 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 3 Dec 2013 15:50:34 +0100 Subject: mfd: ab8500: Delete all GPIO platform data instances This deletes all instances where the AB8500 GPIO platform data is passed around. It is completely unused in the kernel now, so it does not hurt anyone. Signed-off-by: Linus Walleij Signed-off-by: Lee Jones --- include/linux/mfd/abx500/ab8500-gpio.h | 10 ---------- include/linux/mfd/abx500/ab8500.h | 2 -- 2 files changed, 12 deletions(-) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/abx500/ab8500-gpio.h b/include/linux/mfd/abx500/ab8500-gpio.h index 172b2f201ae0..ebef068cbb6f 100644 --- a/include/linux/mfd/abx500/ab8500-gpio.h +++ b/include/linux/mfd/abx500/ab8500-gpio.h @@ -8,16 +8,6 @@ #ifndef _AB8500_GPIO_H #define _AB8500_GPIO_H -/* - * Platform data to register a block: only the initial gpio/irq number. - * Array sizes are large enough to contain all AB8500 and AB9540 GPIO - * registers. - */ - -struct abx500_gpio_platform_data { - int gpio_base; -}; - enum abx500_gpio_pull_updown { ABX500_GPIO_PULL_DOWN = 0x0, ABX500_GPIO_PULL_NONE = 0x1, diff --git a/include/linux/mfd/abx500/ab8500.h b/include/linux/mfd/abx500/ab8500.h index f4acd898dac9..a86ca1406fb8 100644 --- a/include/linux/mfd/abx500/ab8500.h +++ b/include/linux/mfd/abx500/ab8500.h @@ -368,7 +368,6 @@ struct ab8500 { }; struct ab8500_regulator_platform_data; -struct ab8500_gpio_platform_data; struct ab8500_codec_platform_data; struct ab8500_sysctrl_platform_data; @@ -382,7 +381,6 @@ struct ab8500_platform_data { int irq_base; void (*init) (struct ab8500 *); struct ab8500_regulator_platform_data *regulator; - struct abx500_gpio_platform_data *gpio; struct ab8500_codec_platform_data *codec; struct ab8500_sysctrl_platform_data *sysctrl; }; -- cgit v1.2.3 From 97b583f3b491f75712b0edc89c26a112f3847ab3 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 3 Dec 2013 15:50:49 +0100 Subject: mfd/pinctrl: Delete platform data header This deletes the special AB8500 GPIO platform data passing header and merges the few remaining contents down into the abx500 pinctrl driver which handles the abx500 GPIO device. Signed-off-by: Linus Walleij Signed-off-by: Lee Jones --- include/linux/mfd/abx500/ab8500-gpio.h | 23 ----------------------- 1 file changed, 23 deletions(-) delete mode 100644 include/linux/mfd/abx500/ab8500-gpio.h (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/abx500/ab8500-gpio.h b/include/linux/mfd/abx500/ab8500-gpio.h deleted file mode 100644 index ebef068cbb6f..000000000000 --- a/include/linux/mfd/abx500/ab8500-gpio.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Copyright ST-Ericsson 2010. - * - * Author: Bibek Basu - * Licensed under GPLv2. - */ - -#ifndef _AB8500_GPIO_H -#define _AB8500_GPIO_H - -enum abx500_gpio_pull_updown { - ABX500_GPIO_PULL_DOWN = 0x0, - ABX500_GPIO_PULL_NONE = 0x1, - ABX500_GPIO_PULL_UP = 0x3, -}; - -enum abx500_gpio_vinsel { - ABX500_GPIO_VINSEL_VBAT = 0x0, - ABX500_GPIO_VINSEL_VIN_1V8 = 0x1, - ABX500_GPIO_VINSEL_VDD_BIF = 0x2, -}; - -#endif /* _AB8500_GPIO_H */ -- cgit v1.2.3 From 470eca47bded10f2e1a425b44d6f2b1418271a9f Mon Sep 17 00:00:00 2001 From: Milo Kim Date: Fri, 6 Dec 2013 11:18:41 +0900 Subject: mfd: Add LP3943 MFD driver LP3943 has 16 output pins which can be used as GPIO expander and PWM generator. * Regmap I2C interface for R/W LP3943 registers * Atomic operations for output pin assignment The driver should check whether requested pin is available or not. If the pin is already used, pin request returns as a failure. A driver data, 'pin_used' is checked when gpio_request() and pwm_request() are called. If the pin is available, then pin_used is set. And it is cleared when gpio_free() and pwm_free(). * Device tree support Compatible strings for GPIO and PWM driver. LP3943 platform data is PWM related, so parsing the device tree is implemented in the PWM driver. Signed-off-by: Milo Kim Signed-off-by: Lee Jones --- include/linux/mfd/lp3943.h | 114 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 114 insertions(+) create mode 100644 include/linux/mfd/lp3943.h (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/lp3943.h b/include/linux/mfd/lp3943.h new file mode 100644 index 000000000000..3490db782988 --- /dev/null +++ b/include/linux/mfd/lp3943.h @@ -0,0 +1,114 @@ +/* + * TI/National Semiconductor LP3943 Device + * + * Copyright 2013 Texas Instruments + * + * Author: Milo Kim + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef __MFD_LP3943_H__ +#define __MFD_LP3943_H__ + +#include +#include +#include + +/* Registers */ +#define LP3943_REG_GPIO_A 0x00 +#define LP3943_REG_GPIO_B 0x01 +#define LP3943_REG_PRESCALE0 0x02 +#define LP3943_REG_PWM0 0x03 +#define LP3943_REG_PRESCALE1 0x04 +#define LP3943_REG_PWM1 0x05 +#define LP3943_REG_MUX0 0x06 +#define LP3943_REG_MUX1 0x07 +#define LP3943_REG_MUX2 0x08 +#define LP3943_REG_MUX3 0x09 + +/* Bit description for LP3943_REG_MUX0 ~ 3 */ +#define LP3943_GPIO_IN 0x00 +#define LP3943_GPIO_OUT_HIGH 0x00 +#define LP3943_GPIO_OUT_LOW 0x01 +#define LP3943_DIM_PWM0 0x02 +#define LP3943_DIM_PWM1 0x03 + +#define LP3943_NUM_PWMS 2 + +enum lp3943_pwm_output { + LP3943_PWM_OUT0, + LP3943_PWM_OUT1, + LP3943_PWM_OUT2, + LP3943_PWM_OUT3, + LP3943_PWM_OUT4, + LP3943_PWM_OUT5, + LP3943_PWM_OUT6, + LP3943_PWM_OUT7, + LP3943_PWM_OUT8, + LP3943_PWM_OUT9, + LP3943_PWM_OUT10, + LP3943_PWM_OUT11, + LP3943_PWM_OUT12, + LP3943_PWM_OUT13, + LP3943_PWM_OUT14, + LP3943_PWM_OUT15, +}; + +/* + * struct lp3943_pwm_map + * @output: Output pins which are mapped to each PWM channel + * @num_outputs: Number of outputs + */ +struct lp3943_pwm_map { + enum lp3943_pwm_output *output; + int num_outputs; +}; + +/* + * struct lp3943_platform_data + * @pwms: Output channel definitions for PWM channel 0 and 1 + */ +struct lp3943_platform_data { + struct lp3943_pwm_map *pwms[LP3943_NUM_PWMS]; +}; + +/* + * struct lp3943_reg_cfg + * @reg: Register address + * @mask: Register bit mask to be updated + * @shift: Register bit shift + */ +struct lp3943_reg_cfg { + u8 reg; + u8 mask; + u8 shift; +}; + +/* + * struct lp3943 + * @dev: Parent device pointer + * @regmap: Used for I2C communication on accessing registers + * @pdata: LP3943 platform specific data + * @mux_cfg: Register configuration for pin MUX + * @pin_used: Bit mask for output pin used. + * This bitmask is used for pin assignment management. + * 1 = pin used, 0 = available. + * Only LSB 16 bits are used, but it is unsigned long type + * for atomic bitwise operations. + */ +struct lp3943 { + struct device *dev; + struct regmap *regmap; + struct lp3943_platform_data *pdata; + const struct lp3943_reg_cfg *mux_cfg; + unsigned long pin_used; +}; + +int lp3943_read_byte(struct lp3943 *lp3943, u8 reg, u8 *read); +int lp3943_write_byte(struct lp3943 *lp3943, u8 reg, u8 data); +int lp3943_update_bits(struct lp3943 *lp3943, u8 reg, u8 mask, u8 data); +#endif -- cgit v1.2.3 From e0a3da80c65dc427c30829eb3e361507f843778f Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Fri, 6 Dec 2013 13:51:45 +0100 Subject: mfd: tps6586x: Add version detection Use the VERSIONCRC to determine the exact device version. According to the datasheet this register can be used as device identifier. The identification is needed since some tps6586x regulators use a different voltage table. Signed-off-by: Stefan Agner Reviewed-by: Thierry Reding Acked-by: Stephen Warren Signed-off-by: Lee Jones --- include/linux/mfd/tps6586x.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/tps6586x.h b/include/linux/mfd/tps6586x.h index 87994542573b..cbecec2e353a 100644 --- a/include/linux/mfd/tps6586x.h +++ b/include/linux/mfd/tps6586x.h @@ -13,6 +13,12 @@ #define TPS6586X_SLEW_RATE_SET 0x08 #define TPS6586X_SLEW_RATE_MASK 0x07 +/* VERSION CRC */ +#define TPS658621A 0x15 +#define TPS658621CD 0x2c +#define TPS658623 0x1b +#define TPS658643 0x03 + enum { TPS6586X_ID_SYS, TPS6586X_ID_SM_0, @@ -97,5 +103,6 @@ extern int tps6586x_clr_bits(struct device *dev, int reg, uint8_t bit_mask); extern int tps6586x_update(struct device *dev, int reg, uint8_t val, uint8_t mask); extern int tps6586x_irq_get_virq(struct device *dev, int irq); +extern int tps6586x_get_version(struct device *dev); #endif /*__LINUX_MFD_TPS6586X_H */ -- cgit v1.2.3 From 03b1e3023b34dceedd882136f5a4c834e501fb39 Mon Sep 17 00:00:00 2001 From: Alexander Shiyan Date: Sat, 14 Dec 2013 17:03:11 +0400 Subject: mfd: mc13xxx: Remove duplicate mc13xxx_get_flags() declaration mc13xxx_get_flags() declaration given twice. This patch removes this duplicate. Signed-off-by: Alexander Shiyan Signed-off-by: Lee Jones --- include/linux/mfd/mc13xxx.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/mc13xxx.h b/include/linux/mfd/mc13xxx.h index 67c17b5a6f44..6156686bf108 100644 --- a/include/linux/mfd/mc13xxx.h +++ b/include/linux/mfd/mc13xxx.h @@ -21,8 +21,6 @@ int mc13xxx_reg_write(struct mc13xxx *mc13xxx, unsigned int offset, u32 val); int mc13xxx_reg_rmw(struct mc13xxx *mc13xxx, unsigned int offset, u32 mask, u32 val); -int mc13xxx_get_flags(struct mc13xxx *mc13xxx); - int mc13xxx_irq_request(struct mc13xxx *mc13xxx, int irq, irq_handler_t handler, const char *name, void *dev); int mc13xxx_irq_request_nounmask(struct mc13xxx *mc13xxx, int irq, -- cgit v1.2.3 From f876a975a05a2dffb4f1a4f07b81b212d9d8db01 Mon Sep 17 00:00:00 2001 From: Laszlo Papp Date: Thu, 19 Dec 2013 13:08:43 +0000 Subject: mfd: Represent correct filenames in file headers The original author(s) probably copy/pasted these headers from the existing public header files. Signed-off-by: Laszlo Papp Signed-off-by: Lee Jones --- include/linux/mfd/max77686-private.h | 2 +- include/linux/mfd/max8997-private.h | 2 +- include/linux/mfd/max8998-private.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/max77686-private.h b/include/linux/mfd/max77686-private.h index d327d4971e4f..8c75a9c8dfab 100644 --- a/include/linux/mfd/max77686-private.h +++ b/include/linux/mfd/max77686-private.h @@ -1,5 +1,5 @@ /* - * max77686.h - Voltage regulator driver for the Maxim 77686 + * max77686-private.h - Voltage regulator driver for the Maxim 77686 * * Copyright (C) 2012 Samsung Electrnoics * Chiwoong Byun diff --git a/include/linux/mfd/max8997-private.h b/include/linux/mfd/max8997-private.h index fb465dfbb59e..ad1ae7f345ad 100644 --- a/include/linux/mfd/max8997-private.h +++ b/include/linux/mfd/max8997-private.h @@ -1,5 +1,5 @@ /* - * max8997.h - Voltage regulator driver for the Maxim 8997 + * max8997-private.h - Voltage regulator driver for the Maxim 8997 * * Copyright (C) 2010 Samsung Electrnoics * MyungJoo Ham diff --git a/include/linux/mfd/max8998-private.h b/include/linux/mfd/max8998-private.h index 84844e0a5704..4ecb24b4b863 100644 --- a/include/linux/mfd/max8998-private.h +++ b/include/linux/mfd/max8998-private.h @@ -1,5 +1,5 @@ /* - * max8998.h - Voltage regulator driver for the Maxim 8998 + * max8998-private.h - Voltage regulator driver for the Maxim 8998 * * Copyright (C) 2009-2010 Samsung Electrnoics * Kyungmin Park -- cgit v1.2.3 From 01a7a063e8cf4bc09af2c02d28c12f3d72bf9649 Mon Sep 17 00:00:00 2001 From: Alexander Shiyan Date: Fri, 6 Dec 2013 22:22:18 -0800 Subject: leds: leds-mc13783: Remove duplicate field in platform data LED platform data are overwhelmed by excessive field "max_cur" which just replicates few bits of "led_control" field. This patch removes this field and adds a definition for the current settings in the header. Signed-off-by: Alexander Shiyan Signed-off-by: Bryan Wu --- include/linux/mfd/mc13xxx.h | 37 ++++++++++++++++++++++++++++--------- 1 file changed, 28 insertions(+), 9 deletions(-) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/mc13xxx.h b/include/linux/mfd/mc13xxx.h index 67c17b5a6f44..ac2230561fc8 100644 --- a/include/linux/mfd/mc13xxx.h +++ b/include/linux/mfd/mc13xxx.h @@ -112,9 +112,6 @@ struct mc13xxx_led_platform_data { int id; const char *name; const char *default_trigger; - -/* Three or two bits current selection depending on the led */ - char max_current; }; #define MAX_LED_CONTROL_REGS 6 @@ -123,7 +120,7 @@ struct mc13xxx_leds_platform_data { struct mc13xxx_led_platform_data *led; int num_leds; -/* LED Control 0 */ +/* MC13783 LED Control 0 */ #define MC13783_LED_C0_ENABLE (1 << 0) #define MC13783_LED_C0_TRIODE_MD (1 << 7) #define MC13783_LED_C0_TRIODE_AD (1 << 8) @@ -131,21 +128,43 @@ struct mc13xxx_leds_platform_data { #define MC13783_LED_C0_BOOST (1 << 10) #define MC13783_LED_C0_ABMODE(x) (((x) & 0x7) << 11) #define MC13783_LED_C0_ABREF(x) (((x) & 0x3) << 14) -/* LED Control 1 */ +/* MC13783 LED Control 1 */ #define MC13783_LED_C1_TC1HALF (1 << 18) #define MC13783_LED_C1_SLEWLIM (1 << 23) -/* LED Control 2 */ +/* MC13783 LED Control 2 */ +#define MC13783_LED_C2_CURRENT_MD(x) (((x) & 0x7) << 0) +#define MC13783_LED_C2_CURRENT_AD(x) (((x) & 0x7) << 3) +#define MC13783_LED_C2_CURRENT_KP(x) (((x) & 0x7) << 6) #define MC13783_LED_C2_PERIOD(x) (((x) & 0x3) << 21) #define MC13783_LED_C2_SLEWLIM (1 << 23) -/* LED Control 3 */ +/* MC13783 LED Control 3 */ +#define MC13783_LED_C3_CURRENT_R1(x) (((x) & 0x3) << 0) +#define MC13783_LED_C3_CURRENT_G1(x) (((x) & 0x3) << 2) +#define MC13783_LED_C3_CURRENT_B1(x) (((x) & 0x3) << 4) #define MC13783_LED_C3_PERIOD(x) (((x) & 0x3) << 21) #define MC13783_LED_C3_TRIODE_TC1 (1 << 23) -/* LED Control 4 */ +/* MC13783 LED Control 4 */ +#define MC13783_LED_C4_CURRENT_R2(x) (((x) & 0x3) << 0) +#define MC13783_LED_C4_CURRENT_G2(x) (((x) & 0x3) << 2) +#define MC13783_LED_C4_CURRENT_B2(x) (((x) & 0x3) << 4) #define MC13783_LED_C4_PERIOD(x) (((x) & 0x3) << 21) #define MC13783_LED_C4_TRIODE_TC2 (1 << 23) -/* LED Control 5 */ +/* MC13783 LED Control 5 */ +#define MC13783_LED_C5_CURRENT_R3(x) (((x) & 0x3) << 0) +#define MC13783_LED_C5_CURRENT_G3(x) (((x) & 0x3) << 2) +#define MC13783_LED_C5_CURRENT_B3(x) (((x) & 0x3) << 4) #define MC13783_LED_C5_PERIOD(x) (((x) & 0x3) << 21) #define MC13783_LED_C5_TRIODE_TC3 (1 << 23) +/* MC13892 LED Control 0 */ +#define MC13892_LED_C0_CURRENT_MD(x) (((x) & 0x7) << 9) +#define MC13892_LED_C0_CURRENT_AD(x) (((x) & 0x7) << 21) +/* MC13892 LED Control 1 */ +#define MC13892_LED_C1_CURRENT_KP(x) (((x) & 0x7) << 9) +/* MC13892 LED Control 2 */ +#define MC13892_LED_C2_CURRENT_R(x) (((x) & 0x7) << 9) +#define MC13892_LED_C2_CURRENT_G(x) (((x) & 0x7) << 21) +/* MC13892 LED Control 3 */ +#define MC13892_LED_C3_CURRENT_B(x) (((x) & 0x7) << 9) u32 led_control[MAX_LED_CONTROL_REGS]; }; -- cgit v1.2.3