From 49a0a3d805df3b7b4f8a04db6dbf55aa36fd762c Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Fri, 15 Dec 2017 09:41:05 -0800 Subject: bus: ti-sysc: Make omap_hwmod_sysc_fields into sysc_regbits platform data We want to be able to configure hwmod sysc data from ti-sysc driver using platform data callbacks. So let's make struct omap_hwmod_sysc_fields into struct sysc_data and have it available for both ti-sysc driver and hwmod code. Note that we can make it use s8 instead of u8 as the hwmod code uses the feature flags to check for this field. However, for ti-sysc we can use -ENODEV to indicate a feature is not supported in the hardware and can simplify the code that way. And let's add also emufree_shift as the dts files will be describing the hardware for the SYSCONFIG register capbilities mask. Cc: Paul Walmsley Signed-off-by: Tony Lindgren --- include/linux/platform_data/ti-sysc.h | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 include/linux/platform_data/ti-sysc.h (limited to 'include/linux/platform_data/ti-sysc.h') diff --git a/include/linux/platform_data/ti-sysc.h b/include/linux/platform_data/ti-sysc.h new file mode 100644 index 000000000000..280466099b76 --- /dev/null +++ b/include/linux/platform_data/ti-sysc.h @@ -0,0 +1,29 @@ +#ifndef __TI_SYSC_DATA_H__ +#define __TI_SYSC_DATA_H__ + +/** + * struct sysc_regbits - TI OCP_SYSCONFIG register field offsets + * @midle_shift: Offset of the midle bit + * @clkact_shift: Offset of the clockactivity bit + * @sidle_shift: Offset of the sidle bit + * @enwkup_shift: Offset of the enawakeup bit + * @srst_shift: Offset of the softreset bit + * @autoidle_shift: Offset of the autoidle bit + * @dmadisable_shift: Offset of the dmadisable bit + * @emufree_shift; Offset of the emufree bit + * + * Note that 0 is a valid shift, and for ti-sysc.c -ENODEV can be used if a + * feature is not available. + */ +struct sysc_regbits { + s8 midle_shift; + s8 clkact_shift; + s8 sidle_shift; + s8 enwkup_shift; + s8 srst_shift; + s8 autoidle_shift; + s8 dmadisable_shift; + s8 emufree_shift; +}; + +#endif /* __TI_SYSC_DATA_H__ */ -- cgit v1.2.3 From 70a65240efb1116f4f580c2f8235ba58000889b0 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Fri, 15 Dec 2017 09:41:09 -0800 Subject: bus: ti-sysc: Add register bits for interconnect target modules Let's add data for the known interconnect target module types by mapping their register bits. Note that we can handle many quirks for the older omap2 type1 modules directly in the driver without a need for adding custom properties. Signed-off-by: Tony Lindgren --- include/linux/platform_data/ti-sysc.h | 40 +++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) (limited to 'include/linux/platform_data/ti-sysc.h') diff --git a/include/linux/platform_data/ti-sysc.h b/include/linux/platform_data/ti-sysc.h index 280466099b76..b76ace0135b3 100644 --- a/include/linux/platform_data/ti-sysc.h +++ b/include/linux/platform_data/ti-sysc.h @@ -1,6 +1,21 @@ #ifndef __TI_SYSC_DATA_H__ #define __TI_SYSC_DATA_H__ +enum ti_sysc_module_type { + TI_SYSC_OMAP2, + TI_SYSC_OMAP2_TIMER, + TI_SYSC_OMAP3_SHAM, + TI_SYSC_OMAP3_AES, + TI_SYSC_OMAP4, + TI_SYSC_OMAP4_TIMER, + TI_SYSC_OMAP4_SIMPLE, + TI_SYSC_OMAP34XX_SR, + TI_SYSC_OMAP36XX_SR, + TI_SYSC_OMAP4_SR, + TI_SYSC_OMAP4_MCASP, + TI_SYSC_OMAP4_USB_HOST_FS, +}; + /** * struct sysc_regbits - TI OCP_SYSCONFIG register field offsets * @midle_shift: Offset of the midle bit @@ -26,4 +41,29 @@ struct sysc_regbits { s8 emufree_shift; }; +#define SYSC_QUIRK_UNCACHED BIT(1) +#define SYSC_QUIRK_USE_CLOCKACT BIT(0) + +/** + * struct sysc_capabilities - capabilities for an interconnect target module + * + * @sysc_mask: bitmask of supported SYSCONFIG register bits + * @regbits: bitmask of SYSCONFIG register bits + * @mod_quirks: bitmask of module specific quirks + */ +struct sysc_capabilities { + const enum ti_sysc_module_type type; + const u32 sysc_mask; + const struct sysc_regbits *regbits; + const u32 mod_quirks; +}; + +/** + * struct sysc_config - configuration for an interconnect target module + * @quirks: bitmask of enabled quirks + */ +struct sysc_config { + u32 quirks; +}; + #endif /* __TI_SYSC_DATA_H__ */ -- cgit v1.2.3 From a7199e2b91ded41adbb6fd384a85e358d25f48c8 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Fri, 15 Dec 2017 09:41:14 -0800 Subject: bus: ti-sysc: Detect i2c interconnect target module based on register layout We can easily detect i2c based on it's non-standard module registers that consist of two 32-bit registers accessed in 16-bit mode. So far we don't have other 16-bit modules, so there's currently no need to add a custom property for 16-bit register access. Signed-off-by: Tony Lindgren --- include/linux/platform_data/ti-sysc.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/linux/platform_data/ti-sysc.h') diff --git a/include/linux/platform_data/ti-sysc.h b/include/linux/platform_data/ti-sysc.h index b76ace0135b3..059be6f6fa94 100644 --- a/include/linux/platform_data/ti-sysc.h +++ b/include/linux/platform_data/ti-sysc.h @@ -41,6 +41,7 @@ struct sysc_regbits { s8 emufree_shift; }; +#define SYSC_QUIRK_16BIT BIT(2) #define SYSC_QUIRK_UNCACHED BIT(1) #define SYSC_QUIRK_USE_CLOCKACT BIT(0) -- cgit v1.2.3 From 566a9b05e1fa47dcfb93a4459145d0fdc06d3046 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Fri, 15 Dec 2017 09:41:19 -0800 Subject: bus: ti-sysc: Handle module quirks based dts configuration Let's configure few module quirks via device tree using the properties for "ti,no-idle-on-init", "ti,no-reset-on-init" and "ti,sysc-delay-us". Let's also reorder the probe a bit so we have pdata available earlier, and move the PM runtime calls to sysc_init_module() from sysc_read_revision(). Signed-off-by: Tony Lindgren --- include/linux/platform_data/ti-sysc.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include/linux/platform_data/ti-sysc.h') diff --git a/include/linux/platform_data/ti-sysc.h b/include/linux/platform_data/ti-sysc.h index 059be6f6fa94..28e5a61d4abc 100644 --- a/include/linux/platform_data/ti-sysc.h +++ b/include/linux/platform_data/ti-sysc.h @@ -41,6 +41,10 @@ struct sysc_regbits { s8 emufree_shift; }; +#define SYSC_QUIRK_NO_IDLE_ON_INIT BIT(6) +#define SYSC_QUIRK_NO_RESET_ON_INIT BIT(5) +#define SYSC_QUIRK_OPT_CLKS_NEEDED BIT(4) +#define SYSC_QUIRK_OPT_CLKS_IN_RESET BIT(3) #define SYSC_QUIRK_16BIT BIT(2) #define SYSC_QUIRK_UNCACHED BIT(1) #define SYSC_QUIRK_USE_CLOCKACT BIT(0) @@ -61,9 +65,11 @@ struct sysc_capabilities { /** * struct sysc_config - configuration for an interconnect target module + * @srst_udelay: optional delay needed after OCP soft reset * @quirks: bitmask of enabled quirks */ struct sysc_config { + u8 srst_udelay; u32 quirks; }; -- cgit v1.2.3 From c5a2de97fbd2979fab291fb048084d3fddd322dd Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Fri, 15 Dec 2017 09:41:23 -0800 Subject: bus: ti-sysc: Add parsing of module capabilities We need to configure the interconnect target module based on the device three configuration. Let's also add a new quirk for SYSC_QUIRK_RESET_STATUS to indicate that the SYSCONFIG reset bit changes after the reset is done. Signed-off-by: Tony Lindgren --- include/linux/platform_data/ti-sysc.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'include/linux/platform_data/ti-sysc.h') diff --git a/include/linux/platform_data/ti-sysc.h b/include/linux/platform_data/ti-sysc.h index 28e5a61d4abc..1be356330b96 100644 --- a/include/linux/platform_data/ti-sysc.h +++ b/include/linux/platform_data/ti-sysc.h @@ -41,6 +41,7 @@ struct sysc_regbits { s8 emufree_shift; }; +#define SYSC_QUIRK_RESET_STATUS BIT(7) #define SYSC_QUIRK_NO_IDLE_ON_INIT BIT(6) #define SYSC_QUIRK_NO_RESET_ON_INIT BIT(5) #define SYSC_QUIRK_OPT_CLKS_NEEDED BIT(4) @@ -49,6 +50,8 @@ struct sysc_regbits { #define SYSC_QUIRK_UNCACHED BIT(1) #define SYSC_QUIRK_USE_CLOCKACT BIT(0) +#define SYSC_NR_IDLEMODES 4 + /** * struct sysc_capabilities - capabilities for an interconnect target module * @@ -65,10 +68,17 @@ struct sysc_capabilities { /** * struct sysc_config - configuration for an interconnect target module + * @sysc_val: configured value for sysc register + * @midlemodes: bitmask of supported master idle modes + * @sidlemodes: bitmask of supported master idle modes * @srst_udelay: optional delay needed after OCP soft reset * @quirks: bitmask of enabled quirks */ struct sysc_config { + u32 sysc_val; + u32 syss_mask; + u8 midlemodes; + u8 sidlemodes; u8 srst_udelay; u32 quirks; }; -- cgit v1.2.3