From ff2b1359229927563addbf2f5ad480660c350903 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 20 Oct 2015 11:10:38 +0200 Subject: gpio: make the gpiochip a real device GPIO chips have been around for years, but were never real devices, instead they were piggy-backing on a parent device (such as a platform_device or amba_device) but this was always optional. GPIO chips could also exist without any device at all, with its struct device *parent (ex *dev) pointer being set to null. When sysfs was in use, a mock device would be created, with the optional parent assigned, or just floating orphaned with NULL as parent. If sysfs is active, it will use this device as parent. We now create a gpio_device struct containing a real struct device and move the subsystem over to using that. The list of struct gpio_chip:s is augmented to hold struct gpio_device:s and we find gpio_chips:s by first looking up the struct gpio_device. The struct gpio_device is designed to stay around even if the gpio_chip is removed, so as to satisfy users in userspace that need a backing data structure to hold the state of the session initiated with e.g. a character device even if there is no physical chip anymore. From this point on, gpiochips are devices. Cc: Johan Hovold Cc: Michael Welling Cc: Markus Pargmann Signed-off-by: Linus Walleij --- include/linux/gpio/driver.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'include/linux') diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index 82fda487453f..f3f1dbd43c9b 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -1,6 +1,7 @@ #ifndef __LINUX_GPIO_DRIVER_H #define __LINUX_GPIO_DRIVER_H +#include #include #include #include @@ -10,22 +11,22 @@ #include #include -struct device; struct gpio_desc; struct of_phandle_args; struct device_node; struct seq_file; +struct gpio_device; #ifdef CONFIG_GPIOLIB /** * struct gpio_chip - abstract a GPIO controller * @label: for diagnostics + * @gpiodev: the internal state holder, opaque struct * @parent: optional parent device providing the GPIOs * @cdev: class device used by sysfs interface (may be NULL) * @owner: helps prevent removal of modules exporting active GPIOs * @data: per-instance data assigned by the driver - * @list: links gpio_chips together for traversal * @request: optional hook for chip-specific activation, such as * enabling module power and clock; may sleep * @free: optional hook for chip-specific deactivation, such as @@ -107,11 +108,11 @@ struct seq_file; */ struct gpio_chip { const char *label; + struct gpio_device *gpiodev; struct device *parent; struct device *cdev; struct module *owner; void *data; - struct list_head list; int (*request)(struct gpio_chip *chip, unsigned offset); -- cgit v1.2.3 From 65b6555971d0498b18a0b2fdc6dd7c822f2d69b7 Mon Sep 17 00:00:00 2001 From: "Andrew F. Davis" Date: Mon, 25 Jan 2016 09:43:44 -0600 Subject: mfd: tps65912: Remove old driver in preparation for new driver The old tps65912 driver is being replaced, delete old driver. Signed-off-by: Andrew F. Davis Acked-by: Mark Brown Acked-by: Linus Walleij Signed-off-by: Lee Jones --- include/linux/mfd/tps65912.h | 328 ------------------------------------------- 1 file changed, 328 deletions(-) delete mode 100644 include/linux/mfd/tps65912.h (limited to 'include/linux') diff --git a/include/linux/mfd/tps65912.h b/include/linux/mfd/tps65912.h deleted file mode 100644 index 6d309032dc0d..000000000000 --- a/include/linux/mfd/tps65912.h +++ /dev/null @@ -1,328 +0,0 @@ -/* - * tps65912.h -- TI TPS6591x - * - * Copyright 2011 Texas Instruments Inc. - * - * Author: Margarita Olaya - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ - -#ifndef __LINUX_MFD_TPS65912_H -#define __LINUX_MFD_TPS65912_H - -/* TPS regulator type list */ -#define REGULATOR_LDO 0 -#define REGULATOR_DCDC 1 - -/* - * List of registers for TPS65912 - */ - -#define TPS65912_DCDC1_CTRL 0x00 -#define TPS65912_DCDC2_CTRL 0x01 -#define TPS65912_DCDC3_CTRL 0x02 -#define TPS65912_DCDC4_CTRL 0x03 -#define TPS65912_DCDC1_OP 0x04 -#define TPS65912_DCDC1_AVS 0x05 -#define TPS65912_DCDC1_LIMIT 0x06 -#define TPS65912_DCDC2_OP 0x07 -#define TPS65912_DCDC2_AVS 0x08 -#define TPS65912_DCDC2_LIMIT 0x09 -#define TPS65912_DCDC3_OP 0x0A -#define TPS65912_DCDC3_AVS 0x0B -#define TPS65912_DCDC3_LIMIT 0x0C -#define TPS65912_DCDC4_OP 0x0D -#define TPS65912_DCDC4_AVS 0x0E -#define TPS65912_DCDC4_LIMIT 0x0F -#define TPS65912_LDO1_OP 0x10 -#define TPS65912_LDO1_AVS 0x11 -#define TPS65912_LDO1_LIMIT 0x12 -#define TPS65912_LDO2_OP 0x13 -#define TPS65912_LDO2_AVS 0x14 -#define TPS65912_LDO2_LIMIT 0x15 -#define TPS65912_LDO3_OP 0x16 -#define TPS65912_LDO3_AVS 0x17 -#define TPS65912_LDO3_LIMIT 0x18 -#define TPS65912_LDO4_OP 0x19 -#define TPS65912_LDO4_AVS 0x1A -#define TPS65912_LDO4_LIMIT 0x1B -#define TPS65912_LDO5 0x1C -#define TPS65912_LDO6 0x1D -#define TPS65912_LDO7 0x1E -#define TPS65912_LDO8 0x1F -#define TPS65912_LDO9 0x20 -#define TPS65912_LDO10 0x21 -#define TPS65912_THRM 0x22 -#define TPS65912_CLK32OUT 0x23 -#define TPS65912_DEVCTRL 0x24 -#define TPS65912_DEVCTRL2 0x25 -#define TPS65912_I2C_SPI_CFG 0x26 -#define TPS65912_KEEP_ON 0x27 -#define TPS65912_KEEP_ON2 0x28 -#define TPS65912_SET_OFF1 0x29 -#define TPS65912_SET_OFF2 0x2A -#define TPS65912_DEF_VOLT 0x2B -#define TPS65912_DEF_VOLT_MAPPING 0x2C -#define TPS65912_DISCHARGE 0x2D -#define TPS65912_DISCHARGE2 0x2E -#define TPS65912_EN1_SET1 0x2F -#define TPS65912_EN1_SET2 0x30 -#define TPS65912_EN2_SET1 0x31 -#define TPS65912_EN2_SET2 0x32 -#define TPS65912_EN3_SET1 0x33 -#define TPS65912_EN3_SET2 0x34 -#define TPS65912_EN4_SET1 0x35 -#define TPS65912_EN4_SET2 0x36 -#define TPS65912_PGOOD 0x37 -#define TPS65912_PGOOD2 0x38 -#define TPS65912_INT_STS 0x39 -#define TPS65912_INT_MSK 0x3A -#define TPS65912_INT_STS2 0x3B -#define TPS65912_INT_MSK2 0x3C -#define TPS65912_INT_STS3 0x3D -#define TPS65912_INT_MSK3 0x3E -#define TPS65912_INT_STS4 0x3F -#define TPS65912_INT_MSK4 0x40 -#define TPS65912_GPIO1 0x41 -#define TPS65912_GPIO2 0x42 -#define TPS65912_GPIO3 0x43 -#define TPS65912_GPIO4 0x44 -#define TPS65912_GPIO5 0x45 -#define TPS65912_VMON 0x46 -#define TPS65912_LEDA_CTRL1 0x47 -#define TPS65912_LEDA_CTRL2 0x48 -#define TPS65912_LEDA_CTRL3 0x49 -#define TPS65912_LEDA_CTRL4 0x4A -#define TPS65912_LEDA_CTRL5 0x4B -#define TPS65912_LEDA_CTRL6 0x4C -#define TPS65912_LEDA_CTRL7 0x4D -#define TPS65912_LEDA_CTRL8 0x4E -#define TPS65912_LEDB_CTRL1 0x4F -#define TPS65912_LEDB_CTRL2 0x50 -#define TPS65912_LEDB_CTRL3 0x51 -#define TPS65912_LEDB_CTRL4 0x52 -#define TPS65912_LEDB_CTRL5 0x53 -#define TPS65912_LEDB_CTRL6 0x54 -#define TPS65912_LEDB_CTRL7 0x55 -#define TPS65912_LEDB_CTRL8 0x56 -#define TPS65912_LEDC_CTRL1 0x57 -#define TPS65912_LEDC_CTRL2 0x58 -#define TPS65912_LEDC_CTRL3 0x59 -#define TPS65912_LEDC_CTRL4 0x5A -#define TPS65912_LEDC_CTRL5 0x5B -#define TPS65912_LEDC_CTRL6 0x5C -#define TPS65912_LEDC_CTRL7 0x5D -#define TPS65912_LEDC_CTRL8 0x5E -#define TPS65912_LED_RAMP_UP_TIME 0x5F -#define TPS65912_LED_RAMP_DOWN_TIME 0x60 -#define TPS65912_LED_SEQ_EN 0x61 -#define TPS65912_LOADSWITCH 0x62 -#define TPS65912_SPARE 0x63 -#define TPS65912_VERNUM 0x64 -#define TPS6591X_MAX_REGISTER 0x64 - -/* IRQ Definitions */ -#define TPS65912_IRQ_PWRHOLD_F 0 -#define TPS65912_IRQ_VMON 1 -#define TPS65912_IRQ_PWRON 2 -#define TPS65912_IRQ_PWRON_LP 3 -#define TPS65912_IRQ_PWRHOLD_R 4 -#define TPS65912_IRQ_HOTDIE 5 -#define TPS65912_IRQ_GPIO1_R 6 -#define TPS65912_IRQ_GPIO1_F 7 -#define TPS65912_IRQ_GPIO2_R 8 -#define TPS65912_IRQ_GPIO2_F 9 -#define TPS65912_IRQ_GPIO3_R 10 -#define TPS65912_IRQ_GPIO3_F 11 -#define TPS65912_IRQ_GPIO4_R 12 -#define TPS65912_IRQ_GPIO4_F 13 -#define TPS65912_IRQ_GPIO5_R 14 -#define TPS65912_IRQ_GPIO5_F 15 -#define TPS65912_IRQ_PGOOD_DCDC1 16 -#define TPS65912_IRQ_PGOOD_DCDC2 17 -#define TPS65912_IRQ_PGOOD_DCDC3 18 -#define TPS65912_IRQ_PGOOD_DCDC4 19 -#define TPS65912_IRQ_PGOOD_LDO1 20 -#define TPS65912_IRQ_PGOOD_LDO2 21 -#define TPS65912_IRQ_PGOOD_LDO3 22 -#define TPS65912_IRQ_PGOOD_LDO4 23 -#define TPS65912_IRQ_PGOOD_LDO5 24 -#define TPS65912_IRQ_PGOOD_LDO6 25 -#define TPS65912_IRQ_PGOOD_LDO7 26 -#define TPS65912_IRQ_PGOOD_LD08 27 -#define TPS65912_IRQ_PGOOD_LDO9 28 -#define TPS65912_IRQ_PGOOD_LDO10 29 - -#define TPS65912_NUM_IRQ 30 - -/* GPIO 1 and 2 Register Definitions */ -#define GPIO_SLEEP_MASK 0x80 -#define GPIO_SLEEP_SHIFT 7 -#define GPIO_DEB_MASK 0x10 -#define GPIO_DEB_SHIFT 4 -#define GPIO_CFG_MASK 0x04 -#define GPIO_CFG_SHIFT 2 -#define GPIO_STS_MASK 0x02 -#define GPIO_STS_SHIFT 1 -#define GPIO_SET_MASK 0x01 -#define GPIO_SET_SHIFT 0 - -/* GPIO 3 Register Definitions */ -#define GPIO3_SLEEP_MASK 0x80 -#define GPIO3_SLEEP_SHIFT 7 -#define GPIO3_SEL_MASK 0x40 -#define GPIO3_SEL_SHIFT 6 -#define GPIO3_ODEN_MASK 0x20 -#define GPIO3_ODEN_SHIFT 5 -#define GPIO3_DEB_MASK 0x10 -#define GPIO3_DEB_SHIFT 4 -#define GPIO3_PDEN_MASK 0x08 -#define GPIO3_PDEN_SHIFT 3 -#define GPIO3_CFG_MASK 0x04 -#define GPIO3_CFG_SHIFT 2 -#define GPIO3_STS_MASK 0x02 -#define GPIO3_STS_SHIFT 1 -#define GPIO3_SET_MASK 0x01 -#define GPIO3_SET_SHIFT 0 - -/* GPIO 4 Register Definitions */ -#define GPIO4_SLEEP_MASK 0x80 -#define GPIO4_SLEEP_SHIFT 7 -#define GPIO4_SEL_MASK 0x40 -#define GPIO4_SEL_SHIFT 6 -#define GPIO4_ODEN_MASK 0x20 -#define GPIO4_ODEN_SHIFT 5 -#define GPIO4_DEB_MASK 0x10 -#define GPIO4_DEB_SHIFT 4 -#define GPIO4_PDEN_MASK 0x08 -#define GPIO4_PDEN_SHIFT 3 -#define GPIO4_CFG_MASK 0x04 -#define GPIO4_CFG_SHIFT 2 -#define GPIO4_STS_MASK 0x02 -#define GPIO4_STS_SHIFT 1 -#define GPIO4_SET_MASK 0x01 -#define GPIO4_SET_SHIFT 0 - -/* Register THERM (0x80) register.RegisterDescription */ -#define THERM_THERM_HD_MASK 0x20 -#define THERM_THERM_HD_SHIFT 5 -#define THERM_THERM_TS_MASK 0x10 -#define THERM_THERM_TS_SHIFT 4 -#define THERM_THERM_HDSEL_MASK 0x0C -#define THERM_THERM_HDSEL_SHIFT 2 -#define THERM_RSVD1_MASK 0x02 -#define THERM_RSVD1_SHIFT 1 -#define THERM_THERM_STATE_MASK 0x01 -#define THERM_THERM_STATE_SHIFT 0 - -/* Register DCDCCTRL1 register.RegisterDescription */ -#define DCDCCTRL_VCON_ENABLE_MASK 0x80 -#define DCDCCTRL_VCON_ENABLE_SHIFT 7 -#define DCDCCTRL_VCON_RANGE1_MASK 0x40 -#define DCDCCTRL_VCON_RANGE1_SHIFT 6 -#define DCDCCTRL_VCON_RANGE0_MASK 0x20 -#define DCDCCTRL_VCON_RANGE0_SHIFT 5 -#define DCDCCTRL_TSTEP2_MASK 0x10 -#define DCDCCTRL_TSTEP2_SHIFT 4 -#define DCDCCTRL_TSTEP1_MASK 0x08 -#define DCDCCTRL_TSTEP1_SHIFT 3 -#define DCDCCTRL_TSTEP0_MASK 0x04 -#define DCDCCTRL_TSTEP0_SHIFT 2 -#define DCDCCTRL_DCDC1_MODE_MASK 0x02 -#define DCDCCTRL_DCDC1_MODE_SHIFT 1 - -/* Register DCDCCTRL2 and DCDCCTRL3 register.RegisterDescription */ -#define DCDCCTRL_TSTEP2_MASK 0x10 -#define DCDCCTRL_TSTEP2_SHIFT 4 -#define DCDCCTRL_TSTEP1_MASK 0x08 -#define DCDCCTRL_TSTEP1_SHIFT 3 -#define DCDCCTRL_TSTEP0_MASK 0x04 -#define DCDCCTRL_TSTEP0_SHIFT 2 -#define DCDCCTRL_DCDC_MODE_MASK 0x02 -#define DCDCCTRL_DCDC_MODE_SHIFT 1 -#define DCDCCTRL_RSVD0_MASK 0x01 -#define DCDCCTRL_RSVD0_SHIFT 0 - -/* Register DCDCCTRL4 register.RegisterDescription */ -#define DCDCCTRL_RAMP_TIME_MASK 0x01 -#define DCDCCTRL_RAMP_TIME_SHIFT 0 - -/* Register DCDCx_AVS */ -#define DCDC_AVS_ENABLE_MASK 0x80 -#define DCDC_AVS_ENABLE_SHIFT 7 -#define DCDC_AVS_ECO_MASK 0x40 -#define DCDC_AVS_ECO_SHIFT 6 - -/* Register DCDCx_LIMIT */ -#define DCDC_LIMIT_RANGE_MASK 0xC0 -#define DCDC_LIMIT_RANGE_SHIFT 6 -#define DCDC_LIMIT_MAX_SEL_MASK 0x3F -#define DCDC_LIMIT_MAX_SEL_SHIFT 0 - -/** - * struct tps65912_board - * Board platform dat may be used to initialize regulators. - */ -struct tps65912_board { - int is_dcdc1_avs; - int is_dcdc2_avs; - int is_dcdc3_avs; - int is_dcdc4_avs; - int irq; - int irq_base; - int gpio_base; - struct regulator_init_data *tps65912_pmic_init_data; -}; - -/** - * struct tps65912 - tps65912 sub-driver chip access routines - */ - -struct tps65912 { - struct device *dev; - /* for read/write acces */ - struct mutex io_mutex; - - /* For device IO interfaces: I2C or SPI */ - void *control_data; - - int (*read)(struct tps65912 *tps65912, u8 reg, int size, void *dest); - int (*write)(struct tps65912 *tps65912, u8 reg, int size, void *src); - - /* Client devices */ - struct tps65912_pmic *pmic; - - /* GPIO Handling */ - struct gpio_chip gpio; - - /* IRQ Handling */ - struct mutex irq_lock; - int chip_irq; - int irq_base; - int irq_num; - u32 irq_mask; -}; - -struct tps65912_platform_data { - int irq; - int irq_base; -}; - -unsigned int tps_chip(void); - -int tps65912_set_bits(struct tps65912 *tps65912, u8 reg, u8 mask); -int tps65912_clear_bits(struct tps65912 *tps65912, u8 reg, u8 mask); -int tps65912_reg_read(struct tps65912 *tps65912, u8 reg); -int tps65912_reg_write(struct tps65912 *tps65912, u8 reg, u8 val); -int tps65912_device_init(struct tps65912 *tps65912); -void tps65912_device_exit(struct tps65912 *tps65912); -int tps65912_irq_init(struct tps65912 *tps65912, int irq, - struct tps65912_platform_data *pdata); -int tps65912_irq_exit(struct tps65912 *tps65912); - -#endif /* __LINUX_MFD_TPS65912_H */ -- cgit v1.2.3 From 796f5692daac4ea47fa5252af742976cd1955f0b Mon Sep 17 00:00:00 2001 From: "Andrew F. Davis" Date: Mon, 25 Jan 2016 09:43:45 -0600 Subject: mfd: tps65912: Add driver for the TPS65912 PMIC This patch adds support for TPS65912 PMIC MFD core. It provides communication through the I2C and SPI interfaces. It contains the following components: - Regulators - GPIO controller Signed-off-by: Andrew F. Davis Signed-off-by: Lee Jones --- include/linux/mfd/tps65912.h | 341 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 341 insertions(+) create mode 100644 include/linux/mfd/tps65912.h (limited to 'include/linux') diff --git a/include/linux/mfd/tps65912.h b/include/linux/mfd/tps65912.h new file mode 100644 index 000000000000..1a603701550e --- /dev/null +++ b/include/linux/mfd/tps65912.h @@ -0,0 +1,341 @@ +/* + * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/ + * Andrew F. Davis + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether expressed or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License version 2 for more details. + * + * Based on the TPS65218 driver and the previous TPS65912 driver by + * Margarita Olaya Cabrera + */ + +#ifndef __LINUX_MFD_TPS65912_H +#define __LINUX_MFD_TPS65912_H + +#include +#include + +/* List of registers for TPS65912 */ +#define TPS65912_DCDC1_CTRL 0x00 +#define TPS65912_DCDC2_CTRL 0x01 +#define TPS65912_DCDC3_CTRL 0x02 +#define TPS65912_DCDC4_CTRL 0x03 +#define TPS65912_DCDC1_OP 0x04 +#define TPS65912_DCDC1_AVS 0x05 +#define TPS65912_DCDC1_LIMIT 0x06 +#define TPS65912_DCDC2_OP 0x07 +#define TPS65912_DCDC2_AVS 0x08 +#define TPS65912_DCDC2_LIMIT 0x09 +#define TPS65912_DCDC3_OP 0x0A +#define TPS65912_DCDC3_AVS 0x0B +#define TPS65912_DCDC3_LIMIT 0x0C +#define TPS65912_DCDC4_OP 0x0D +#define TPS65912_DCDC4_AVS 0x0E +#define TPS65912_DCDC4_LIMIT 0x0F +#define TPS65912_LDO1_OP 0x10 +#define TPS65912_LDO1_AVS 0x11 +#define TPS65912_LDO1_LIMIT 0x12 +#define TPS65912_LDO2_OP 0x13 +#define TPS65912_LDO2_AVS 0x14 +#define TPS65912_LDO2_LIMIT 0x15 +#define TPS65912_LDO3_OP 0x16 +#define TPS65912_LDO3_AVS 0x17 +#define TPS65912_LDO3_LIMIT 0x18 +#define TPS65912_LDO4_OP 0x19 +#define TPS65912_LDO4_AVS 0x1A +#define TPS65912_LDO4_LIMIT 0x1B +#define TPS65912_LDO5 0x1C +#define TPS65912_LDO6 0x1D +#define TPS65912_LDO7 0x1E +#define TPS65912_LDO8 0x1F +#define TPS65912_LDO9 0x20 +#define TPS65912_LDO10 0x21 +#define TPS65912_THRM 0x22 +#define TPS65912_CLK32OUT 0x23 +#define TPS65912_DEVCTRL 0x24 +#define TPS65912_DEVCTRL2 0x25 +#define TPS65912_I2C_SPI_CFG 0x26 +#define TPS65912_KEEP_ON 0x27 +#define TPS65912_KEEP_ON2 0x28 +#define TPS65912_SET_OFF1 0x29 +#define TPS65912_SET_OFF2 0x2A +#define TPS65912_DEF_VOLT 0x2B +#define TPS65912_DEF_VOLT_MAPPING 0x2C +#define TPS65912_DISCHARGE 0x2D +#define TPS65912_DISCHARGE2 0x2E +#define TPS65912_EN1_SET1 0x2F +#define TPS65912_EN1_SET2 0x30 +#define TPS65912_EN2_SET1 0x31 +#define TPS65912_EN2_SET2 0x32 +#define TPS65912_EN3_SET1 0x33 +#define TPS65912_EN3_SET2 0x34 +#define TPS65912_EN4_SET1 0x35 +#define TPS65912_EN4_SET2 0x36 +#define TPS65912_PGOOD 0x37 +#define TPS65912_PGOOD2 0x38 +#define TPS65912_INT_STS 0x39 +#define TPS65912_INT_MSK 0x3A +#define TPS65912_INT_STS2 0x3B +#define TPS65912_INT_MSK2 0x3C +#define TPS65912_INT_STS3 0x3D +#define TPS65912_INT_MSK3 0x3E +#define TPS65912_INT_STS4 0x3F +#define TPS65912_INT_MSK4 0x40 +#define TPS65912_GPIO1 0x41 +#define TPS65912_GPIO2 0x42 +#define TPS65912_GPIO3 0x43 +#define TPS65912_GPIO4 0x44 +#define TPS65912_GPIO5 0x45 +#define TPS65912_VMON 0x46 +#define TPS65912_LEDA_CTRL1 0x47 +#define TPS65912_LEDA_CTRL2 0x48 +#define TPS65912_LEDA_CTRL3 0x49 +#define TPS65912_LEDA_CTRL4 0x4A +#define TPS65912_LEDA_CTRL5 0x4B +#define TPS65912_LEDA_CTRL6 0x4C +#define TPS65912_LEDA_CTRL7 0x4D +#define TPS65912_LEDA_CTRL8 0x4E +#define TPS65912_LEDB_CTRL1 0x4F +#define TPS65912_LEDB_CTRL2 0x50 +#define TPS65912_LEDB_CTRL3 0x51 +#define TPS65912_LEDB_CTRL4 0x52 +#define TPS65912_LEDB_CTRL5 0x53 +#define TPS65912_LEDB_CTRL6 0x54 +#define TPS65912_LEDB_CTRL7 0x55 +#define TPS65912_LEDB_CTRL8 0x56 +#define TPS65912_LEDC_CTRL1 0x57 +#define TPS65912_LEDC_CTRL2 0x58 +#define TPS65912_LEDC_CTRL3 0x59 +#define TPS65912_LEDC_CTRL4 0x5A +#define TPS65912_LEDC_CTRL5 0x5B +#define TPS65912_LEDC_CTRL6 0x5C +#define TPS65912_LEDC_CTRL7 0x5D +#define TPS65912_LEDC_CTRL8 0x5E +#define TPS65912_LED_RAMP_UP_TIME 0x5F +#define TPS65912_LED_RAMP_DOWN_TIME 0x60 +#define TPS65912_LED_SEQ_EN 0x61 +#define TPS65912_LOADSWITCH 0x62 +#define TPS65912_SPARE 0x63 +#define TPS65912_VERNUM 0x64 +#define TPS6591X_MAX_REGISTER 0x64 + +/* INT_STS Register field definitions */ +#define TPS65912_INT_STS_PWRHOLD_F BIT(0) +#define TPS65912_INT_STS_VMON BIT(1) +#define TPS65912_INT_STS_PWRON BIT(2) +#define TPS65912_INT_STS_PWRON_LP BIT(3) +#define TPS65912_INT_STS_PWRHOLD_R BIT(4) +#define TPS65912_INT_STS_HOTDIE BIT(5) +#define TPS65912_INT_STS_GPIO1_R BIT(6) +#define TPS65912_INT_STS_GPIO1_F BIT(7) + +/* INT_STS Register field definitions */ +#define TPS65912_INT_STS2_GPIO2_R BIT(0) +#define TPS65912_INT_STS2_GPIO2_F BIT(1) +#define TPS65912_INT_STS2_GPIO3_R BIT(2) +#define TPS65912_INT_STS2_GPIO3_F BIT(3) +#define TPS65912_INT_STS2_GPIO4_R BIT(4) +#define TPS65912_INT_STS2_GPIO4_F BIT(5) +#define TPS65912_INT_STS2_GPIO5_R BIT(6) +#define TPS65912_INT_STS2_GPIO5_F BIT(7) + +/* INT_STS Register field definitions */ +#define TPS65912_INT_STS3_PGOOD_DCDC1 BIT(0) +#define TPS65912_INT_STS3_PGOOD_DCDC2 BIT(1) +#define TPS65912_INT_STS3_PGOOD_DCDC3 BIT(2) +#define TPS65912_INT_STS3_PGOOD_DCDC4 BIT(3) +#define TPS65912_INT_STS3_PGOOD_LDO1 BIT(4) +#define TPS65912_INT_STS3_PGOOD_LDO2 BIT(5) +#define TPS65912_INT_STS3_PGOOD_LDO3 BIT(6) +#define TPS65912_INT_STS3_PGOOD_LDO4 BIT(7) + +/* INT_STS Register field definitions */ +#define TPS65912_INT_STS4_PGOOD_LDO5 BIT(0) +#define TPS65912_INT_STS4_PGOOD_LDO6 BIT(1) +#define TPS65912_INT_STS4_PGOOD_LDO7 BIT(2) +#define TPS65912_INT_STS4_PGOOD_LDO8 BIT(3) +#define TPS65912_INT_STS4_PGOOD_LDO9 BIT(4) +#define TPS65912_INT_STS4_PGOOD_LDO10 BIT(5) + +/* GPIO 1 and 2 Register field definitions */ +#define GPIO_SLEEP_MASK 0x80 +#define GPIO_SLEEP_SHIFT 7 +#define GPIO_DEB_MASK 0x10 +#define GPIO_DEB_SHIFT 4 +#define GPIO_CFG_MASK 0x04 +#define GPIO_CFG_SHIFT 2 +#define GPIO_STS_MASK 0x02 +#define GPIO_STS_SHIFT 1 +#define GPIO_SET_MASK 0x01 +#define GPIO_SET_SHIFT 0 + +/* GPIO 3 Register field definitions */ +#define GPIO3_SLEEP_MASK 0x80 +#define GPIO3_SLEEP_SHIFT 7 +#define GPIO3_SEL_MASK 0x40 +#define GPIO3_SEL_SHIFT 6 +#define GPIO3_ODEN_MASK 0x20 +#define GPIO3_ODEN_SHIFT 5 +#define GPIO3_DEB_MASK 0x10 +#define GPIO3_DEB_SHIFT 4 +#define GPIO3_PDEN_MASK 0x08 +#define GPIO3_PDEN_SHIFT 3 +#define GPIO3_CFG_MASK 0x04 +#define GPIO3_CFG_SHIFT 2 +#define GPIO3_STS_MASK 0x02 +#define GPIO3_STS_SHIFT 1 +#define GPIO3_SET_MASK 0x01 +#define GPIO3_SET_SHIFT 0 + +/* GPIO 4 Register field definitions */ +#define GPIO4_SLEEP_MASK 0x80 +#define GPIO4_SLEEP_SHIFT 7 +#define GPIO4_SEL_MASK 0x40 +#define GPIO4_SEL_SHIFT 6 +#define GPIO4_ODEN_MASK 0x20 +#define GPIO4_ODEN_SHIFT 5 +#define GPIO4_DEB_MASK 0x10 +#define GPIO4_DEB_SHIFT 4 +#define GPIO4_PDEN_MASK 0x08 +#define GPIO4_PDEN_SHIFT 3 +#define GPIO4_CFG_MASK 0x04 +#define GPIO4_CFG_SHIFT 2 +#define GPIO4_STS_MASK 0x02 +#define GPIO4_STS_SHIFT 1 +#define GPIO4_SET_MASK 0x01 +#define GPIO4_SET_SHIFT 0 + +/* Register THERM (0x80) register.RegisterDescription */ +#define THERM_THERM_HD_MASK 0x20 +#define THERM_THERM_HD_SHIFT 5 +#define THERM_THERM_TS_MASK 0x10 +#define THERM_THERM_TS_SHIFT 4 +#define THERM_THERM_HDSEL_MASK 0x0C +#define THERM_THERM_HDSEL_SHIFT 2 +#define THERM_RSVD1_MASK 0x02 +#define THERM_RSVD1_SHIFT 1 +#define THERM_THERM_STATE_MASK 0x01 +#define THERM_THERM_STATE_SHIFT 0 + +/* Register DCDCCTRL1 register.RegisterDescription */ +#define DCDCCTRL_VCON_ENABLE_MASK 0x80 +#define DCDCCTRL_VCON_ENABLE_SHIFT 7 +#define DCDCCTRL_VCON_RANGE1_MASK 0x40 +#define DCDCCTRL_VCON_RANGE1_SHIFT 6 +#define DCDCCTRL_VCON_RANGE0_MASK 0x20 +#define DCDCCTRL_VCON_RANGE0_SHIFT 5 +#define DCDCCTRL_TSTEP2_MASK 0x10 +#define DCDCCTRL_TSTEP2_SHIFT 4 +#define DCDCCTRL_TSTEP1_MASK 0x08 +#define DCDCCTRL_TSTEP1_SHIFT 3 +#define DCDCCTRL_TSTEP0_MASK 0x04 +#define DCDCCTRL_TSTEP0_SHIFT 2 +#define DCDCCTRL_DCDC1_MODE_MASK 0x02 +#define DCDCCTRL_DCDC1_MODE_SHIFT 1 + +/* Register DCDCCTRL2 and DCDCCTRL3 register.RegisterDescription */ +#define DCDCCTRL_TSTEP2_MASK 0x10 +#define DCDCCTRL_TSTEP2_SHIFT 4 +#define DCDCCTRL_TSTEP1_MASK 0x08 +#define DCDCCTRL_TSTEP1_SHIFT 3 +#define DCDCCTRL_TSTEP0_MASK 0x04 +#define DCDCCTRL_TSTEP0_SHIFT 2 +#define DCDCCTRL_DCDC_MODE_MASK 0x02 +#define DCDCCTRL_DCDC_MODE_SHIFT 1 +#define DCDCCTRL_RSVD0_MASK 0x01 +#define DCDCCTRL_RSVD0_SHIFT 0 + +/* Register DCDCCTRL4 register.RegisterDescription */ +#define DCDCCTRL_RAMP_TIME_MASK 0x01 +#define DCDCCTRL_RAMP_TIME_SHIFT 0 + +/* Register DCDCx_AVS */ +#define DCDC_AVS_ENABLE_MASK 0x80 +#define DCDC_AVS_ENABLE_SHIFT 7 +#define DCDC_AVS_ECO_MASK 0x40 +#define DCDC_AVS_ECO_SHIFT 6 + +/* Register DCDCx_LIMIT */ +#define DCDC_LIMIT_RANGE_MASK 0xC0 +#define DCDC_LIMIT_RANGE_SHIFT 6 +#define DCDC_LIMIT_MAX_SEL_MASK 0x3F +#define DCDC_LIMIT_MAX_SEL_SHIFT 0 + +/* Define the TPS65912 IRQ numbers */ +enum tps65912_irqs { + /* INT_STS registers */ + TPS65912_IRQ_PWRHOLD_F, + TPS65912_IRQ_VMON, + TPS65912_IRQ_PWRON, + TPS65912_IRQ_PWRON_LP, + TPS65912_IRQ_PWRHOLD_R, + TPS65912_IRQ_HOTDIE, + TPS65912_IRQ_GPIO1_R, + TPS65912_IRQ_GPIO1_F, + /* INT_STS2 registers */ + TPS65912_IRQ_GPIO2_R, + TPS65912_IRQ_GPIO2_F, + TPS65912_IRQ_GPIO3_R, + TPS65912_IRQ_GPIO3_F, + TPS65912_IRQ_GPIO4_R, + TPS65912_IRQ_GPIO4_F, + TPS65912_IRQ_GPIO5_R, + TPS65912_IRQ_GPIO5_F, + /* INT_STS3 registers */ + TPS65912_IRQ_PGOOD_DCDC1, + TPS65912_IRQ_PGOOD_DCDC2, + TPS65912_IRQ_PGOOD_DCDC3, + TPS65912_IRQ_PGOOD_DCDC4, + TPS65912_IRQ_PGOOD_LDO1, + TPS65912_IRQ_PGOOD_LDO2, + TPS65912_IRQ_PGOOD_LDO3, + TPS65912_IRQ_PGOOD_LDO4, + /* INT_STS4 registers */ + TPS65912_IRQ_PGOOD_LDO5, + TPS65912_IRQ_PGOOD_LDO6, + TPS65912_IRQ_PGOOD_LDO7, + TPS65912_IRQ_PGOOD_LDO8, + TPS65912_IRQ_PGOOD_LDO9, + TPS65912_IRQ_PGOOD_LDO10, +}; + +/* + * struct tps65912 - state holder for the tps65912 driver + * + * Device data may be used to access the TPS65912 chip + */ +struct tps65912 { + struct device *dev; + struct regmap *regmap; + + /* IRQ Data */ + int irq; + struct regmap_irq_chip_data *irq_data; +}; + +static const struct regmap_range tps65912_yes_ranges[] = { + regmap_reg_range(TPS65912_INT_STS, TPS65912_GPIO5), +}; + +static const struct regmap_access_table tps65912_volatile_table = { + .yes_ranges = tps65912_yes_ranges, + .n_yes_ranges = ARRAY_SIZE(tps65912_yes_ranges), +}; + +static const struct regmap_config tps65912_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .cache_type = REGCACHE_RBTREE, + .volatile_table = &tps65912_volatile_table, +}; + +int tps65912_device_init(struct tps65912 *tps); +int tps65912_device_exit(struct tps65912 *tps); + +#endif /* __LINUX_MFD_TPS65912_H */ -- cgit v1.2.3 From afbc4f312b5e6e87fcd383eb6764e09f1324c78e Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 9 Feb 2016 13:21:06 +0100 Subject: gpio: move sysfs mock device to the gpio_device Since gpio_device is the struct that survives if the backing gpio_chip is removed, move the sysfs mock device to this state container so it becomes part of the dangling state of the GPIO device on removal. Signed-off-by: Linus Walleij --- include/linux/gpio/driver.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include/linux') diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index f3f1dbd43c9b..4db64ab534ef 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -24,7 +24,6 @@ struct gpio_device; * @label: for diagnostics * @gpiodev: the internal state holder, opaque struct * @parent: optional parent device providing the GPIOs - * @cdev: class device used by sysfs interface (may be NULL) * @owner: helps prevent removal of modules exporting active GPIOs * @data: per-instance data assigned by the driver * @request: optional hook for chip-specific activation, such as @@ -110,7 +109,6 @@ struct gpio_chip { const char *label; struct gpio_device *gpiodev; struct device *parent; - struct device *cdev; struct module *owner; void *data; -- cgit v1.2.3 From 1c3cdb186172ee3be24005a7ff0e849bc17b67b8 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 9 Feb 2016 13:51:59 +0100 Subject: gpio: move descriptors into gpio_device We need gpio_device to hold the descriptors so that they can be lifecycled with the struct gpio_device held from userspace. Move the descriptor array into gpio_device. Also rename it from "desc" (singularis) to "descs" (pluralis) to reflect the fact that it is an array. Signed-off-by: Linus Walleij --- include/linux/gpio/driver.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include/linux') diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index 4db64ab534ef..bfc842c2fc57 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -52,7 +52,6 @@ struct gpio_device; * get rid of the static GPIO number space in the long run. * @ngpio: the number of GPIOs handled by this controller; the last GPIO * handled is (base + ngpio - 1). - * @desc: array of ngpio descriptors. Private. * @names: if set, must be an array of strings to use as alternative * names for the GPIOs in this chip. Any entry in the array * may be NULL if there is no alias for the GPIO, however the @@ -140,7 +139,6 @@ struct gpio_chip { struct gpio_chip *chip); int base; u16 ngpio; - struct gpio_desc *desc; const char *const *names; bool can_sleep; bool irq_not_threaded; -- cgit v1.2.3 From 6cee3821e4e4bd6e6cdf0870b6c72d455460bd39 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Thu, 11 Feb 2016 20:16:45 +0100 Subject: gpio/pinctrl: sunxi: stop poking around in private vars This kind of hacks disturbs the refactoring of the gpiolib. The descriptor table belongs to the gpiolib, if we want to know something about something in it, use or define the proper accessor functions. Let's add this gpiochip_lins_is_irq() to do what the sunxi driver is trying at so we can privatize the descriptors properly. Cc: Maxime Ripard Cc: Chen-Yu Tsai Signed-off-by: Linus Walleij --- include/linux/gpio/driver.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/linux') diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index bfc842c2fc57..41c6144c473b 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -208,6 +208,7 @@ extern struct gpio_chip *gpiochip_find(void *data, /* lock/unlock as IRQ */ int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset); void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset); +bool gpiochip_line_is_irq(struct gpio_chip *chip, unsigned int offset); /* get driver data */ static inline void *gpiochip_get_data(struct gpio_chip *chip) -- cgit v1.2.3 From 20ec3e39fc12cf3a331ee73eb01d52bddcdd2fa4 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Thu, 11 Feb 2016 11:03:06 +0100 Subject: gpio: move the pin ranges into gpio_device Instead of keeping this reference to the pin ranges in the client driver-supplied gpio_chip, move it to the internal gpio_device as the drivers have no need to inspect this. Signed-off-by: Linus Walleij --- include/linux/gpio/driver.h | 9 --------- 1 file changed, 9 deletions(-) (limited to 'include/linux') diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index 41c6144c473b..e2a934ce3e64 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -181,15 +181,6 @@ struct gpio_chip { int (*of_xlate)(struct gpio_chip *gc, const struct of_phandle_args *gpiospec, u32 *flags); #endif -#ifdef CONFIG_PINCTRL - /* - * If CONFIG_PINCTRL is enabled, then gpio controllers can optionally - * describe the actual pin range which they serve in an SoC. This - * information would be used by pinctrl subsystem to configure - * corresponding pins for gpio usage. - */ - struct list_head pin_ranges; -#endif }; extern const char *gpiochip_is_requested(struct gpio_chip *chip, -- cgit v1.2.3 From 43c54ecade400cf6ca8203f960b525fbe5b73a13 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Thu, 11 Feb 2016 11:37:48 +0100 Subject: gpio: move the subdriver data pointer into gpio_device We move to manage this pointer under gpiolib control rather than leave it in the subdevice's gpio_chip. We can not NULL it after gpiochip_remove so at to keep things tight. Signed-off-by: Linus Walleij --- include/linux/gpio/driver.h | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) (limited to 'include/linux') diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index e2a934ce3e64..b92ab9efdb69 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -25,7 +25,6 @@ struct gpio_device; * @gpiodev: the internal state holder, opaque struct * @parent: optional parent device providing the GPIOs * @owner: helps prevent removal of modules exporting active GPIOs - * @data: per-instance data assigned by the driver * @request: optional hook for chip-specific activation, such as * enabling module power and clock; may sleep * @free: optional hook for chip-specific deactivation, such as @@ -109,7 +108,6 @@ struct gpio_chip { struct gpio_device *gpiodev; struct device *parent; struct module *owner; - void *data; int (*request)(struct gpio_chip *chip, unsigned offset); @@ -202,10 +200,7 @@ void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset); bool gpiochip_line_is_irq(struct gpio_chip *chip, unsigned int offset); /* get driver data */ -static inline void *gpiochip_get_data(struct gpio_chip *chip) -{ - return chip->data; -} +void *gpiochip_get_data(struct gpio_chip *chip); struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc); -- cgit v1.2.3 From 143b65d677a59764e438d457bf2510b3fa5b90f8 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 16 Feb 2016 15:41:42 +0100 Subject: gpio: create an API to detect open drain/source on lines My left hand merges code to privatize the descriptor handling while my right hand merges drivers that poke around and disrespect with the same gpiolib internals. So let's expose the proper APIs for drivers to ask the gpiolib core if a line is marked as open drain or open source and get some order around things so this driver compiles again. Reported-by: Stephen Rothwell Cc: Nicolas Saenz Julienne Signed-off-by: Linus Walleij --- include/linux/gpio/driver.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include/linux') diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index b92ab9efdb69..ff96d0f9fceb 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -199,6 +199,10 @@ int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset); void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset); bool gpiochip_line_is_irq(struct gpio_chip *chip, unsigned int offset); +/* Line status inquiry for drivers */ +bool gpiochip_line_is_open_drain(struct gpio_chip *chip, unsigned int offset); +bool gpiochip_line_is_open_source(struct gpio_chip *chip, unsigned int offset); + /* get driver data */ void *gpiochip_get_data(struct gpio_chip *chip); -- cgit v1.2.3 From ee2204a37957daed80418ea8ffc4f5c3146fb8e7 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Tue, 16 Feb 2016 16:40:35 +0100 Subject: gpio: remove broken irq_to_gpio() interface gpiolib has removed the irq_to_gpio() API several years ago, but the global header still provided a non-working stub. To prevent new users of this broken function from showing up, let's remove the stubs as well. Signed-off-by: Arnd Bergmann Signed-off-by: Linus Walleij --- include/linux/gpio.h | 12 ------------ 1 file changed, 12 deletions(-) (limited to 'include/linux') diff --git a/include/linux/gpio.h b/include/linux/gpio.h index d12b5d566e4b..6fc1c9e74854 100644 --- a/include/linux/gpio.h +++ b/include/linux/gpio.h @@ -70,11 +70,6 @@ static inline int gpio_to_irq(unsigned int gpio) return __gpio_to_irq(gpio); } -static inline int irq_to_gpio(unsigned int irq) -{ - return -EINVAL; -} - #endif /* ! CONFIG_ARCH_HAVE_CUSTOM_GPIO_H */ /* CONFIG_GPIOLIB: bindings for managed devices that want to request gpios */ @@ -222,13 +217,6 @@ static inline void gpiochip_unlock_as_irq(struct gpio_chip *chip, WARN_ON(1); } -static inline int irq_to_gpio(unsigned irq) -{ - /* irq can never have been returned from gpio_to_irq() */ - WARN_ON(1); - return -EINVAL; -} - static inline int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, unsigned int gpio_offset, unsigned int pin_offset, -- cgit v1.2.3 From df4878e969ccc047da45d2cd3af5d08031da1593 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Fri, 12 Feb 2016 14:48:23 +0100 Subject: gpio: store reflect the label to userspace The gpio_chip label is useful for userspace to understand what kind of GPIO chip it is dealing with. Let's store a copy of this label in the gpio_device, add it to the struct passed to userspace for GPIO_GET_CHIPINFO_IOCTL and modify lsgpio to show it. Signed-off-by: Linus Walleij --- include/linux/gpio/driver.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include/linux') diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index ff96d0f9fceb..639607658ed8 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -21,7 +21,8 @@ struct gpio_device; /** * struct gpio_chip - abstract a GPIO controller - * @label: for diagnostics + * @label: a functional name for the GPIO device, such as a part + * number or the name of the SoC IP-block implementing it. * @gpiodev: the internal state holder, opaque struct * @parent: optional parent device providing the GPIOs * @owner: helps prevent removal of modules exporting active GPIOs -- cgit v1.2.3 From 2307f3aab887bc43e0f262d298977fd9c6b9eee3 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Sat, 20 Feb 2016 12:53:31 +0100 Subject: Revert "gpio: remove broken irq_to_gpio() interface" This reverts commit ee2204a37957daed80418ea8ffc4f5c3146fb8e7. --- include/linux/gpio.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'include/linux') diff --git a/include/linux/gpio.h b/include/linux/gpio.h index 6fc1c9e74854..d12b5d566e4b 100644 --- a/include/linux/gpio.h +++ b/include/linux/gpio.h @@ -70,6 +70,11 @@ static inline int gpio_to_irq(unsigned int gpio) return __gpio_to_irq(gpio); } +static inline int irq_to_gpio(unsigned int irq) +{ + return -EINVAL; +} + #endif /* ! CONFIG_ARCH_HAVE_CUSTOM_GPIO_H */ /* CONFIG_GPIOLIB: bindings for managed devices that want to request gpios */ @@ -217,6 +222,13 @@ static inline void gpiochip_unlock_as_irq(struct gpio_chip *chip, WARN_ON(1); } +static inline int irq_to_gpio(unsigned irq) +{ + /* irq can never have been returned from gpio_to_irq() */ + WARN_ON(1); + return -EINVAL; +} + static inline int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, unsigned int gpio_offset, unsigned int pin_offset, -- cgit v1.2.3 From 0cf3292cde22f8843ae5d1eeb8466d8121243c1a Mon Sep 17 00:00:00 2001 From: Laxman Dewangan Date: Mon, 15 Feb 2016 16:32:09 +0530 Subject: gpio: Add devm_ apis for gpiochip_add_data and gpiochip_remove Add device managed APIs devm_gpiochip_add_data() and devm_gpiochip_remove() for the APIs gpiochip_add_data() and gpiochip_remove(). This helps in reducing code in error path and sometimes removal of .remove callback for driver unbind. Signed-off-by: Laxman Dewangan --- include/linux/gpio/driver.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include/linux') diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index 639607658ed8..bee976f82788 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -192,6 +192,10 @@ static inline int gpiochip_add(struct gpio_chip *chip) return gpiochip_add_data(chip, NULL); } extern void gpiochip_remove(struct gpio_chip *chip); +extern int devm_gpiochip_add_data(struct device *dev, struct gpio_chip *chip, + void *data); +extern void devm_gpiochip_remove(struct device *dev, struct gpio_chip *chip); + extern struct gpio_chip *gpiochip_find(void *data, int (*match)(struct gpio_chip *chip, void *data)); -- cgit v1.2.3 From 3fab91ea284a3b795327dda915a3c150a49e4be2 Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Mon, 29 Feb 2016 21:08:19 +0800 Subject: gpio: lp3943: Drop pin_used and lp3943_gpio_request/lp3943_gpio_free The implementation of lp3943_gpio_request/lp3943_gpio_free test pin_used for tracing the pin usage. However, gpiolib already checks FLAG_REQUESTED flag for the same purpose. So remove the redundant implementation. Signed-off-by: Axel Lin Signed-off-by: Linus Walleij --- include/linux/mfd/lp3943.h | 6 ------ 1 file changed, 6 deletions(-) (limited to 'include/linux') diff --git a/include/linux/mfd/lp3943.h b/include/linux/mfd/lp3943.h index 3490db782988..d3a738118b27 100644 --- a/include/linux/mfd/lp3943.h +++ b/include/linux/mfd/lp3943.h @@ -94,18 +94,12 @@ struct lp3943_reg_cfg { * @regmap: Used for I2C communication on accessing registers * @pdata: LP3943 platform specific data * @mux_cfg: Register configuration for pin MUX - * @pin_used: Bit mask for output pin used. - * This bitmask is used for pin assignment management. - * 1 = pin used, 0 = available. - * Only LSB 16 bits are used, but it is unsigned long type - * for atomic bitwise operations. */ struct lp3943 { struct device *dev; struct regmap *regmap; struct lp3943_platform_data *pdata; const struct lp3943_reg_cfg *mux_cfg; - unsigned long pin_used; }; int lp3943_read_byte(struct lp3943 *lp3943, u8 reg, u8 *read); -- cgit v1.2.3 From 70aba44b6cade8dc63261c4f97d5e83b0c02d07a Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Wed, 9 Mar 2016 22:00:27 +0700 Subject: Revert "gpio: lp3943: Drop pin_used and lp3943_gpio_request/lp3943_gpio_free" This reverts commit 3fab91ea284a3b795327dda915a3c150a49e4be2. --- include/linux/mfd/lp3943.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include/linux') diff --git a/include/linux/mfd/lp3943.h b/include/linux/mfd/lp3943.h index d3a738118b27..3490db782988 100644 --- a/include/linux/mfd/lp3943.h +++ b/include/linux/mfd/lp3943.h @@ -94,12 +94,18 @@ struct lp3943_reg_cfg { * @regmap: Used for I2C communication on accessing registers * @pdata: LP3943 platform specific data * @mux_cfg: Register configuration for pin MUX + * @pin_used: Bit mask for output pin used. + * This bitmask is used for pin assignment management. + * 1 = pin used, 0 = available. + * Only LSB 16 bits are used, but it is unsigned long type + * for atomic bitwise operations. */ struct lp3943 { struct device *dev; struct regmap *regmap; struct lp3943_platform_data *pdata; const struct lp3943_reg_cfg *mux_cfg; + unsigned long pin_used; }; int lp3943_read_byte(struct lp3943 *lp3943, u8 reg, u8 *read); -- cgit v1.2.3