From 6be2b3d0848d1ed3e78e416cc4ae9007e85c7533 Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Mon, 6 Jun 2016 16:58:20 -0700 Subject: soc: qcom: wcnss_ctrl: Make wcnss_ctrl parent the other components We need the signal from wcnss_ctrl indicating that the firmware is up and running before we can communicate with the other components of the chip. So make these other components children of the wcnss_ctrl device, so they can be probed in order. The process seems to take between 1/2-5 seconds, so this is done in a worker, instead of holding up the probe. Signed-off-by: Bjorn Andersson Signed-off-by: Andy Gross --- include/linux/soc/qcom/wcnss_ctrl.h | 8 ++++++++ 1 file changed, 8 insertions(+) create mode 100644 include/linux/soc/qcom/wcnss_ctrl.h (limited to 'include/linux') diff --git a/include/linux/soc/qcom/wcnss_ctrl.h b/include/linux/soc/qcom/wcnss_ctrl.h new file mode 100644 index 000000000000..a37bc5538f19 --- /dev/null +++ b/include/linux/soc/qcom/wcnss_ctrl.h @@ -0,0 +1,8 @@ +#ifndef __WCNSS_CTRL_H__ +#define __WCNSS_CTRL_H__ + +#include + +struct qcom_smd_channel *qcom_wcnss_open_channel(void *wcnss, const char *name, qcom_smd_cb_t cb); + +#endif -- cgit v1.2.3 From f01e90fe34f563a5e189d4070de4a23948105642 Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Wed, 23 Sep 2015 12:56:12 -0700 Subject: firmware: qcom: scm: Peripheral Authentication Service This adds the Peripheral Authentication Service (PAS) interface to the Qualcomm SCM interface. The API is used to authenticate and boot a range of external processors in various Qualcomm platforms. Signed-off-by: Bjorn Andersson Signed-off-by: Andy Gross --- include/linux/qcom_scm.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'include/linux') diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h index 9e12000914b3..cc32ab852fbc 100644 --- a/include/linux/qcom_scm.h +++ b/include/linux/qcom_scm.h @@ -29,6 +29,14 @@ extern bool qcom_scm_hdcp_available(void); extern int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp); +extern bool qcom_scm_pas_supported(u32 peripheral); +extern int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, + size_t size); +extern int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, + phys_addr_t size); +extern int qcom_scm_pas_auth_and_reset(u32 peripheral); +extern int qcom_scm_pas_shutdown(u32 peripheral); + #define QCOM_SCM_CPU_PWR_DOWN_L2_ON 0x0 #define QCOM_SCM_CPU_PWR_DOWN_L2_OFF 0x1 -- cgit v1.2.3