From f8b5036361412a27c07a4ac9c3a4b80678cbd1e1 Mon Sep 17 00:00:00 2001 From: Gabriel Fernandez Date: Tue, 13 Dec 2016 15:20:12 +0100 Subject: clk: stm32f4: Update DT bindings documentation Creation of dt include file for specific stm32f4 clocks. These specific clocks are not derived from system clock (SYSCLOCK) We should use index 1 to use these clocks in DT. e.g. <&rcc 1 CLK_LSI> Signed-off-by: Gabriel Fernandez Acked-by: Rob Herring Signed-off-by: Stephen Boyd --- include/dt-bindings/clock/stm32fx-clock.h | 39 +++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 include/dt-bindings/clock/stm32fx-clock.h (limited to 'include') diff --git a/include/dt-bindings/clock/stm32fx-clock.h b/include/dt-bindings/clock/stm32fx-clock.h new file mode 100644 index 000000000000..08bcab61b714 --- /dev/null +++ b/include/dt-bindings/clock/stm32fx-clock.h @@ -0,0 +1,39 @@ +/* + * stm32fx-clock.h + * + * Copyright (C) 2016 STMicroelectronics + * Author: Gabriel Fernandez for STMicroelectronics. + * License terms: GNU General Public License (GPL), version 2 + */ + +/* + * List of clocks wich are not derived from system clock (SYSCLOCK) + * + * The index of these clocks is the secondary index of DT bindings + * (see Documentatoin/devicetree/bindings/clock/st,stm32-rcc.txt) + * + * e.g: + ; +*/ + +#ifndef _DT_BINDINGS_CLK_STMFX_H +#define _DT_BINDINGS_CLK_STMFX_H + +#define SYSTICK 0 +#define FCLK 1 +#define CLK_LSI 2 +#define CLK_LSE 3 +#define CLK_HSE_RTC 4 +#define CLK_RTC 5 +#define PLL_VCO_I2S 6 +#define PLL_VCO_SAI 7 +#define CLK_LCD 8 +#define CLK_I2S 9 +#define CLK_SAI1 10 +#define CLK_SAI2 11 +#define CLK_I2SQ_PDIV 12 +#define CLK_SAIQ_PDIV 13 + +#define END_PRIMARY_CLK 14 + +#endif -- cgit v1.2.3 From be20fe159d000ca6d8ce0b7b10f8787d879490ab Mon Sep 17 00:00:00 2001 From: Gabriel Fernandez Date: Tue, 13 Dec 2016 15:20:00 +0100 Subject: clk: stm32f4: Update DT bindings documentation Creation of dt include file for specific stm32f4 clocks. These specific clocks are not derived from system clock (SYSCLOCK) We should use index 1 to use these clocks in DT. e.g. <&rcc 1 CLK_LSI> Signed-off-by: Gabriel Fernandez Acked-by: Rob Herring --- include/dt-bindings/clock/stm32fx-clock.h | 39 +++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 include/dt-bindings/clock/stm32fx-clock.h (limited to 'include') diff --git a/include/dt-bindings/clock/stm32fx-clock.h b/include/dt-bindings/clock/stm32fx-clock.h new file mode 100644 index 000000000000..08bcab61b714 --- /dev/null +++ b/include/dt-bindings/clock/stm32fx-clock.h @@ -0,0 +1,39 @@ +/* + * stm32fx-clock.h + * + * Copyright (C) 2016 STMicroelectronics + * Author: Gabriel Fernandez for STMicroelectronics. + * License terms: GNU General Public License (GPL), version 2 + */ + +/* + * List of clocks wich are not derived from system clock (SYSCLOCK) + * + * The index of these clocks is the secondary index of DT bindings + * (see Documentatoin/devicetree/bindings/clock/st,stm32-rcc.txt) + * + * e.g: + ; +*/ + +#ifndef _DT_BINDINGS_CLK_STMFX_H +#define _DT_BINDINGS_CLK_STMFX_H + +#define SYSTICK 0 +#define FCLK 1 +#define CLK_LSI 2 +#define CLK_LSE 3 +#define CLK_HSE_RTC 4 +#define CLK_RTC 5 +#define PLL_VCO_I2S 6 +#define PLL_VCO_SAI 7 +#define CLK_LCD 8 +#define CLK_I2S 9 +#define CLK_SAI1 10 +#define CLK_SAI2 11 +#define CLK_I2SQ_PDIV 12 +#define CLK_SAIQ_PDIV 13 + +#define END_PRIMARY_CLK 14 + +#endif -- cgit v1.2.3 From cfddd3db08f619bf0c1764b3103caedb6793bc48 Mon Sep 17 00:00:00 2001 From: Chris Brandt Date: Mon, 23 Jan 2017 08:55:18 -0500 Subject: ARM: dts: r7s72100: add ostm clock to device tree Signed-off-by: Chris Brandt Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- include/dt-bindings/clock/r7s72100-clock.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/dt-bindings/clock/r7s72100-clock.h b/include/dt-bindings/clock/r7s72100-clock.h index 29e01ed10e74..ce09915c298f 100644 --- a/include/dt-bindings/clock/r7s72100-clock.h +++ b/include/dt-bindings/clock/r7s72100-clock.h @@ -25,6 +25,10 @@ #define R7S72100_CLK_SCIF6 1 #define R7S72100_CLK_SCIF7 0 +/* MSTP5 */ +#define R7S72100_CLK_OSTM0 1 +#define R7S72100_CLK_OSTM1 0 + /* MSTP7 */ #define R7S72100_CLK_ETHER 4 -- cgit v1.2.3 From 982b159297d025687cfc84add4e56fd1cac40dc2 Mon Sep 17 00:00:00 2001 From: Gabriel Fernandez Date: Wed, 1 Feb 2017 14:09:00 +0100 Subject: dt-bindings: mfd: stm32f4: Fix STM32F4_X_CLOCK() macro Macro to select a clock was not correct. Offset of enable register starts at 0x30, then calculation to select a bit is: (@enable_reg - 0x30) / 4 * 32 + bit_to_select Tested-by: M'boumba Cedric Madianga Acked-by: Stephen Boyd Acked-by: Lee Jones Signed-off-by: Gabriel Fernandez Signed-off-by: Alexandre TORGUE --- include/dt-bindings/mfd/stm32f4-rcc.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/dt-bindings/mfd/stm32f4-rcc.h b/include/dt-bindings/mfd/stm32f4-rcc.h index e98942dc0d44..f662b191026b 100644 --- a/include/dt-bindings/mfd/stm32f4-rcc.h +++ b/include/dt-bindings/mfd/stm32f4-rcc.h @@ -25,7 +25,7 @@ #define STM32F4_RCC_AHB1_OTGHS 29 #define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8)) -#define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit + (0x30 * 8)) +#define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit) /* AHB2 */ @@ -36,13 +36,13 @@ #define STM32F4_RCC_AHB2_OTGFS 7 #define STM32F4_AHB2_RESET(bit) (STM32F4_RCC_AHB2_##bit + (0x14 * 8)) -#define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + (0x34 * 8)) +#define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + 0x20) /* AHB3 */ #define STM32F4_RCC_AHB3_FMC 0 #define STM32F4_AHB3_RESET(bit) (STM32F4_RCC_AHB3_##bit + (0x18 * 8)) -#define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + (0x38 * 8)) +#define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + 0x40) /* APB1 */ #define STM32F4_RCC_APB1_TIM2 0 @@ -72,7 +72,7 @@ #define STM32F4_RCC_APB1_UART8 31 #define STM32F4_APB1_RESET(bit) (STM32F4_RCC_APB1_##bit + (0x20 * 8)) -#define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + (0x40 * 8)) +#define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + 0x80) /* APB2 */ #define STM32F4_RCC_APB2_TIM1 0 @@ -93,6 +93,6 @@ #define STM32F4_RCC_APB2_LTDC 26 #define STM32F4_APB2_RESET(bit) (STM32F4_RCC_APB2_##bit + (0x24 * 8)) -#define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + (0x44 * 8)) +#define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + 0xA0) #endif /* _DT_BINDINGS_MFD_STM32F4_RCC_H */ -- cgit v1.2.3 From 2cfb397b1506d0ed99ee00e3690bf206d75c94b1 Mon Sep 17 00:00:00 2001 From: Gabriel Fernandez Date: Wed, 1 Feb 2017 14:09:00 +0100 Subject: dt-bindings: mfd: stm32f4: Add missing binding definition This patch adds missing binding definition (backupram, ethernet, otg, qspi, adc & dsi) Acked-by: Lee Jones Signed-off-by: Gabriel Fernandez Signed-off-by: Alexandre TORGUE --- include/dt-bindings/mfd/stm32f4-rcc.h | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/dt-bindings/mfd/stm32f4-rcc.h b/include/dt-bindings/mfd/stm32f4-rcc.h index f662b191026b..082a81c94298 100644 --- a/include/dt-bindings/mfd/stm32f4-rcc.h +++ b/include/dt-bindings/mfd/stm32f4-rcc.h @@ -18,11 +18,17 @@ #define STM32F4_RCC_AHB1_GPIOJ 9 #define STM32F4_RCC_AHB1_GPIOK 10 #define STM32F4_RCC_AHB1_CRC 12 +#define STM32F4_RCC_AHB1_BKPSRAM 18 +#define STM32F4_RCC_AHB1_CCMDATARAM 20 #define STM32F4_RCC_AHB1_DMA1 21 #define STM32F4_RCC_AHB1_DMA2 22 #define STM32F4_RCC_AHB1_DMA2D 23 #define STM32F4_RCC_AHB1_ETHMAC 25 -#define STM32F4_RCC_AHB1_OTGHS 29 +#define STM32F4_RCC_AHB1_ETHMACTX 26 +#define STM32F4_RCC_AHB1_ETHMACRX 27 +#define STM32F4_RCC_AHB1_ETHMACPTP 28 +#define STM32F4_RCC_AHB1_OTGHS 29 +#define STM32F4_RCC_AHB1_OTGHSULPI 30 #define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8)) #define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit) @@ -40,6 +46,7 @@ /* AHB3 */ #define STM32F4_RCC_AHB3_FMC 0 +#define STM32F4_RCC_AHB3_QSPI 1 #define STM32F4_AHB3_RESET(bit) (STM32F4_RCC_AHB3_##bit + (0x18 * 8)) #define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + 0x40) @@ -79,7 +86,9 @@ #define STM32F4_RCC_APB2_TIM8 1 #define STM32F4_RCC_APB2_USART1 4 #define STM32F4_RCC_APB2_USART6 5 -#define STM32F4_RCC_APB2_ADC 8 +#define STM32F4_RCC_APB2_ADC1 8 +#define STM32F4_RCC_APB2_ADC2 9 +#define STM32F4_RCC_APB2_ADC3 10 #define STM32F4_RCC_APB2_SDIO 11 #define STM32F4_RCC_APB2_SPI1 12 #define STM32F4_RCC_APB2_SPI4 13 @@ -91,6 +100,7 @@ #define STM32F4_RCC_APB2_SPI6 21 #define STM32F4_RCC_APB2_SAI1 22 #define STM32F4_RCC_APB2_LTDC 26 +#define STM32F4_RCC_APB2_DSI 27 #define STM32F4_APB2_RESET(bit) (STM32F4_RCC_APB2_##bit + (0x24 * 8)) #define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + 0xA0) -- cgit v1.2.3