From 8af70cd2ca508061088d5059ba8a8218aca7ddf1 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Fri, 20 Apr 2018 10:14:27 -0700 Subject: memory: aemif: add support for board files Currently aemif is supported in two places separately. By the platform driver in drivers/memory and by a hand crafted driver in mach-davinci. We want to drop the latter but also keep the legacy mode. Add support for board files to the aemif driver. The new structure in platform data currently only contains the chip select number, since currently existing users don't require anything else, but it can be extended in the future. While extending the platform data struct, add kernel docs describing its members. Signed-off-by: Bartosz Golaszewski Signed-off-by: Santosh Shilimkar --- include/linux/platform_data/ti-aemif.h | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) (limited to 'include') diff --git a/include/linux/platform_data/ti-aemif.h b/include/linux/platform_data/ti-aemif.h index ac72e115093c..e6407bafcbf8 100644 --- a/include/linux/platform_data/ti-aemif.h +++ b/include/linux/platform_data/ti-aemif.h @@ -16,8 +16,33 @@ #include +/** + * struct aemif_abus_data - Async bus configuration parameters. + * + * @cs - Chip-select number. + */ +struct aemif_abus_data { + u32 cs; +}; + +/** + * struct aemif_platform_data - Data to set up the TI aemif driver. + * + * @dev_lookup: of_dev_auxdata passed to of_platform_populate() for aemif + * subdevices. + * @cs_offset: Lowest allowed chip-select number. + * @abus_data: Array of async bus configuration entries. + * @num_abus_data: Number of abus entries. + * @sub_devices: Array of platform subdevices. + * @num_sub_devices: Number of subdevices. + */ struct aemif_platform_data { struct of_dev_auxdata *dev_lookup; + u32 cs_offset; + struct aemif_abus_data *abus_data; + size_t num_abus_data; + struct platform_device *sub_devices; + size_t num_sub_devices; }; #endif /* __TI_DAVINCI_AEMIF_DATA_H__ */ -- cgit v1.2.3 From 5c8d08f3471265dfd2f6db6d381751848dbf7db3 Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Mon, 9 Apr 2018 22:28:26 +0300 Subject: dt-bindings: memory: tegra: Add hot resets definitions Add definitions for the Tegra20+ memory controller hot resets. Signed-off-by: Dmitry Osipenko Reviewed-by: Rob Herring Signed-off-by: Thierry Reding --- include/dt-bindings/memory/tegra114-mc.h | 19 +++++++++++++++++++ include/dt-bindings/memory/tegra124-mc.h | 25 +++++++++++++++++++++++++ include/dt-bindings/memory/tegra20-mc.h | 21 +++++++++++++++++++++ include/dt-bindings/memory/tegra210-mc.h | 31 +++++++++++++++++++++++++++++++ include/dt-bindings/memory/tegra30-mc.h | 19 +++++++++++++++++++ 5 files changed, 115 insertions(+) create mode 100644 include/dt-bindings/memory/tegra20-mc.h (limited to 'include') diff --git a/include/dt-bindings/memory/tegra114-mc.h b/include/dt-bindings/memory/tegra114-mc.h index 27c8386987ff..54a12adec7b8 100644 --- a/include/dt-bindings/memory/tegra114-mc.h +++ b/include/dt-bindings/memory/tegra114-mc.h @@ -23,4 +23,23 @@ #define TEGRA_SWGROUP_EMUCIF 18 #define TEGRA_SWGROUP_TSEC 19 +#define TEGRA114_MC_RESET_AFI 0 +#define TEGRA114_MC_RESET_AVPC 1 +#define TEGRA114_MC_RESET_DC 2 +#define TEGRA114_MC_RESET_DCB 3 +#define TEGRA114_MC_RESET_EPP 4 +#define TEGRA114_MC_RESET_2D 5 +#define TEGRA114_MC_RESET_HC 6 +#define TEGRA114_MC_RESET_HDA 7 +#define TEGRA114_MC_RESET_ISP 8 +#define TEGRA114_MC_RESET_MPCORE 9 +#define TEGRA114_MC_RESET_MPCORELP 10 +#define TEGRA114_MC_RESET_MPE 11 +#define TEGRA114_MC_RESET_3D 12 +#define TEGRA114_MC_RESET_3D2 13 +#define TEGRA114_MC_RESET_PPCS 14 +#define TEGRA114_MC_RESET_SATA 15 +#define TEGRA114_MC_RESET_VDE 16 +#define TEGRA114_MC_RESET_VI 17 + #endif diff --git a/include/dt-bindings/memory/tegra124-mc.h b/include/dt-bindings/memory/tegra124-mc.h index f534d7c06019..186e6b7e9b35 100644 --- a/include/dt-bindings/memory/tegra124-mc.h +++ b/include/dt-bindings/memory/tegra124-mc.h @@ -29,4 +29,29 @@ #define TEGRA_SWGROUP_VIC 24 #define TEGRA_SWGROUP_VI 25 +#define TEGRA124_MC_RESET_AFI 0 +#define TEGRA124_MC_RESET_AVPC 1 +#define TEGRA124_MC_RESET_DC 2 +#define TEGRA124_MC_RESET_DCB 3 +#define TEGRA124_MC_RESET_HC 4 +#define TEGRA124_MC_RESET_HDA 5 +#define TEGRA124_MC_RESET_ISP2 6 +#define TEGRA124_MC_RESET_MPCORE 7 +#define TEGRA124_MC_RESET_MPCORELP 8 +#define TEGRA124_MC_RESET_MSENC 9 +#define TEGRA124_MC_RESET_PPCS 10 +#define TEGRA124_MC_RESET_SATA 11 +#define TEGRA124_MC_RESET_VDE 12 +#define TEGRA124_MC_RESET_VI 13 +#define TEGRA124_MC_RESET_VIC 14 +#define TEGRA124_MC_RESET_XUSB_HOST 15 +#define TEGRA124_MC_RESET_XUSB_DEV 16 +#define TEGRA124_MC_RESET_TSEC 17 +#define TEGRA124_MC_RESET_SDMMC1 18 +#define TEGRA124_MC_RESET_SDMMC2 19 +#define TEGRA124_MC_RESET_SDMMC3 20 +#define TEGRA124_MC_RESET_SDMMC4 21 +#define TEGRA124_MC_RESET_ISP2B 22 +#define TEGRA124_MC_RESET_GPU 23 + #endif diff --git a/include/dt-bindings/memory/tegra20-mc.h b/include/dt-bindings/memory/tegra20-mc.h new file mode 100644 index 000000000000..35e131eee198 --- /dev/null +++ b/include/dt-bindings/memory/tegra20-mc.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef DT_BINDINGS_MEMORY_TEGRA20_MC_H +#define DT_BINDINGS_MEMORY_TEGRA20_MC_H + +#define TEGRA20_MC_RESET_AVPC 0 +#define TEGRA20_MC_RESET_DC 1 +#define TEGRA20_MC_RESET_DCB 2 +#define TEGRA20_MC_RESET_EPP 3 +#define TEGRA20_MC_RESET_2D 4 +#define TEGRA20_MC_RESET_HC 5 +#define TEGRA20_MC_RESET_ISP 6 +#define TEGRA20_MC_RESET_MPCORE 7 +#define TEGRA20_MC_RESET_MPEA 8 +#define TEGRA20_MC_RESET_MPEB 9 +#define TEGRA20_MC_RESET_MPEC 10 +#define TEGRA20_MC_RESET_3D 11 +#define TEGRA20_MC_RESET_PPCS 12 +#define TEGRA20_MC_RESET_VDE 13 +#define TEGRA20_MC_RESET_VI 14 + +#endif diff --git a/include/dt-bindings/memory/tegra210-mc.h b/include/dt-bindings/memory/tegra210-mc.h index 4490f7cf4772..cacf05617e03 100644 --- a/include/dt-bindings/memory/tegra210-mc.h +++ b/include/dt-bindings/memory/tegra210-mc.h @@ -34,4 +34,35 @@ #define TEGRA_SWGROUP_ETR 29 #define TEGRA_SWGROUP_TSECB 30 +#define TEGRA210_MC_RESET_AFI 0 +#define TEGRA210_MC_RESET_AVPC 1 +#define TEGRA210_MC_RESET_DC 2 +#define TEGRA210_MC_RESET_DCB 3 +#define TEGRA210_MC_RESET_HC 4 +#define TEGRA210_MC_RESET_HDA 5 +#define TEGRA210_MC_RESET_ISP2 6 +#define TEGRA210_MC_RESET_MPCORE 7 +#define TEGRA210_MC_RESET_NVENC 8 +#define TEGRA210_MC_RESET_PPCS 9 +#define TEGRA210_MC_RESET_SATA 10 +#define TEGRA210_MC_RESET_VI 11 +#define TEGRA210_MC_RESET_VIC 12 +#define TEGRA210_MC_RESET_XUSB_HOST 13 +#define TEGRA210_MC_RESET_XUSB_DEV 14 +#define TEGRA210_MC_RESET_A9AVP 15 +#define TEGRA210_MC_RESET_TSEC 16 +#define TEGRA210_MC_RESET_SDMMC1 17 +#define TEGRA210_MC_RESET_SDMMC2 18 +#define TEGRA210_MC_RESET_SDMMC3 19 +#define TEGRA210_MC_RESET_SDMMC4 20 +#define TEGRA210_MC_RESET_ISP2B 21 +#define TEGRA210_MC_RESET_GPU 22 +#define TEGRA210_MC_RESET_NVDEC 23 +#define TEGRA210_MC_RESET_APE 24 +#define TEGRA210_MC_RESET_SE 25 +#define TEGRA210_MC_RESET_NVJPG 26 +#define TEGRA210_MC_RESET_AXIAP 27 +#define TEGRA210_MC_RESET_ETR 28 +#define TEGRA210_MC_RESET_TSECB 29 + #endif diff --git a/include/dt-bindings/memory/tegra30-mc.h b/include/dt-bindings/memory/tegra30-mc.h index 3cac81919023..169f005fbc78 100644 --- a/include/dt-bindings/memory/tegra30-mc.h +++ b/include/dt-bindings/memory/tegra30-mc.h @@ -22,4 +22,23 @@ #define TEGRA_SWGROUP_MPCORE 17 #define TEGRA_SWGROUP_ISP 18 +#define TEGRA30_MC_RESET_AFI 0 +#define TEGRA30_MC_RESET_AVPC 1 +#define TEGRA30_MC_RESET_DC 2 +#define TEGRA30_MC_RESET_DCB 3 +#define TEGRA30_MC_RESET_EPP 4 +#define TEGRA30_MC_RESET_2D 5 +#define TEGRA30_MC_RESET_HC 6 +#define TEGRA30_MC_RESET_HDA 7 +#define TEGRA30_MC_RESET_ISP 8 +#define TEGRA30_MC_RESET_MPCORE 9 +#define TEGRA30_MC_RESET_MPCORELP 10 +#define TEGRA30_MC_RESET_MPE 11 +#define TEGRA30_MC_RESET_3D 12 +#define TEGRA30_MC_RESET_3D2 13 +#define TEGRA30_MC_RESET_PPCS 14 +#define TEGRA30_MC_RESET_SATA 15 +#define TEGRA30_MC_RESET_VDE 16 +#define TEGRA30_MC_RESET_VI 17 + #endif -- cgit v1.2.3 From 1c74d5c0de0c2cc29fef97a19251da2ad6f579bd Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Mon, 9 Apr 2018 22:28:29 +0300 Subject: memory: tegra: Apply interrupts mask per SoC Currently we are enabling handling of interrupts specific to Tegra124+ which happen to overlap with previous generations. Let's specify interrupts mask per SoC generation for consistency and in a preparation of squashing of Tegra20 driver into the common one that will enable handling of GART faults which may be undesirable by newer generations. Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding --- include/soc/tegra/mc.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/soc/tegra/mc.h b/include/soc/tegra/mc.h index 233bae954970..be6e49124c6d 100644 --- a/include/soc/tegra/mc.h +++ b/include/soc/tegra/mc.h @@ -108,6 +108,8 @@ struct tegra_mc_soc { u8 client_id_mask; const struct tegra_smmu_soc *smmu; + + u32 intmask; }; struct tegra_mc { -- cgit v1.2.3 From a8d502fd33484ed8c4acc6acae73918844ca6811 Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Mon, 9 Apr 2018 22:28:31 +0300 Subject: memory: tegra: Squash tegra20-mc into common tegra-mc driver Tegra30+ has some minor differences in registers / bits layout compared to Tegra20. Let's squash Tegra20 driver into the common tegra-mc driver in a preparation for the upcoming MC hot reset controls implementation, avoiding code duplication. Note that this currently doesn't report the value of MC_GART_ERROR_REQ because it is located within the GART register area and cannot be safely accessed from the MC driver (this happens to work only by accident). The proper solution is to integrate the GART driver with the MC driver, much like is done for the Tegra SMMU, but that is an invasive change and will be part of a separate patch series. Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding --- include/soc/tegra/mc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/soc/tegra/mc.h b/include/soc/tegra/mc.h index be6e49124c6d..bea7fe776825 100644 --- a/include/soc/tegra/mc.h +++ b/include/soc/tegra/mc.h @@ -115,7 +115,7 @@ struct tegra_mc_soc { struct tegra_mc { struct device *dev; struct tegra_smmu *smmu; - void __iomem *regs; + void __iomem *regs, *regs2; struct clk *clk; int irq; -- cgit v1.2.3 From 20e92462cdfb2772e9d784ec355c90b61ec10222 Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Fri, 13 Apr 2018 14:33:49 +0300 Subject: memory: tegra: Introduce memory client hot reset In order to reset busy HW properly, memory controller needs to be involved, otherwise it is possible to get corrupted memory or hang machine if HW was reset during DMA. Introduce memory client 'hot reset' that will be used for resetting of busy HW. Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding --- include/soc/tegra/mc.h | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) (limited to 'include') diff --git a/include/soc/tegra/mc.h b/include/soc/tegra/mc.h index bea7fe776825..b43f37fea096 100644 --- a/include/soc/tegra/mc.h +++ b/include/soc/tegra/mc.h @@ -9,6 +9,7 @@ #ifndef __SOC_TEGRA_MC_H__ #define __SOC_TEGRA_MC_H__ +#include #include struct clk; @@ -95,6 +96,30 @@ static inline void tegra_smmu_remove(struct tegra_smmu *smmu) } #endif +struct tegra_mc_reset { + const char *name; + unsigned long id; + unsigned int control; + unsigned int status; + unsigned int reset; + unsigned int bit; +}; + +struct tegra_mc_reset_ops { + int (*hotreset_assert)(struct tegra_mc *mc, + const struct tegra_mc_reset *rst); + int (*hotreset_deassert)(struct tegra_mc *mc, + const struct tegra_mc_reset *rst); + int (*block_dma)(struct tegra_mc *mc, + const struct tegra_mc_reset *rst); + bool (*dma_idling)(struct tegra_mc *mc, + const struct tegra_mc_reset *rst); + int (*unblock_dma)(struct tegra_mc *mc, + const struct tegra_mc_reset *rst); + int (*reset_status)(struct tegra_mc *mc, + const struct tegra_mc_reset *rst); +}; + struct tegra_mc_soc { const struct tegra_mc_client *clients; unsigned int num_clients; @@ -110,6 +135,10 @@ struct tegra_mc_soc { const struct tegra_smmu_soc *smmu; u32 intmask; + + const struct tegra_mc_reset_ops *reset_ops; + const struct tegra_mc_reset *resets; + unsigned int num_resets; }; struct tegra_mc { @@ -124,6 +153,10 @@ struct tegra_mc { struct tegra_mc_timing *timings; unsigned int num_timings; + + struct reset_controller_dev reset; + + spinlock_t lock; }; void tegra_mc_write_emem_configuration(struct tegra_mc *mc, unsigned long rate); -- cgit v1.2.3 From 1e0a601437a6111ecf384df010812c53cada6497 Mon Sep 17 00:00:00 2001 From: Lokesh Vutla Date: Fri, 4 May 2018 23:10:23 -0700 Subject: firmware: ti_sci: Switch to SPDX Licensing Switch to SPDX licensing and drop the GPL text which comes redundant. Acked-by: Nishanth Menon Signed-off-by: Lokesh Vutla Signed-off-by: Santosh Shilimkar --- include/linux/soc/ti/ti_sci_protocol.h | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) (limited to 'include') diff --git a/include/linux/soc/ti/ti_sci_protocol.h b/include/linux/soc/ti/ti_sci_protocol.h index 0ccbc138c26a..18435e5c6364 100644 --- a/include/linux/soc/ti/ti_sci_protocol.h +++ b/include/linux/soc/ti/ti_sci_protocol.h @@ -1,17 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 /* * Texas Instruments System Control Interface Protocol * * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/ * Nishanth Menon - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ #ifndef __TISCI_PROTOCOL_H -- cgit v1.2.3 From 1baf47c2e5c946fd17ef07597b9d25722d13ff14 Mon Sep 17 00:00:00 2001 From: Sudeep Holla Date: Wed, 9 May 2018 17:52:06 +0100 Subject: firmware: arm_scmi: fix kernel-docs documentation There are few missing descriptions for function parameters and structure members along with certain instances where excessive function parameters or structure members are described. This patch fixes all of those warnings. Reported-by: Jonathan Cameron Signed-off-by: Sudeep Holla --- include/linux/scmi_protocol.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'include') diff --git a/include/linux/scmi_protocol.h b/include/linux/scmi_protocol.h index b458c87b866c..a171c1e293e8 100644 --- a/include/linux/scmi_protocol.h +++ b/include/linux/scmi_protocol.h @@ -189,6 +189,14 @@ struct scmi_sensor_ops { * @perf_ops: pointer to set of performance protocol operations * @clk_ops: pointer to set of clock protocol operations * @sensor_ops: pointer to set of sensor protocol operations + * @perf_priv: pointer to private data structure specific to performance + * protocol(for internal use only) + * @clk_priv: pointer to private data structure specific to clock + * protocol(for internal use only) + * @power_priv: pointer to private data structure specific to power + * protocol(for internal use only) + * @sensor_priv: pointer to private data structure specific to sensors + * protocol(for internal use only) */ struct scmi_handle { struct device *dev; -- cgit v1.2.3 From 7859e08c1bdef00841d29e8ff320264fd6f9257b Mon Sep 17 00:00:00 2001 From: Sudeep Holla Date: Wed, 9 May 2018 17:52:06 +0100 Subject: firmware: arm_scmi: rename get_transition_latency and add_opps_to_device Most of the scmi code follows the suggestion from Greg KH on a totally different thread[0] to have the subsystem name first, followed by the noun and finally the verb with couple of these exceptions. This patch fixes them so that all the functions names are aligned to that practice. [0] https://www.spinics.net/lists/arm-kernel/msg583673.html Acked-by: Rafael J. Wysocki Signed-off-by: Sudeep Holla --- include/linux/scmi_protocol.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/linux/scmi_protocol.h b/include/linux/scmi_protocol.h index a171c1e293e8..f4c9fc0fc755 100644 --- a/include/linux/scmi_protocol.h +++ b/include/linux/scmi_protocol.h @@ -85,8 +85,8 @@ struct scmi_clk_ops { * @level_set: sets the performance level of a domain * @level_get: gets the performance level of a domain * @device_domain_id: gets the scmi domain id for a given device - * @get_transition_latency: gets the DVFS transition latency for a given device - * @add_opps_to_device: adds all the OPPs for a given device + * @transition_latency_get: gets the DVFS transition latency for a given device + * @device_opps_add: adds all the OPPs for a given device * @freq_set: sets the frequency for a given device using sustained frequency * to sustained performance level mapping * @freq_get: gets the frequency for a given device using sustained frequency @@ -102,10 +102,10 @@ struct scmi_perf_ops { int (*level_get)(const struct scmi_handle *handle, u32 domain, u32 *level, bool poll); int (*device_domain_id)(struct device *dev); - int (*get_transition_latency)(const struct scmi_handle *handle, + int (*transition_latency_get)(const struct scmi_handle *handle, struct device *dev); - int (*add_opps_to_device)(const struct scmi_handle *handle, - struct device *dev); + int (*device_opps_add)(const struct scmi_handle *handle, + struct device *dev); int (*freq_set)(const struct scmi_handle *handle, u32 domain, unsigned long rate, bool poll); int (*freq_get)(const struct scmi_handle *handle, u32 domain, -- cgit v1.2.3 From a1be3cfdfb81cc55c1b2feb73aca6945f61acddb Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Tue, 8 May 2018 19:49:46 +0300 Subject: dt-bindings: memory: tegra: Remove Tegra114 SATA and AFI reset definitions Tegra114 doesn't have SATA nor PCIe, but TRM seems erroneously document them. Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding --- include/dt-bindings/memory/tegra114-mc.h | 34 +++++++++++++++----------------- 1 file changed, 16 insertions(+), 18 deletions(-) (limited to 'include') diff --git a/include/dt-bindings/memory/tegra114-mc.h b/include/dt-bindings/memory/tegra114-mc.h index 54a12adec7b8..dfe99c8a5ba5 100644 --- a/include/dt-bindings/memory/tegra114-mc.h +++ b/include/dt-bindings/memory/tegra114-mc.h @@ -23,23 +23,21 @@ #define TEGRA_SWGROUP_EMUCIF 18 #define TEGRA_SWGROUP_TSEC 19 -#define TEGRA114_MC_RESET_AFI 0 -#define TEGRA114_MC_RESET_AVPC 1 -#define TEGRA114_MC_RESET_DC 2 -#define TEGRA114_MC_RESET_DCB 3 -#define TEGRA114_MC_RESET_EPP 4 -#define TEGRA114_MC_RESET_2D 5 -#define TEGRA114_MC_RESET_HC 6 -#define TEGRA114_MC_RESET_HDA 7 -#define TEGRA114_MC_RESET_ISP 8 -#define TEGRA114_MC_RESET_MPCORE 9 -#define TEGRA114_MC_RESET_MPCORELP 10 -#define TEGRA114_MC_RESET_MPE 11 -#define TEGRA114_MC_RESET_3D 12 -#define TEGRA114_MC_RESET_3D2 13 -#define TEGRA114_MC_RESET_PPCS 14 -#define TEGRA114_MC_RESET_SATA 15 -#define TEGRA114_MC_RESET_VDE 16 -#define TEGRA114_MC_RESET_VI 17 +#define TEGRA114_MC_RESET_AVPC 0 +#define TEGRA114_MC_RESET_DC 1 +#define TEGRA114_MC_RESET_DCB 2 +#define TEGRA114_MC_RESET_EPP 3 +#define TEGRA114_MC_RESET_2D 4 +#define TEGRA114_MC_RESET_HC 5 +#define TEGRA114_MC_RESET_HDA 6 +#define TEGRA114_MC_RESET_ISP 7 +#define TEGRA114_MC_RESET_MPCORE 8 +#define TEGRA114_MC_RESET_MPCORELP 9 +#define TEGRA114_MC_RESET_MPE 10 +#define TEGRA114_MC_RESET_3D 11 +#define TEGRA114_MC_RESET_3D2 12 +#define TEGRA114_MC_RESET_PPCS 13 +#define TEGRA114_MC_RESET_VDE 14 +#define TEGRA114_MC_RESET_VI 15 #endif -- cgit v1.2.3 From a25005310b3ad6df93fbda5ec41b505d5e769799 Mon Sep 17 00:00:00 2001 From: Caesar Wang Date: Wed, 23 May 2018 14:48:37 +0800 Subject: dt-bindings: power: add RK3036 SoCs header for power-domain According to a description from TRM, add all the power domains. Signed-off-by: Caesar Wang Signed-off-by: Elaine Zhang Reviewed-by: Ulf Hansson Reviewed-by: Rob Herring Signed-off-by: Heiko Stuebner --- include/dt-bindings/power/rk3036-power.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) create mode 100644 include/dt-bindings/power/rk3036-power.h (limited to 'include') diff --git a/include/dt-bindings/power/rk3036-power.h b/include/dt-bindings/power/rk3036-power.h new file mode 100644 index 000000000000..0bc6b5d5075e --- /dev/null +++ b/include/dt-bindings/power/rk3036-power.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __DT_BINDINGS_POWER_RK3036_POWER_H__ +#define __DT_BINDINGS_POWER_RK3036_POWER_H__ + +#define RK3036_PD_MSCH 0 +#define RK3036_PD_CORE 1 +#define RK3036_PD_PERI 2 +#define RK3036_PD_VIO 3 +#define RK3036_PD_VPU 4 +#define RK3036_PD_GPU 5 +#define RK3036_PD_SYS 6 + +#endif -- cgit v1.2.3 From 1844cc7ebb95d500fcf13fa491017e760947db0e Mon Sep 17 00:00:00 2001 From: Elaine Zhang Date: Wed, 23 May 2018 14:50:31 +0800 Subject: dt-bindings: power: add RK3128 SoCs header for power-domain According to a description from TRM, add all the power domains. Signed-off-by: Elaine Zhang Reviewed-by: Ulf Hansson Reviewed-by: Rob Herring Signed-off-by: Heiko Stuebner --- include/dt-bindings/power/rk3128-power.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) create mode 100644 include/dt-bindings/power/rk3128-power.h (limited to 'include') diff --git a/include/dt-bindings/power/rk3128-power.h b/include/dt-bindings/power/rk3128-power.h new file mode 100644 index 000000000000..c051dc3108db --- /dev/null +++ b/include/dt-bindings/power/rk3128-power.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __DT_BINDINGS_POWER_RK3128_POWER_H__ +#define __DT_BINDINGS_POWER_RK3128_POWER_H__ + +/* VD_CORE */ +#define RK3128_PD_CORE 0 + +/* VD_LOGIC */ +#define RK3128_PD_VIO 1 +#define RK3128_PD_VIDEO 2 +#define RK3128_PD_GPU 3 +#define RK3128_PD_MSCH 4 + +#endif -- cgit v1.2.3 From 3cfff9adab0447c0bb858ba4d36b9affb88af406 Mon Sep 17 00:00:00 2001 From: Elaine Zhang Date: Wed, 23 May 2018 14:51:26 +0800 Subject: dt-bindings: power: add RK3228 SoCs header for power-domain According to a description from TRM, add all the power domains. Signed-off-by: Elaine Zhang Reviewed-by: Ulf Hansson Reviewed-by: Rob Herring Signed-off-by: Heiko Stuebner --- include/dt-bindings/power/rk3228-power.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 include/dt-bindings/power/rk3228-power.h (limited to 'include') diff --git a/include/dt-bindings/power/rk3228-power.h b/include/dt-bindings/power/rk3228-power.h new file mode 100644 index 000000000000..6a8dc1bf76ce --- /dev/null +++ b/include/dt-bindings/power/rk3228-power.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __DT_BINDINGS_POWER_RK3228_POWER_H__ +#define __DT_BINDINGS_POWER_RK3228_POWER_H__ + +/** + * RK3228 idle id Summary. + */ + +#define RK3228_PD_CORE 0 +#define RK3228_PD_MSCH 1 +#define RK3228_PD_BUS 2 +#define RK3228_PD_SYS 3 +#define RK3228_PD_VIO 4 +#define RK3228_PD_VOP 5 +#define RK3228_PD_VPU 6 +#define RK3228_PD_RKVDEC 7 +#define RK3228_PD_GPU 8 +#define RK3228_PD_PERI 9 +#define RK3228_PD_GMAC 10 + +#endif -- cgit v1.2.3 From c736afccf29005f87d81ea7cb24b8d840c5e3651 Mon Sep 17 00:00:00 2001 From: Finley Xiao Date: Wed, 23 May 2018 14:52:21 +0800 Subject: dt-bindings: power: add PX30 SoCs header for power-domain According to a description from TRM, add all the power domains. Signed-off-by: Finley Xiao Signed-off-by: Elaine Zhang Reviewed-by: Ulf Hansson Reviewed-by: Rob Herring Signed-off-by: Heiko Stuebner --- include/dt-bindings/power/px30-power.h | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 include/dt-bindings/power/px30-power.h (limited to 'include') diff --git a/include/dt-bindings/power/px30-power.h b/include/dt-bindings/power/px30-power.h new file mode 100644 index 000000000000..30917a99ad20 --- /dev/null +++ b/include/dt-bindings/power/px30-power.h @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __DT_BINDINGS_POWER_PX30_POWER_H__ +#define __DT_BINDINGS_POWER_PX30_POWER_H__ + +/* VD_CORE */ +#define PX30_PD_A35_0 0 +#define PX30_PD_A35_1 1 +#define PX30_PD_A35_2 2 +#define PX30_PD_A35_3 3 +#define PX30_PD_SCU 4 + +/* VD_LOGIC */ +#define PX30_PD_USB 5 +#define PX30_PD_DDR 6 +#define PX30_PD_SDCARD 7 +#define PX30_PD_CRYPTO 8 +#define PX30_PD_GMAC 9 +#define PX30_PD_MMC_NAND 10 +#define PX30_PD_VPU 11 +#define PX30_PD_VO 12 +#define PX30_PD_VI 13 +#define PX30_PD_GPU 14 + +/* VD_PMU */ +#define PX30_PD_PMU 15 + +#endif -- cgit v1.2.3 From 32561354b16944e784e82a2011765c50e77e1c56 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Mon, 28 May 2018 17:55:29 +0200 Subject: ARM: tegra: fix compile-testing PCI host driver The tegra_cpuidle_pcie_irqs_in_use() function is stubbed out for non-ARM builds, but now we can compile-test the Tegra pci driver on non-Tegra ARM platforms as well, which results in a new link error: drivers/pci/host/pci-tegra.o: In function `tegra_pcie_map_irq': pci-tegra.c:(.text+0x288): undefined reference to `tegra_cpuidle_pcie_irqs_in_use' drivers/pci/host/pci-tegra.o: In function `tegra_msi_map': pci-tegra.c:(.text+0xba0): undefined reference to `tegra_cpuidle_pcie_irqs_in_use' This adapts the #ifdef statement to match the exact condition under which the function can be called. Fixes: 51bc085d6454 ("PCI: Improve host drivers compile test coverage") Cc: Rob Herring Cc: Lorenzo Pieralisi Signed-off-by: Arnd Bergmann Acked-by: Rob Herring Acked-by: Thierry Reding Signed-off-by: Olof Johansson --- include/soc/tegra/cpuidle.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/soc/tegra/cpuidle.h b/include/soc/tegra/cpuidle.h index 1fae9c7800d1..b6cf32211520 100644 --- a/include/soc/tegra/cpuidle.h +++ b/include/soc/tegra/cpuidle.h @@ -14,7 +14,7 @@ #ifndef __SOC_TEGRA_CPUIDLE_H__ #define __SOC_TEGRA_CPUIDLE_H__ -#if defined(CONFIG_ARM) && defined(CONFIG_CPU_IDLE) +#if defined(CONFIG_ARM) && defined(CONFIG_ARCH_TEGRA) && defined(CONFIG_CPU_IDLE) void tegra_cpuidle_pcie_irqs_in_use(void); #else static inline void tegra_cpuidle_pcie_irqs_in_use(void) -- cgit v1.2.3