From 1a0483d2a4c2c5e218d415c90d1a62b3b917d34e Mon Sep 17 00:00:00 2001 From: Sebastian Hesselbarth Date: Fri, 3 May 2013 07:33:27 +0200 Subject: clk: si5351: Allow user to define disabled state for every clock output This patch adds platform data and DT bindings to allow to overwrite the stored disabled state for each clock output. Signed-off-by: Marek Belisko Signed-off-by: Sebastian Hesselbarth Signed-off-by: Mike Turquette --- include/linux/platform_data/si5351.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'include') diff --git a/include/linux/platform_data/si5351.h b/include/linux/platform_data/si5351.h index 92dabcaf6499..54334393ab92 100644 --- a/include/linux/platform_data/si5351.h +++ b/include/linux/platform_data/si5351.h @@ -78,6 +78,23 @@ enum si5351_drive_strength { SI5351_DRIVE_8MA = 8, }; +/** + * enum si5351_disable_state - Si5351 clock output disable state + * @SI5351_DISABLE_DEFAULT: default, do not change eeprom config + * @SI5351_DISABLE_LOW: CLKx is set to a LOW state when disabled + * @SI5351_DISABLE_HIGH: CLKx is set to a HIGH state when disabled + * @SI5351_DISABLE_FLOATING: CLKx is set to a FLOATING state when + * disabled + * @SI5351_DISABLE_NEVER: CLKx is NEVER disabled + */ +enum si5351_disable_state { + SI5351_DISABLE_DEFAULT = 0, + SI5351_DISABLE_LOW, + SI5351_DISABLE_HIGH, + SI5351_DISABLE_FLOATING, + SI5351_DISABLE_NEVER, +}; + /** * struct si5351_clkout_config - Si5351 clock output configuration * @clkout: clkout number @@ -91,6 +108,7 @@ struct si5351_clkout_config { enum si5351_multisynth_src multisynth_src; enum si5351_clkout_src clkout_src; enum si5351_drive_strength drive; + enum si5351_disable_state disable_state; bool pll_master; unsigned long rate; }; -- cgit v1.2.3 From 0b151debc31df089ddc07a3343031d8f51f988a3 Mon Sep 17 00:00:00 2001 From: Sebastian Hesselbarth Date: Wed, 1 May 2013 02:58:28 +0200 Subject: clk: add non CONFIG_OF routines for clk-provider Some drivers that are shared between architectures have HAVE_CLK selected but don't have OF. To remove compilation errors for drivers that provide clocks on DT with of_clk_add_provider we would have to enclose these calls within #ifdef CONFIG_OF, #endif. This patch adds some stubs for OF related clk-provider functions that either do nothing or return appropriate values if CONFIG_OF is not set. So, definition of these routines will always be available. Signed-off-by: Sebastian Hesselbarth Acked-by: Arnd Bergmann Signed-off-by: Mike Turquette --- include/linux/clk-provider.h | 47 ++++++++++++++++++++++++++++++++++++-------- 1 file changed, 39 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 11860985fecb..265f384f1e01 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -423,6 +423,17 @@ struct of_device_id; typedef void (*of_clk_init_cb_t)(struct device_node *); +struct clk_onecell_data { + struct clk **clks; + unsigned int clk_num; +}; + +#define CLK_OF_DECLARE(name, compat, fn) \ + static const struct of_device_id __clk_of_table_##name \ + __used __section(__clk_of_table) \ + = { .compatible = compat, .data = fn }; + +#ifdef CONFIG_OF int of_clk_add_provider(struct device_node *np, struct clk *(*clk_src_get)(struct of_phandle_args *args, void *data), @@ -430,19 +441,39 @@ int of_clk_add_provider(struct device_node *np, void of_clk_del_provider(struct device_node *np); struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec, void *data); -struct clk_onecell_data { - struct clk **clks; - unsigned int clk_num; -}; struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data); const char *of_clk_get_parent_name(struct device_node *np, int index); void of_clk_init(const struct of_device_id *matches); -#define CLK_OF_DECLARE(name, compat, fn) \ - static const struct of_device_id __clk_of_table_##name \ - __used __section(__clk_of_table) \ - = { .compatible = compat, .data = fn }; +#else /* !CONFIG_OF */ +static inline int of_clk_add_provider(struct device_node *np, + struct clk *(*clk_src_get)(struct of_phandle_args *args, + void *data), + void *data) +{ + return 0; +} +#define of_clk_del_provider(np) \ + { while (0); } +static inline struct clk *of_clk_src_simple_get( + struct of_phandle_args *clkspec, void *data) +{ + return ERR_PTR(-ENOENT); +} +static inline struct clk *of_clk_src_onecell_get( + struct of_phandle_args *clkspec, void *data) +{ + return ERR_PTR(-ENOENT); +} +static inline const char *of_clk_get_parent_name(struct device_node *np, + int index) +{ + return NULL; +} +#define of_clk_init(matches) \ + { while (0); } +#endif /* CONFIG_OF */ #endif /* CONFIG_COMMON_CLK */ #endif /* CLK_PROVIDER_H */ -- cgit v1.2.3 From 061cec925f212f145516e826f39962624a738ded Mon Sep 17 00:00:00 2001 From: Prashant Gaikwad Date: Mon, 27 May 2013 13:10:09 +0530 Subject: clk: tegra: Use common of_clk_init function Use common of_clk_init() function for clocks initialization. Signed-off-by: Prashant Gaikwad Reviewed-by: Thierry Reding Acked-by: Stephen Warren Signed-off-by: Mike Turquette --- include/linux/clk/tegra.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/linux/clk/tegra.h b/include/linux/clk/tegra.h index 642789baec74..3670a4f5402b 100644 --- a/include/linux/clk/tegra.h +++ b/include/linux/clk/tegra.h @@ -122,7 +122,6 @@ static inline void tegra_cpu_clock_resume(void) void tegra_periph_reset_deassert(struct clk *c); void tegra_periph_reset_assert(struct clk *c); -void tegra_clocks_init(void); void tegra_clocks_apply_init_table(void); #endif /* __LINUX_CLK_TEGRA_H_ */ -- cgit v1.2.3 From 1237e598a94b5a44a0162a4f4534d18ef8a81a7d Mon Sep 17 00:00:00 2001 From: Philippe Begnic Date: Mon, 27 May 2013 14:41:29 +0200 Subject: clk: ux500: Pass clock base adresses in initcall for u8540 and u9540 Align on u8500 version, pass clock base address in clk_init functions for u8540 and u9540. Signed-off-by: Linus Walleij Signed-off-by: Philippe Begnic Reviewed-by: Ulf Hansson Signed-off-by: Mike Turquette --- include/linux/platform_data/clk-ux500.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/platform_data/clk-ux500.h b/include/linux/platform_data/clk-ux500.h index 320d9c39ea0a..9d98f3aaa16c 100644 --- a/include/linux/platform_data/clk-ux500.h +++ b/include/linux/platform_data/clk-ux500.h @@ -12,7 +12,9 @@ void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, u32 clkrst5_base, u32 clkrst6_base); -void u9540_clk_init(void); -void u8540_clk_init(void); +void u9540_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, + u32 clkrst5_base, u32 clkrst6_base); +void u8540_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, + u32 clkrst5_base, u32 clkrst6_base); #endif /* __CLK_UX500_H */ -- cgit v1.2.3 From 852bbba96773777efc2b932f2c5939c6fbf252da Mon Sep 17 00:00:00 2001 From: Philippe Begnic Date: Mon, 27 May 2013 14:41:30 +0200 Subject: mfd: db8500: Update register definition for u8540 clock PRCMU and ab8500 registers updated for u8540 Signed-off-by: Philippe Begnic Acked-by: Lee Jones Signed-off-by: Mike Turquette --- include/linux/mfd/abx500/ab8500-sysctrl.h | 4 ++-- include/linux/mfd/dbx500-prcmu.h | 11 +++++++++++ 2 files changed, 13 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/mfd/abx500/ab8500-sysctrl.h b/include/linux/mfd/abx500/ab8500-sysctrl.h index 990bc93f46e1..adba89d9c660 100644 --- a/include/linux/mfd/abx500/ab8500-sysctrl.h +++ b/include/linux/mfd/abx500/ab8500-sysctrl.h @@ -278,8 +278,8 @@ struct ab8500_sysctrl_platform_data { #define AB9540_SYSCLK12CONFCTRL_PLL26TO38ENA BIT(0) #define AB9540_SYSCLK12CONFCTRL_SYSCLK12USBMUXSEL BIT(1) -#define AB9540_SYSCLK12CONFCTRL_INT384MHZMUXSEL_MASK 0x0C -#define AB9540_SYSCLK12CONFCTRL_INT384MHZMUXSEL_SHIFT 2 +#define AB9540_SYSCLK12CONFCTRL_INT384MHZMUXSEL0 BIT(2) +#define AB9540_SYSCLK12CONFCTRL_INT384MHZMUXSEL1 BIT(3) #define AB9540_SYSCLK12CONFCTRL_SYSCLK12BUFMUX BIT(4) #define AB9540_SYSCLK12CONFCTRL_SYSCLK12PLLMUX BIT(5) #define AB9540_SYSCLK12CONFCTRL_SYSCLK2MUXVALID BIT(6) diff --git a/include/linux/mfd/dbx500-prcmu.h b/include/linux/mfd/dbx500-prcmu.h index 689e6a0d9c99..d0ba355cc55f 100644 --- a/include/linux/mfd/dbx500-prcmu.h +++ b/include/linux/mfd/dbx500-prcmu.h @@ -134,6 +134,10 @@ enum prcmu_clock { PRCMU_SIACLK, PRCMU_SVACLK, PRCMU_ACLK, + PRCMU_HVACLK, /* Ux540 only */ + PRCMU_G1CLK, /* Ux540 only */ + PRCMU_SDMMCHCLK, + PRCMU_CAMCLK, PRCMU_NUM_REG_CLOCKS, PRCMU_SYSCLK = PRCMU_NUM_REG_CLOCKS, PRCMU_CDCLK, @@ -148,6 +152,13 @@ enum prcmu_clock { PRCMU_DSI0ESCCLK, PRCMU_DSI1ESCCLK, PRCMU_DSI2ESCCLK, + /* LCD DSI PLL - Ux540 only */ + PRCMU_PLLDSI_LCD, + PRCMU_DSI0CLK_LCD, + PRCMU_DSI1CLK_LCD, + PRCMU_DSI0ESCCLK_LCD, + PRCMU_DSI1ESCCLK_LCD, + PRCMU_DSI2ESCCLK_LCD, }; /** -- cgit v1.2.3 From 54e300339cce6d4be665e6bbd736123dd0f15888 Mon Sep 17 00:00:00 2001 From: Philippe Begnic Date: Mon, 27 May 2013 14:41:31 +0200 Subject: mfd: db8500: Update BML clock register for db8580 BML clock register address in DB8580 has changed.Defined a new address under different name for DB8580. Signed-off-by: Philippe Begnic Acked-by: Lee Jones Signed-off-by: Mike Turquette --- include/linux/mfd/dbx500-prcmu.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/mfd/dbx500-prcmu.h b/include/linux/mfd/dbx500-prcmu.h index d0ba355cc55f..ca0790fba2f5 100644 --- a/include/linux/mfd/dbx500-prcmu.h +++ b/include/linux/mfd/dbx500-prcmu.h @@ -138,6 +138,7 @@ enum prcmu_clock { PRCMU_G1CLK, /* Ux540 only */ PRCMU_SDMMCHCLK, PRCMU_CAMCLK, + PRCMU_BML8580CLK, PRCMU_NUM_REG_CLOCKS, PRCMU_SYSCLK = PRCMU_NUM_REG_CLOCKS, PRCMU_CDCLK, -- cgit v1.2.3 From ba492e900704ba00d43c7af9d94b00da4df52587 Mon Sep 17 00:00:00 2001 From: Haojian Zhuang Date: Sat, 8 Jun 2013 22:47:17 +0800 Subject: clk: mux: add CLK_MUX_HIWORD_MASK In both Hisilicon & Rockchip Cortex-A9 based chips, they don't use the paradigm of reading-changing-writing the register contents. Instead they use a hiword mask to indicate the changed bits. When b01 should be set as switching mux, it also needs to indicate the change by setting hiword mask (b11 << 16). The patch adds mux flag for this usage. Signed-off-by: Heiko Stuebner Signed-off-by: Haojian Zhuang Signed-off-by: Mike Turquette --- include/linux/clk-provider.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 265f384f1e01..37ad97961e5a 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -299,6 +299,10 @@ struct clk *clk_register_divider_table(struct device *dev, const char *name, * Flags: * CLK_MUX_INDEX_ONE - register index starts at 1, not 0 * CLK_MUX_INDEX_BIT - register index is a single bit (power of two) + * CLK_MUX_HIWORD_MASK - The mux settings are only in lower 16-bit of this + * register, and mask of mux bits are in higher 16-bit of this register. + * While setting the mux bits, higher 16-bit should also be updated to + * indicate changing mux bits. */ struct clk_mux { struct clk_hw hw; @@ -312,6 +316,7 @@ struct clk_mux { #define CLK_MUX_INDEX_ONE BIT(0) #define CLK_MUX_INDEX_BIT BIT(1) +#define CLK_MUX_HIWORD_MASK BIT(2) extern const struct clk_ops clk_mux_ops; -- cgit v1.2.3 From d57dfe7508af2b528e26d84792edec1e7d919682 Mon Sep 17 00:00:00 2001 From: Haojian Zhuang Date: Sat, 8 Jun 2013 22:47:18 +0800 Subject: clk: divider: add CLK_DIVIDER_HIWORD_MASK flag In both Hisilicon & Rockchip Cortex-A9 based chips, they don't use the paradigm of reading-changing-writing the register contents. Instead they use a hiword mask to indicate the changed bits. When b01 should be set as setting divider, it also needs to indicate the change by setting hiword mask (b11 << 16). The patch adds divider flag for this usage. Signed-off-by: Heiko Stuebner Signed-off-by: Haojian Zhuang Signed-off-by: Mike Turquette --- include/linux/clk-provider.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 37ad97961e5a..d77f1267f419 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -257,6 +257,10 @@ struct clk_div_table { * Some hardware implementations gracefully handle this case and allow a * zero divisor by not modifying their input clock * (divide by one / bypass). + * CLK_DIVIDER_HIWORD_MASK - The divider settings are only in lower 16-bit + * of this register, and mask of divider bits are in higher 16-bit of this + * register. While setting the divider bits, higher 16-bit should also be + * updated to indicate changing divider bits. */ struct clk_divider { struct clk_hw hw; @@ -271,6 +275,7 @@ struct clk_divider { #define CLK_DIVIDER_ONE_BASED BIT(0) #define CLK_DIVIDER_POWER_OF_TWO BIT(1) #define CLK_DIVIDER_ALLOW_ZERO BIT(2) +#define CLK_DIVIDER_HIWORD_MASK BIT(3) extern const struct clk_ops clk_divider_ops; struct clk *clk_register_divider(struct device *dev, const char *name, -- cgit v1.2.3 From 045779942c04646a222289989e6a5b617dfdedf7 Mon Sep 17 00:00:00 2001 From: Haojian Zhuang Date: Sat, 8 Jun 2013 22:47:19 +0800 Subject: clk: gate: add CLK_GATE_HIWORD_MASK In Rockchip Cortex-A9 based chips, they don't use paradigm of reading-changing-writing the register contents. Instead they use a hiword mask to indicate the changed bits. When b1 should be set as gate, it also needs to indicate the change by setting hiword mask (b1 << 16). The patch adds gate flag for this usage. Signed-off-by: Heiko Stuebner Signed-off-by: Haojian Zhuang Signed-off-by: Mike Turquette --- include/linux/clk-provider.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index d77f1267f419..1ec14a732176 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -210,6 +210,10 @@ void of_fixed_clk_setup(struct device_node *np); * CLK_GATE_SET_TO_DISABLE - by default this clock sets the bit at bit_idx to * enable the clock. Setting this flag does the opposite: setting the bit * disable the clock and clearing it enables the clock + * CLK_GATE_HIWORD_MASK - The gate settings are only in lower 16-bit + * of this register, and mask of gate bits are in higher 16-bit of this + * register. While setting the gate bits, higher 16-bit should also be + * updated to indicate changing gate bits. */ struct clk_gate { struct clk_hw hw; @@ -220,6 +224,7 @@ struct clk_gate { }; #define CLK_GATE_SET_TO_DISABLE BIT(0) +#define CLK_GATE_HIWORD_MASK BIT(1) extern const struct clk_ops clk_gate_ops; struct clk *clk_register_gate(struct device *dev, const char *name, -- cgit v1.2.3 From 7064f6bd86278029348c36d30bd325e7e05b6fee Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 21 Jun 2013 22:32:26 +0200 Subject: clk: tegra: provide tegra_periph_reset_assert alternative We have some tegra device drivers that are written to be platform independent but still use the tegra specific tegra_periph_reset_assert function. In order to build and link them without errors, this provides a static inline version of these functions that does nothing when Tegra support is disabled. Signed-off-by: Arnd Bergmann Acked-by: Stephen Warren Signed-off-by: Mike Turquette [mturquette@linaro.org: fixed up trivial merge issue] --- include/linux/clk/tegra.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/linux/clk/tegra.h b/include/linux/clk/tegra.h index 3670a4f5402b..e3cc8721c30e 100644 --- a/include/linux/clk/tegra.h +++ b/include/linux/clk/tegra.h @@ -120,8 +120,13 @@ static inline void tegra_cpu_clock_resume(void) } #endif +#ifdef ARCH_TEGRA void tegra_periph_reset_deassert(struct clk *c); void tegra_periph_reset_assert(struct clk *c); +#else +static inline void tegra_periph_reset_deassert(struct clk *c) {} +static inline void tegra_periph_reset_assert(struct clk *c) {} +#endif void tegra_clocks_apply_init_table(void); #endif /* __LINUX_CLK_TEGRA_H_ */ -- cgit v1.2.3 From 45e3ec3784aec0d194740b75b547bfabca448ff3 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Mon, 24 Jun 2013 13:05:56 -0600 Subject: clk: tegra: fix ifdef for tegra_periph_reset_assert inline Commit 7064f6b "clk: tegra: provide tegra_periph_reset_assert alternative" added ifdef'd static inline versions of some functions, but tested ARCH_TEGRA rather than CONFIG_ARCH_TEGRA, thus disabling these function in all cases. In some cases, this caused HW modules to misbehave; for example, the Tegra I2C driver BUG()d during boot on Seaboard. Reported-by: Olof Johansson Signed-off-by: Stephen Warren Tested-by: Paul Walmsley Signed-off-by: Mike Turquette --- include/linux/clk/tegra.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/clk/tegra.h b/include/linux/clk/tegra.h index e3cc8721c30e..23a0ceee831f 100644 --- a/include/linux/clk/tegra.h +++ b/include/linux/clk/tegra.h @@ -120,7 +120,7 @@ static inline void tegra_cpu_clock_resume(void) } #endif -#ifdef ARCH_TEGRA +#ifdef CONFIG_ARCH_TEGRA void tegra_periph_reset_deassert(struct clk *c); void tegra_periph_reset_assert(struct clk *c); #else -- cgit v1.2.3