From 93c60483b5feefced92b869d5f97769495bc6313 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Mon, 9 Dec 2019 13:55:15 -0800 Subject: bus: ti-sysc: Fix missing force mstandby quirk handling Commit 03856e928b0e ("bus: ti-sysc: Handle mstandby quirk and use it for musb") added quirk handling for mstandby quirk but did not consider that we also need a quirk variant for SYSC_QUIRK_FORCE_MSTANDBY. We need to use forced idle mode for both SYSC_QUIRK_SWSUP_MSTANDBY and SYSC_QUIRK_FORCE_MSTANDBY, but SYSC_QUIRK_SWSUP_MSTANDBY also need to additionally also configure no-idle mode when enabled. Fixes: 03856e928b0e ("bus: ti-sysc: Handle mstandby quirk and use it for musb") Signed-off-by: Tony Lindgren --- include/linux/platform_data/ti-sysc.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/platform_data/ti-sysc.h b/include/linux/platform_data/ti-sysc.h index 0b9380475144..8cfe570fdece 100644 --- a/include/linux/platform_data/ti-sysc.h +++ b/include/linux/platform_data/ti-sysc.h @@ -49,6 +49,7 @@ struct sysc_regbits { s8 emufree_shift; }; +#define SYSC_QUIRK_FORCE_MSTANDBY BIT(20) #define SYSC_MODULE_QUIRK_AESS BIT(19) #define SYSC_MODULE_QUIRK_SGX BIT(18) #define SYSC_MODULE_QUIRK_HDQ1W BIT(17) -- cgit v1.2.3 From 28b5afcd06d2b24e31ca4a643ddee9eb92b5bcb1 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Mon, 16 Dec 2019 14:41:53 -0800 Subject: ARM: OMAP2+: Drop unused sdma functions We still have lots of legacy code for sdma, but some of it is now unused. To simplify phasing out the old legacy sdma code, let's first remove all currently unused functions: omap_enable_dma_irq omap_set_dma_write_mode omap_set_dma_params omap_dma_link_lch omap_set_dma_callback omap_dma_set_global_params And with this, omap_dma_set_global_params now becomes static. Cc: Aaro Koskinen Cc: Arnd Bergmann Cc: Peter Ujfalusi Cc: Russell King Cc: Vinod Koul Acked-by: Peter Ujfalusi Tested-by: Peter Ujfalusi Signed-off-by: Tony Lindgren --- include/linux/omap-dma.h | 12 ------------ 1 file changed, 12 deletions(-) (limited to 'include') diff --git a/include/linux/omap-dma.h b/include/linux/omap-dma.h index ba3cfbb52312..61e474ce3ccb 100644 --- a/include/linux/omap-dma.h +++ b/include/linux/omap-dma.h @@ -303,7 +303,6 @@ extern void omap_set_dma_priority(int lch, int dst_port, int priority); extern int omap_request_dma(int dev_id, const char *dev_name, void (*callback)(int lch, u16 ch_status, void *data), void *data, int *dma_ch); -extern void omap_enable_dma_irq(int ch, u16 irq_bits); extern void omap_disable_dma_irq(int ch, u16 irq_bits); extern void omap_free_dma(int ch); extern void omap_start_dma(int lch); @@ -312,7 +311,6 @@ extern void omap_set_dma_transfer_params(int lch, int data_type, int elem_count, int frame_count, int sync_mode, int dma_trigger, int src_or_dst_synch); -extern void omap_set_dma_write_mode(int lch, enum omap_dma_write_mode mode); extern void omap_set_dma_channel_mode(int lch, enum omap_dma_channel_mode mode); extern void omap_set_dma_src_params(int lch, int src_port, int src_amode, @@ -329,20 +327,10 @@ extern void omap_set_dma_dest_data_pack(int lch, int enable); extern void omap_set_dma_dest_burst_mode(int lch, enum omap_dma_burst_mode burst_mode); -extern void omap_set_dma_params(int lch, - struct omap_dma_channel_params *params); - -extern void omap_dma_link_lch(int lch_head, int lch_queue); - -extern int omap_set_dma_callback(int lch, - void (*callback)(int lch, u16 ch_status, void *data), - void *data); extern dma_addr_t omap_get_dma_src_pos(int lch); extern dma_addr_t omap_get_dma_dst_pos(int lch); extern int omap_get_dma_active_status(int lch); extern int omap_dma_running(void); -extern void omap_dma_set_global_params(int arb_rate, int max_fifo_depth, - int tparams); void omap_dma_global_context_save(void); void omap_dma_global_context_restore(void); -- cgit v1.2.3 From 755cbfd8cf89c09e53be796d7d5c22f2d197ef1a Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Mon, 16 Dec 2019 14:41:53 -0800 Subject: ARM: OMAP2+: Drop sdma interrupt handling for mach-omap2 All device tree probing omap SoCs only have device drivers that are using Linux dmaengine API with the IRQENABLE_L1 interrupts. Only omap1 is still using old legacy dma. This means we can remove the legacy sdma interrupt handling for IRQENABLE_L0, and only rely on the dmaengine driver using IRQENABLE_L1. The legacy code still allocates the channels, but that will be deal with in the following patches. Cc: Aaro Koskinen Cc: Arnd Bergmann Cc: Peter Ujfalusi Cc: Russell King Cc: Vinod Koul Acked-by: Peter Ujfalusi Tested-by: Peter Ujfalusi Signed-off-by: Tony Lindgren --- include/linux/omap-dma.h | 4 ---- 1 file changed, 4 deletions(-) (limited to 'include') diff --git a/include/linux/omap-dma.h b/include/linux/omap-dma.h index 61e474ce3ccb..ee0de8443274 100644 --- a/include/linux/omap-dma.h +++ b/include/linux/omap-dma.h @@ -129,7 +129,6 @@ #define IS_WORD_16 BIT(0xd) #define ENABLE_16XX_MODE BIT(0xe) #define HS_CHANNELS_RESERVED BIT(0xf) -#define DMA_ENGINE_HANDLE_IRQ BIT(0x10) /* Defines for DMA Capabilities */ #define DMA_HAS_TRANSPARENT_CAPS (0x1 << 18) @@ -239,9 +238,6 @@ struct omap_dma_lch { void (*callback)(int lch, u16 ch_status, void *data); void *data; long flags; - /* required for Dynamic chaining */ - int prev_linked_ch; - int next_linked_ch; int state; int chain_id; int status; -- cgit v1.2.3 From 4c74ecf79227228f31d05d6d4766ccb5f8607b83 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Mon, 16 Dec 2019 14:41:53 -0800 Subject: dmaengine: ti: omap-dma: Add device tree match data and use it for cpu_pm With old DMA code disabled for handling DMA requests for device tree based SoCs, we can move omap3 specific context save and restore to the dmaengine driver. Let's do this by adding cpu_pm notifier handling to save and restore context, and enable it based on device tree match data. This way we can use the match data later to configure more SoC specific features later on too. Note that we only clear the channels in use while the platform code also clears reserved channels 0 and 1 on high-security SoCs. Based on testing on n900, this is not needed though and the system idles just fine. With the dmaengine driver handling context save and restore, we must now remove the old custom calls for context save and restore. Cc: Aaro Koskinen Cc: Arnd Bergmann Cc: Peter Ujfalusi Cc: Russell King Cc: Vinod Koul Acked-by: Peter Ujfalusi Tested-by: Peter Ujfalusi Acked-by: Vinod Koul Signed-off-by: Tony Lindgren --- include/linux/omap-dma.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include') diff --git a/include/linux/omap-dma.h b/include/linux/omap-dma.h index ee0de8443274..5c5c93ad6b50 100644 --- a/include/linux/omap-dma.h +++ b/include/linux/omap-dma.h @@ -327,8 +327,6 @@ extern dma_addr_t omap_get_dma_src_pos(int lch); extern dma_addr_t omap_get_dma_dst_pos(int lch); extern int omap_get_dma_active_status(int lch); extern int omap_dma_running(void); -void omap_dma_global_context_save(void); -void omap_dma_global_context_restore(void); #if defined(CONFIG_ARCH_OMAP1) && IS_ENABLED(CONFIG_FB_OMAP) #include -- cgit v1.2.3 From 19c8915ca38f8ac4d1fe380c342ce36c6eb03e15 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Tue, 10 Dec 2019 08:10:09 -0800 Subject: ARM: OMAP2+: Drop legacy platform data for omap4 aess We can now probe devices with ti-sysc interconnect driver and dts data. Let's drop the related platform data and custom ti,hwmods dts property. As we're just dropping data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Cc: Keerthy Cc: Peter Ujfalusi Cc: Tero Kristo Tested-by: Keerthy Signed-off-by: Tony Lindgren --- include/sound/aess.h | 53 ---------------------------------------------------- 1 file changed, 53 deletions(-) delete mode 100644 include/sound/aess.h (limited to 'include') diff --git a/include/sound/aess.h b/include/sound/aess.h deleted file mode 100644 index cee0d09fadbd..000000000000 --- a/include/sound/aess.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * AESS IP block reset - * - * Copyright (C) 2012 Texas Instruments, Inc. - * Paul Walmsley - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA - * 02110-1301 USA - */ -#ifndef __SOUND_AESS_H__ -#define __SOUND_AESS_H__ - -#include -#include - -/* - * AESS_AUTO_GATING_ENABLE_OFFSET: offset in bytes of the AESS IP - * block's AESS_AUTO_GATING_ENABLE__1 register from the IP block's - * base address - */ -#define AESS_AUTO_GATING_ENABLE_OFFSET 0x07c - -/* Register bitfields in the AESS_AUTO_GATING_ENABLE__1 register */ -#define AESS_AUTO_GATING_ENABLE_SHIFT 0 - -/** - * aess_enable_autogating - enable AESS internal autogating - * @oh: struct omap_hwmod * - * - * Enable internal autogating on the AESS. This allows the AESS to - * indicate that it is idle to the OMAP PRCM. Returns 0. - */ -static inline void aess_enable_autogating(void __iomem *base) -{ - u32 v; - - /* Set AESS_AUTO_GATING_ENABLE__1.ENABLE to allow idle entry */ - v = 1 << AESS_AUTO_GATING_ENABLE_SHIFT; - writel(v, base + AESS_AUTO_GATING_ENABLE_OFFSET); -} - -#endif /* __SOUND_AESS_H__ */ -- cgit v1.2.3 From 8e28918a85a088362f3450078c5519f27aecdd3a Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Thu, 14 Nov 2019 12:18:17 +0200 Subject: dt-bindings: clock: Move ti-dra7-atl.h to dt-bindings/clock Most of the clock related dt-binding header files are located in dt-bindings/clock folder. It would be good to keep all the similar header files at a single location. Suggested-by: Tony Lindgren Signed-off-by: Peter Ujfalusi Acked-by: Tony Lindgren Acked-by: Rob Herring Signed-off-by: Tero Kristo --- include/dt-bindings/clk/ti-dra7-atl.h | 40 --------------------------------- include/dt-bindings/clock/ti-dra7-atl.h | 40 +++++++++++++++++++++++++++++++++ 2 files changed, 40 insertions(+), 40 deletions(-) delete mode 100644 include/dt-bindings/clk/ti-dra7-atl.h create mode 100644 include/dt-bindings/clock/ti-dra7-atl.h (limited to 'include') diff --git a/include/dt-bindings/clk/ti-dra7-atl.h b/include/dt-bindings/clk/ti-dra7-atl.h deleted file mode 100644 index 42dd4164f6f4..000000000000 --- a/include/dt-bindings/clk/ti-dra7-atl.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * This header provides constants for DRA7 ATL (Audio Tracking Logic) - * - * The constants defined in this header are used in dts files - * - * Copyright (C) 2013 Texas Instruments, Inc. - * - * Peter Ujfalusi - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef _DT_BINDINGS_CLK_DRA7_ATL_H -#define _DT_BINDINGS_CLK_DRA7_ATL_H - -#define DRA7_ATL_WS_MCASP1_FSR 0 -#define DRA7_ATL_WS_MCASP1_FSX 1 -#define DRA7_ATL_WS_MCASP2_FSR 2 -#define DRA7_ATL_WS_MCASP2_FSX 3 -#define DRA7_ATL_WS_MCASP3_FSX 4 -#define DRA7_ATL_WS_MCASP4_FSX 5 -#define DRA7_ATL_WS_MCASP5_FSX 6 -#define DRA7_ATL_WS_MCASP6_FSX 7 -#define DRA7_ATL_WS_MCASP7_FSX 8 -#define DRA7_ATL_WS_MCASP8_FSX 9 -#define DRA7_ATL_WS_MCASP8_AHCLKX 10 -#define DRA7_ATL_WS_XREF_CLK3 11 -#define DRA7_ATL_WS_XREF_CLK0 12 -#define DRA7_ATL_WS_XREF_CLK1 13 -#define DRA7_ATL_WS_XREF_CLK2 14 -#define DRA7_ATL_WS_OSC1_X1 15 - -#endif diff --git a/include/dt-bindings/clock/ti-dra7-atl.h b/include/dt-bindings/clock/ti-dra7-atl.h new file mode 100644 index 000000000000..42dd4164f6f4 --- /dev/null +++ b/include/dt-bindings/clock/ti-dra7-atl.h @@ -0,0 +1,40 @@ +/* + * This header provides constants for DRA7 ATL (Audio Tracking Logic) + * + * The constants defined in this header are used in dts files + * + * Copyright (C) 2013 Texas Instruments, Inc. + * + * Peter Ujfalusi + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _DT_BINDINGS_CLK_DRA7_ATL_H +#define _DT_BINDINGS_CLK_DRA7_ATL_H + +#define DRA7_ATL_WS_MCASP1_FSR 0 +#define DRA7_ATL_WS_MCASP1_FSX 1 +#define DRA7_ATL_WS_MCASP2_FSR 2 +#define DRA7_ATL_WS_MCASP2_FSX 3 +#define DRA7_ATL_WS_MCASP3_FSX 4 +#define DRA7_ATL_WS_MCASP4_FSX 5 +#define DRA7_ATL_WS_MCASP5_FSX 6 +#define DRA7_ATL_WS_MCASP6_FSX 7 +#define DRA7_ATL_WS_MCASP7_FSX 8 +#define DRA7_ATL_WS_MCASP8_FSX 9 +#define DRA7_ATL_WS_MCASP8_AHCLKX 10 +#define DRA7_ATL_WS_XREF_CLK3 11 +#define DRA7_ATL_WS_XREF_CLK0 12 +#define DRA7_ATL_WS_XREF_CLK1 13 +#define DRA7_ATL_WS_XREF_CLK2 14 +#define DRA7_ATL_WS_OSC1_X1 15 + +#endif -- cgit v1.2.3 From 7054c14f0555e68f47f03be5105d4d7e95be1f70 Mon Sep 17 00:00:00 2001 From: Benoit Parrot Date: Wed, 11 Dec 2019 08:05:49 -0600 Subject: clk: ti: dra7: add cam clkctrl data Add clkctrl data for CAM domain. Signed-off-by: Benoit Parrot Acked-by: Tony Lindgren Acked-by: Rob Herring Acked-by: Stephen Boyd Signed-off-by: Tero Kristo --- include/dt-bindings/clock/dra7.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'include') diff --git a/include/dt-bindings/clock/dra7.h b/include/dt-bindings/clock/dra7.h index 72f2e8411523..d5d112bc632d 100644 --- a/include/dt-bindings/clock/dra7.h +++ b/include/dt-bindings/clock/dra7.h @@ -29,6 +29,11 @@ #define DRA7_RTC_CLKCTRL_INDEX(offset) ((offset) - DRA7_RTC_CLKCTRL_OFFSET) #define DRA7_RTCSS_CLKCTRL DRA7_RTC_CLKCTRL_INDEX(0x44) +/* vip clocks */ +#define DRA7_VIP1_CLKCTRL DRA7_CLKCTRL_INDEX(0x20) +#define DRA7_VIP2_CLKCTRL DRA7_CLKCTRL_INDEX(0x28) +#define DRA7_VIP3_CLKCTRL DRA7_CLKCTRL_INDEX(0x30) + /* coreaon clocks */ #define DRA7_SMARTREFLEX_MPU_CLKCTRL DRA7_CLKCTRL_INDEX(0x28) #define DRA7_SMARTREFLEX_CORE_CLKCTRL DRA7_CLKCTRL_INDEX(0x38) @@ -192,6 +197,11 @@ /* rtc clocks */ #define DRA7_RTC_RTCSS_CLKCTRL DRA7_CLKCTRL_INDEX(0x44) +/* vip clocks */ +#define DRA7_CAM_VIP1_CLKCTRL DRA7_CLKCTRL_INDEX(0x20) +#define DRA7_CAM_VIP2_CLKCTRL DRA7_CLKCTRL_INDEX(0x28) +#define DRA7_CAM_VIP3_CLKCTRL DRA7_CLKCTRL_INDEX(0x30) + /* coreaon clocks */ #define DRA7_COREAON_SMARTREFLEX_MPU_CLKCTRL DRA7_CLKCTRL_INDEX(0x28) #define DRA7_COREAON_SMARTREFLEX_CORE_CLKCTRL DRA7_CLKCTRL_INDEX(0x38) -- cgit v1.2.3 From 7dfd5e619d3908d8a6876a95062a35b8e0000cd4 Mon Sep 17 00:00:00 2001 From: Benoit Parrot Date: Wed, 11 Dec 2019 08:08:08 -0600 Subject: clk: ti: dra7: add vpe clkctrl data Add clkctrl data for VPE. Signed-off-by: Benoit Parrot Acked-by: Tony Lindgren Acked-by: Rob Herring Acked-by: Stephen Boyd Signed-off-by: Tero Kristo --- include/dt-bindings/clock/dra7.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'include') diff --git a/include/dt-bindings/clock/dra7.h b/include/dt-bindings/clock/dra7.h index d5d112bc632d..ff33f621b225 100644 --- a/include/dt-bindings/clock/dra7.h +++ b/include/dt-bindings/clock/dra7.h @@ -34,6 +34,11 @@ #define DRA7_VIP2_CLKCTRL DRA7_CLKCTRL_INDEX(0x28) #define DRA7_VIP3_CLKCTRL DRA7_CLKCTRL_INDEX(0x30) +/* vpe clocks */ +#define DRA7_VPE_CLKCTRL_OFFSET 0x60 +#define DRA7_VPE_CLKCTRL_INDEX(offset) ((offset) - DRA7_VPE_CLKCTRL_OFFSET) +#define DRA7_VPE_CLKCTRL DRA7_VPE_CLKCTRL_INDEX(0x64) + /* coreaon clocks */ #define DRA7_SMARTREFLEX_MPU_CLKCTRL DRA7_CLKCTRL_INDEX(0x28) #define DRA7_SMARTREFLEX_CORE_CLKCTRL DRA7_CLKCTRL_INDEX(0x38) @@ -202,6 +207,11 @@ #define DRA7_CAM_VIP2_CLKCTRL DRA7_CLKCTRL_INDEX(0x28) #define DRA7_CAM_VIP3_CLKCTRL DRA7_CLKCTRL_INDEX(0x30) +/* vpe clocks */ +#define DRA7_VPE_CLKCTRL_OFFSET 0x60 +#define DRA7_VPE_CLKCTRL_INDEX(offset) ((offset) - DRA7_VPE_CLKCTRL_OFFSET) +#define DRA7_VPE_VPE_CLKCTRL DRA7_VPE_CLKCTRL_INDEX(0x64) + /* coreaon clocks */ #define DRA7_COREAON_SMARTREFLEX_MPU_CLKCTRL DRA7_CLKCTRL_INDEX(0x28) #define DRA7_COREAON_SMARTREFLEX_CORE_CLKCTRL DRA7_CLKCTRL_INDEX(0x38) -- cgit v1.2.3 From 364975eeb43f25c0a78f73277f076694e6f30b17 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Tue, 14 Jan 2020 07:06:07 -0800 Subject: clk: ti: omap5: Add missing AESS clock Looks like we're missing AESS clock for omap5. This is similar to what omap4 has. Cc: H. Nikolaus Schaller Cc: Matthijs van Duin Cc: Peter Ujfalusi Signed-off-by: Tony Lindgren Reviewed-by: Peter Ujfalusi Signed-off-by: Tero Kristo --- include/dt-bindings/clock/omap5.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/dt-bindings/clock/omap5.h b/include/dt-bindings/clock/omap5.h index ba672064ccb4..2b4fd9a96b91 100644 --- a/include/dt-bindings/clock/omap5.h +++ b/include/dt-bindings/clock/omap5.h @@ -16,6 +16,7 @@ /* abe clocks */ #define OMAP5_L4_ABE_CLKCTRL OMAP5_CLKCTRL_INDEX(0x20) +#define OMAP5_AESS_CLKCTRL OMAP5_CLKCTRL_INDEX(0x28) #define OMAP5_MCPDM_CLKCTRL OMAP5_CLKCTRL_INDEX(0x30) #define OMAP5_DMIC_CLKCTRL OMAP5_CLKCTRL_INDEX(0x38) #define OMAP5_MCBSP1_CLKCTRL OMAP5_CLKCTRL_INDEX(0x48) -- cgit v1.2.3 From 957ad44ff5f266d280aff6a92a6aa74698b016a5 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Fri, 1 Nov 2019 09:27:19 -0700 Subject: clk: ti: add clkctrl data dra7 sgx This is similar to what we have for omap5 except the gpu_cm address is different, the mux clocks have one more source option, and there's no divider clock. Note that because of the current dts node name dependency for mapping to clock domain, we must still use "gpu-clkctrl@" naming instead of generic "clock@" naming for the node. And because of this, it's probably best to apply the dts node addition together along with the other clock changes. For accessing the GPU, we also need to configure the interconnect target module for GPU similar to what we have for omap5, I'll send that change separately. Cc: Benoit Parrot Cc: "H. Nikolaus Schaller" Cc: Robert Nelson Cc: Tomi Valkeinen Signed-off-by: Tony Lindgren Acked-by: Stephen Boyd Signed-off-by: Tero Kristo --- include/dt-bindings/clock/dra7.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/dt-bindings/clock/dra7.h b/include/dt-bindings/clock/dra7.h index ff33f621b225..8cec5a1e1806 100644 --- a/include/dt-bindings/clock/dra7.h +++ b/include/dt-bindings/clock/dra7.h @@ -88,6 +88,9 @@ #define DRA7_DSS_CORE_CLKCTRL DRA7_CLKCTRL_INDEX(0x20) #define DRA7_BB2D_CLKCTRL DRA7_CLKCTRL_INDEX(0x30) +/* gpu clocks */ +#define DRA7_GPU_CLKCTRL DRA7_CLKCTRL_INDEX(0x20) + /* l3init clocks */ #define DRA7_MMC1_CLKCTRL DRA7_CLKCTRL_INDEX(0x28) #define DRA7_MMC2_CLKCTRL DRA7_CLKCTRL_INDEX(0x30) -- cgit v1.2.3 From cfcbc2dbb70826b91aa45ae37168b2db2aac1803 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 12 Dec 2019 09:46:10 -0800 Subject: ARM: dts: Add missing omap4 secure clocks The secure clocks on omap4 are similar to what we already have for dra7 in dra7_l4sec_clkctrl_regs and documented in the omap4460 TRM "Table 3-1346 L4PER_CM2 Registers Mapping Summary". The secure clocks are part of the l4_per clock manager. As the l4_per clock manager has now two clock domains as children, let's also update the l4_per clockdomain node name to follow the "clock" node naming with a domain specific compatible property. Cc: devicetree@vger.kernel.org Cc: Rob Herring Acked-by: Stephen Boyd Signed-off-by: Tony Lindgren --- include/dt-bindings/clock/omap4.h | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'include') diff --git a/include/dt-bindings/clock/omap4.h b/include/dt-bindings/clock/omap4.h index 5167b2d93ac3..88d73be84b94 100644 --- a/include/dt-bindings/clock/omap4.h +++ b/include/dt-bindings/clock/omap4.h @@ -124,6 +124,17 @@ #define OMAP4_UART4_CLKCTRL OMAP4_CLKCTRL_INDEX(0x158) #define OMAP4_MMC5_CLKCTRL OMAP4_CLKCTRL_INDEX(0x160) +/* l4_secure clocks */ +#define OMAP4_L4_SECURE_CLKCTRL_OFFSET 0x1a0 +#define OMAP4_L4_SECURE_CLKCTRL_INDEX(offset) ((offset) - OMAP4_L4_SECURE_CLKCTRL_OFFSET) +#define OMAP4_AES1_CLKCTRL OMAP4_L4_SECURE_CLKCTRL_INDEX(0x1a0) +#define OMAP4_AES2_CLKCTRL OMAP4_L4_SECURE_CLKCTRL_INDEX(0x1a8) +#define OMAP4_DES3DES_CLKCTRL OMAP4_L4_SECURE_CLKCTRL_INDEX(0x1b0) +#define OMAP4_PKA_CLKCTRL OMAP4_L4_SECURE_CLKCTRL_INDEX(0x1b8) +#define OMAP4_RNG_CLKCTRL OMAP4_L4_SECURE_CLKCTRL_INDEX(0x1c0) +#define OMAP4_SHA2MD5_CLKCTRL OMAP4_L4_SECURE_CLKCTRL_INDEX(0x1c8) +#define OMAP4_CRYPTODMA_CLKCTRL OMAP4_L4_SECURE_CLKCTRL_INDEX(0x1d8) + /* l4_wkup clocks */ #define OMAP4_L4_WKUP_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20) #define OMAP4_WD_TIMER2_CLKCTRL OMAP4_CLKCTRL_INDEX(0x30) -- cgit v1.2.3 From 723a567f43b8ffa8089009bc8a260cc6f963661e Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 12 Dec 2019 09:46:10 -0800 Subject: ARM: dts: Add missing omap5 secure clocks The secure clocks on omap5 are similar to what we already have for dra7 with dra7_l4sec_clkctrl_regs and documented in the omap5432 TRM in "Table 3-1044. CORE_CM_CORE Registers Mapping Summary". The secure clocks are part of the l4per clock manager. As the l4per clock manager has now two clock domains as children, let's also update the l4per clockdomain node name to follow the "clock" node naming with a domain specific compatible property. Compared to omap4, omap5 has more clocks working in hardare autogating mode. Cc: devicetree@vger.kernel.org Cc: Rob Herring Acked-by: Stephen Boyd Signed-off-by: Tony Lindgren --- include/dt-bindings/clock/omap5.h | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'include') diff --git a/include/dt-bindings/clock/omap5.h b/include/dt-bindings/clock/omap5.h index 2b4fd9a96b91..41775272fd27 100644 --- a/include/dt-bindings/clock/omap5.h +++ b/include/dt-bindings/clock/omap5.h @@ -87,6 +87,17 @@ #define OMAP5_UART5_CLKCTRL OMAP5_CLKCTRL_INDEX(0x170) #define OMAP5_UART6_CLKCTRL OMAP5_CLKCTRL_INDEX(0x178) +/* l4_secure clocks */ +#define OMAP5_L4_SECURE_CLKCTRL_OFFSET 0x1a0 +#define OMAP5_L4_SECURE_CLKCTRL_INDEX(offset) ((offset) - OMAP5_L4_SECURE_CLKCTRL_OFFSET) +#define OMAP5_AES1_CLKCTRL OMAP5_L4_SECURE_CLKCTRL_INDEX(0x1a0) +#define OMAP5_AES2_CLKCTRL OMAP5_L4_SECURE_CLKCTRL_INDEX(0x1a8) +#define OMAP5_DES3DES_CLKCTRL OMAP5_L4_SECURE_CLKCTRL_INDEX(0x1b0) +#define OMAP5_FPKA_CLKCTRL OMAP5_L4_SECURE_CLKCTRL_INDEX(0x1b8) +#define OMAP5_RNG_CLKCTRL OMAP5_L4_SECURE_CLKCTRL_INDEX(0x1c0) +#define OMAP5_SHA2MD5_CLKCTRL OMAP5_L4_SECURE_CLKCTRL_INDEX(0x1c8) +#define OMAP5_DMA_CRYPTO_CLKCTRL OMAP5_L4_SECURE_CLKCTRL_INDEX(0x1d8) + /* iva clocks */ #define OMAP5_IVA_CLKCTRL OMAP5_CLKCTRL_INDEX(0x20) #define OMAP5_SL2IF_CLKCTRL OMAP5_CLKCTRL_INDEX(0x28) -- cgit v1.2.3