From 507805b83ff108473dba9d4909e41abd50cf07f5 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 10 Nov 2021 15:47:42 +0200 Subject: gpiolib: acpi: Remove never used devm_acpi_dev_remove_driver_gpios() Remove never used devm_acpi_dev_remove_driver_gpios(). Signed-off-by: Andy Shevchenko Reviewed-by: Mika Westerberg --- include/linux/gpio/consumer.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include') diff --git a/include/linux/gpio/consumer.h b/include/linux/gpio/consumer.h index 97a28ad3393b..3ad67b4a72be 100644 --- a/include/linux/gpio/consumer.h +++ b/include/linux/gpio/consumer.h @@ -690,7 +690,6 @@ void acpi_dev_remove_driver_gpios(struct acpi_device *adev); int devm_acpi_dev_add_driver_gpios(struct device *dev, const struct acpi_gpio_mapping *gpios); -void devm_acpi_dev_remove_driver_gpios(struct device *dev); struct gpio_desc *acpi_get_and_request_gpiod(char *path, int pin, char *label); @@ -708,7 +707,6 @@ static inline int devm_acpi_dev_add_driver_gpios(struct device *dev, { return -ENXIO; } -static inline void devm_acpi_dev_remove_driver_gpios(struct device *dev) {} #endif /* CONFIG_GPIOLIB && CONFIG_ACPI */ -- cgit v1.2.3 From dd61b29207ca4f346fbd9c06bc49f093e3369185 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Tue, 7 Dec 2021 10:34:06 +0100 Subject: gpiolib: provide gpiod_remove_hogs() Currently all users of gpiod_add_hogs() call it only once at system init so there never was any need for a mechanism allowing to remove them. Now the upcoming gpio-sim will need to tear down chips with hogged lines so provide a function that allows to remove hogs. Signed-off-by: Bartosz Golaszewski Reviewed-by: Andy Shevchenko Acked-by: Linus Walleij --- include/linux/gpio/machine.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/linux/gpio/machine.h b/include/linux/gpio/machine.h index d755e529c1e3..2647dd10b541 100644 --- a/include/linux/gpio/machine.h +++ b/include/linux/gpio/machine.h @@ -100,6 +100,7 @@ void gpiod_add_lookup_table(struct gpiod_lookup_table *table); void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n); void gpiod_remove_lookup_table(struct gpiod_lookup_table *table); void gpiod_add_hogs(struct gpiod_hog *hogs); +void gpiod_remove_hogs(struct gpiod_hog *hogs); #else /* ! CONFIG_GPIOLIB */ static inline void gpiod_add_lookup_table(struct gpiod_lookup_table *table) {} @@ -108,6 +109,7 @@ void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n) {} static inline void gpiod_remove_lookup_table(struct gpiod_lookup_table *table) {} static inline void gpiod_add_hogs(struct gpiod_hog *hogs) {} +static inline void gpiod_remove_hogs(struct gpiod_hog *hogs) {} #endif /* CONFIG_GPIOLIB */ #endif /* __LINUX_GPIO_MACHINE_H */ -- cgit v1.2.3 From 990f6756bb64756d2d1033118cded6333b43397d Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Mon, 13 Dec 2021 11:16:41 +0100 Subject: gpiolib: allow to specify the firmware node in struct gpio_chip Software nodes allow us to represent hierarchies for device components that don't have their struct device representation yet - for instance: banks of GPIOs under a common GPIO expander. The core gpiolib core however doesn't offer any way of passing this information from the drivers. This extends struct gpio_chip with a pointer to fwnode that can be set by the driver and used to pass device properties for child nodes. This is similar to how we handle device-tree sub-nodes with CONFIG_OF_GPIO enabled. Signed-off-by: Bartosz Golaszewski Reviewed-by: Andy Shevchenko Acked-by: Linus Walleij --- include/linux/gpio/driver.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index a673a359e20b..b0728c8ad90c 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -289,6 +289,7 @@ struct gpio_irq_chip { * number or the name of the SoC IP-block implementing it. * @gpiodev: the internal state holder, opaque struct * @parent: optional parent device providing the GPIOs + * @fwnode: optional fwnode providing this controller's properties * @owner: helps prevent removal of modules exporting active GPIOs * @request: optional hook for chip-specific activation, such as * enabling module power and clock; may sleep @@ -377,6 +378,7 @@ struct gpio_chip { const char *label; struct gpio_device *gpiodev; struct device *parent; + struct fwnode_handle *fwnode; struct module *owner; int (*request)(struct gpio_chip *gc, -- cgit v1.2.3 From a8b10f3d12cfc168a389f3d97e1f762732d4d849 Mon Sep 17 00:00:00 2001 From: Prathamesh Shete Date: Fri, 10 Dec 2021 17:02:03 +0100 Subject: dt-bindings: gpio: Add Tegra234 support Extend the existing Tegra186 GPIO controller device tree bindings with support for the GPIO controller found on Tegra234. The number of pins is slightly different, but the programming model remains the same. Signed-off-by: Prathamesh Shete Reviewed-by: Linus Walleij Reviewed-by: Rob Herring [treding@nvidia.com: update device tree bindings] Signed-off-by: Thierry Reding Signed-off-by: Bartosz Golaszewski --- include/dt-bindings/gpio/tegra234-gpio.h | 63 ++++++++++++++++++++++++++++++++ 1 file changed, 63 insertions(+) create mode 100644 include/dt-bindings/gpio/tegra234-gpio.h (limited to 'include') diff --git a/include/dt-bindings/gpio/tegra234-gpio.h b/include/dt-bindings/gpio/tegra234-gpio.h new file mode 100644 index 000000000000..d7a1f2e298e8 --- /dev/null +++ b/include/dt-bindings/gpio/tegra234-gpio.h @@ -0,0 +1,63 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. */ + +/* + * This header provides constants for binding nvidia,tegra234-gpio*. + * + * The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below + * provide names for this. + * + * The second cell contains standard flag values specified in gpio.h. + */ + +#ifndef _DT_BINDINGS_GPIO_TEGRA234_GPIO_H +#define _DT_BINDINGS_GPIO_TEGRA234_GPIO_H + +#include + +/* GPIOs implemented by main GPIO controller */ +#define TEGRA234_MAIN_GPIO_PORT_A 0 +#define TEGRA234_MAIN_GPIO_PORT_B 1 +#define TEGRA234_MAIN_GPIO_PORT_C 2 +#define TEGRA234_MAIN_GPIO_PORT_D 3 +#define TEGRA234_MAIN_GPIO_PORT_E 4 +#define TEGRA234_MAIN_GPIO_PORT_F 5 +#define TEGRA234_MAIN_GPIO_PORT_G 6 +#define TEGRA234_MAIN_GPIO_PORT_H 7 +#define TEGRA234_MAIN_GPIO_PORT_I 8 +#define TEGRA234_MAIN_GPIO_PORT_J 9 +#define TEGRA234_MAIN_GPIO_PORT_K 10 +#define TEGRA234_MAIN_GPIO_PORT_L 11 +#define TEGRA234_MAIN_GPIO_PORT_M 12 +#define TEGRA234_MAIN_GPIO_PORT_N 13 +#define TEGRA234_MAIN_GPIO_PORT_P 14 +#define TEGRA234_MAIN_GPIO_PORT_Q 15 +#define TEGRA234_MAIN_GPIO_PORT_R 16 +#define TEGRA234_MAIN_GPIO_PORT_S 17 +#define TEGRA234_MAIN_GPIO_PORT_T 18 +#define TEGRA234_MAIN_GPIO_PORT_U 19 +#define TEGRA234_MAIN_GPIO_PORT_V 20 +#define TEGRA234_MAIN_GPIO_PORT_X 21 +#define TEGRA234_MAIN_GPIO_PORT_Y 22 +#define TEGRA234_MAIN_GPIO_PORT_Z 23 +#define TEGRA234_MAIN_GPIO_PORT_AC 24 +#define TEGRA234_MAIN_GPIO_PORT_AD 25 +#define TEGRA234_MAIN_GPIO_PORT_AE 26 +#define TEGRA234_MAIN_GPIO_PORT_AF 27 +#define TEGRA234_MAIN_GPIO_PORT_AG 28 + +#define TEGRA234_MAIN_GPIO(port, offset) \ + ((TEGRA234_MAIN_GPIO_PORT_##port * 8) + offset) + +/* GPIOs implemented by AON GPIO controller */ +#define TEGRA234_AON_GPIO_PORT_AA 0 +#define TEGRA234_AON_GPIO_PORT_BB 1 +#define TEGRA234_AON_GPIO_PORT_CC 2 +#define TEGRA234_AON_GPIO_PORT_DD 3 +#define TEGRA234_AON_GPIO_PORT_EE 4 +#define TEGRA234_AON_GPIO_PORT_GG 5 + +#define TEGRA234_AON_GPIO(port, offset) \ + ((TEGRA234_AON_GPIO_PORT_##port * 8) + offset) + +#endif -- cgit v1.2.3 From e82513696eadcf71048be174b4b71f9903ba4afd Mon Sep 17 00:00:00 2001 From: Daniel Palmer Date: Mon, 13 Dec 2021 18:40:33 +0900 Subject: dt-bindings: gpio: msc313: Add offsets for ssd20xd Add the gpio offsets for the SSD201 and SSD202D chips. Signed-off-by: Daniel Palmer Acked-by: Rob Herring Reviewed-by: Linus Walleij Signed-off-by: Bartosz Golaszewski --- include/dt-bindings/gpio/msc313-gpio.h | 71 ++++++++++++++++++++++++++++++++++ 1 file changed, 71 insertions(+) (limited to 'include') diff --git a/include/dt-bindings/gpio/msc313-gpio.h b/include/dt-bindings/gpio/msc313-gpio.h index 2dd56683d3c1..5458c6580a02 100644 --- a/include/dt-bindings/gpio/msc313-gpio.h +++ b/include/dt-bindings/gpio/msc313-gpio.h @@ -50,4 +50,75 @@ #define MSC313_GPIO_SPI0_DI (MSC313_GPIO_SPI0 + 2) #define MSC313_GPIO_SPI0_DO (MSC313_GPIO_SPI0 + 3) +/* SSD20x */ +#define SSD20XD_GPIO_FUART 0 +#define SSD20XD_GPIO_FUART_RX (SSD20XD_GPIO_FUART + 0) +#define SSD20XD_GPIO_FUART_TX (SSD20XD_GPIO_FUART + 1) +#define SSD20XD_GPIO_FUART_CTS (SSD20XD_GPIO_FUART + 2) +#define SSD20XD_GPIO_FUART_RTS (SSD20XD_GPIO_FUART + 3) + +#define SSD20XD_GPIO_SD (SSD20XD_GPIO_FUART_RTS + 1) +#define SSD20XD_GPIO_SD_CLK (SSD20XD_GPIO_SD + 0) +#define SSD20XD_GPIO_SD_CMD (SSD20XD_GPIO_SD + 1) +#define SSD20XD_GPIO_SD_D0 (SSD20XD_GPIO_SD + 2) +#define SSD20XD_GPIO_SD_D1 (SSD20XD_GPIO_SD + 3) +#define SSD20XD_GPIO_SD_D2 (SSD20XD_GPIO_SD + 4) +#define SSD20XD_GPIO_SD_D3 (SSD20XD_GPIO_SD + 5) + +#define SSD20XD_GPIO_UART0 (SSD20XD_GPIO_SD_D3 + 1) +#define SSD20XD_GPIO_UART0_RX (SSD20XD_GPIO_UART0 + 0) +#define SSD20XD_GPIO_UART0_TX (SSD20XD_GPIO_UART0 + 1) + +#define SSD20XD_GPIO_UART1 (SSD20XD_GPIO_UART0_TX + 1) +#define SSD20XD_GPIO_UART1_RX (SSD20XD_GPIO_UART1 + 0) +#define SSD20XD_GPIO_UART1_TX (SSD20XD_GPIO_UART1 + 1) + +#define SSD20XD_GPIO_TTL (SSD20XD_GPIO_UART1_TX + 1) +#define SSD20XD_GPIO_TTL0 (SSD20XD_GPIO_TTL + 0) +#define SSD20XD_GPIO_TTL1 (SSD20XD_GPIO_TTL + 1) +#define SSD20XD_GPIO_TTL2 (SSD20XD_GPIO_TTL + 2) +#define SSD20XD_GPIO_TTL3 (SSD20XD_GPIO_TTL + 3) +#define SSD20XD_GPIO_TTL4 (SSD20XD_GPIO_TTL + 4) +#define SSD20XD_GPIO_TTL5 (SSD20XD_GPIO_TTL + 5) +#define SSD20XD_GPIO_TTL6 (SSD20XD_GPIO_TTL + 6) +#define SSD20XD_GPIO_TTL7 (SSD20XD_GPIO_TTL + 7) +#define SSD20XD_GPIO_TTL8 (SSD20XD_GPIO_TTL + 8) +#define SSD20XD_GPIO_TTL9 (SSD20XD_GPIO_TTL + 9) +#define SSD20XD_GPIO_TTL10 (SSD20XD_GPIO_TTL + 10) +#define SSD20XD_GPIO_TTL11 (SSD20XD_GPIO_TTL + 11) +#define SSD20XD_GPIO_TTL12 (SSD20XD_GPIO_TTL + 12) +#define SSD20XD_GPIO_TTL13 (SSD20XD_GPIO_TTL + 13) +#define SSD20XD_GPIO_TTL14 (SSD20XD_GPIO_TTL + 14) +#define SSD20XD_GPIO_TTL15 (SSD20XD_GPIO_TTL + 15) +#define SSD20XD_GPIO_TTL16 (SSD20XD_GPIO_TTL + 16) +#define SSD20XD_GPIO_TTL17 (SSD20XD_GPIO_TTL + 17) +#define SSD20XD_GPIO_TTL18 (SSD20XD_GPIO_TTL + 18) +#define SSD20XD_GPIO_TTL19 (SSD20XD_GPIO_TTL + 19) +#define SSD20XD_GPIO_TTL20 (SSD20XD_GPIO_TTL + 20) +#define SSD20XD_GPIO_TTL21 (SSD20XD_GPIO_TTL + 21) +#define SSD20XD_GPIO_TTL22 (SSD20XD_GPIO_TTL + 22) +#define SSD20XD_GPIO_TTL23 (SSD20XD_GPIO_TTL + 23) +#define SSD20XD_GPIO_TTL24 (SSD20XD_GPIO_TTL + 24) +#define SSD20XD_GPIO_TTL25 (SSD20XD_GPIO_TTL + 25) +#define SSD20XD_GPIO_TTL26 (SSD20XD_GPIO_TTL + 26) +#define SSD20XD_GPIO_TTL27 (SSD20XD_GPIO_TTL + 27) + +#define SSD20XD_GPIO_GPIO (SSD20XD_GPIO_TTL27 + 1) +#define SSD20XD_GPIO_GPIO0 (SSD20XD_GPIO_GPIO + 0) +#define SSD20XD_GPIO_GPIO1 (SSD20XD_GPIO_GPIO + 1) +#define SSD20XD_GPIO_GPIO2 (SSD20XD_GPIO_GPIO + 2) +#define SSD20XD_GPIO_GPIO3 (SSD20XD_GPIO_GPIO + 3) +#define SSD20XD_GPIO_GPIO4 (SSD20XD_GPIO_GPIO + 4) +#define SSD20XD_GPIO_GPIO5 (SSD20XD_GPIO_GPIO + 5) +#define SSD20XD_GPIO_GPIO6 (SSD20XD_GPIO_GPIO + 6) +#define SSD20XD_GPIO_GPIO7 (SSD20XD_GPIO_GPIO + 7) +#define SSD20XD_GPIO_GPIO10 (SSD20XD_GPIO_GPIO + 8) +#define SSD20XD_GPIO_GPIO11 (SSD20XD_GPIO_GPIO + 9) +#define SSD20XD_GPIO_GPIO12 (SSD20XD_GPIO_GPIO + 10) +#define SSD20XD_GPIO_GPIO13 (SSD20XD_GPIO_GPIO + 11) +#define SSD20XD_GPIO_GPIO14 (SSD20XD_GPIO_GPIO + 12) +#define SSD20XD_GPIO_GPIO85 (SSD20XD_GPIO_GPIO + 13) +#define SSD20XD_GPIO_GPIO86 (SSD20XD_GPIO_GPIO + 14) +#define SSD20XD_GPIO_GPIO90 (SSD20XD_GPIO_GPIO + 15) + #endif /* _DT_BINDINGS_MSC313_GPIO_H */ -- cgit v1.2.3 From 9f01881beae9e40c87f3edfb81e87e973f85d272 Mon Sep 17 00:00:00 2001 From: Akhil R Date: Thu, 16 Dec 2021 15:10:08 +0100 Subject: dt-bindings: gpio: Add Tegra241 support Add the port definitions for the main and AON GPIO controllers found on Tegra241 (Grace). Signed-off-by: Akhil R Signed-off-by: Thierry Reding Signed-off-by: Bartosz Golaszewski --- include/dt-bindings/gpio/tegra241-gpio.h | 42 ++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 include/dt-bindings/gpio/tegra241-gpio.h (limited to 'include') diff --git a/include/dt-bindings/gpio/tegra241-gpio.h b/include/dt-bindings/gpio/tegra241-gpio.h new file mode 100644 index 000000000000..80cee3016be6 --- /dev/null +++ b/include/dt-bindings/gpio/tegra241-gpio.h @@ -0,0 +1,42 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. */ + +/* + * This header provides constants for the nvidia,tegra241-gpio DT binding. + * + * The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below + * provide names for this. + * + * The second cell contains standard flag values specified in gpio.h. + */ + +#ifndef _DT_BINDINGS_GPIO_TEGRA241_GPIO_H +#define _DT_BINDINGS_GPIO_TEGRA241_GPIO_H + +#include + +/* GPIOs implemented by main GPIO controller */ +#define TEGRA241_MAIN_GPIO_PORT_A 0 +#define TEGRA241_MAIN_GPIO_PORT_B 1 +#define TEGRA241_MAIN_GPIO_PORT_C 2 +#define TEGRA241_MAIN_GPIO_PORT_D 3 +#define TEGRA241_MAIN_GPIO_PORT_E 4 +#define TEGRA241_MAIN_GPIO_PORT_F 5 +#define TEGRA241_MAIN_GPIO_PORT_G 6 +#define TEGRA241_MAIN_GPIO_PORT_H 7 +#define TEGRA241_MAIN_GPIO_PORT_I 8 +#define TEGRA241_MAIN_GPIO_PORT_J 9 +#define TEGRA241_MAIN_GPIO_PORT_K 10 +#define TEGRA241_MAIN_GPIO_PORT_L 11 + +#define TEGRA241_MAIN_GPIO(port, offset) \ + ((TEGRA241_MAIN_GPIO_PORT_##port * 8) + (offset)) + +/* GPIOs implemented by AON GPIO controller */ +#define TEGRA241_AON_GPIO_PORT_AA 0 +#define TEGRA241_AON_GPIO_PORT_BB 1 + +#define TEGRA241_AON_GPIO(port, offset) \ + ((TEGRA241_AON_GPIO_PORT_##port * 8) + (offset)) + +#endif -- cgit v1.2.3