From a14b820316e84310b1bad3701a8d4c9159377633 Mon Sep 17 00:00:00 2001 From: Vivek Gautam Date: Thu, 18 Jul 2019 18:32:36 +0530 Subject: soc: qcom: llcc cleanup to get rid of sdm845 specific driver file A single file should suffice the need to program the llcc for various platforms. Get rid of sdm845 specific driver file to make way for a more generic driver. Signed-off-by: Vivek Gautam Signed-off-by: Bjorn Andersson --- include/linux/soc/qcom/llcc-qcom.h | 57 ++++++++++++++------------------------ 1 file changed, 21 insertions(+), 36 deletions(-) (limited to 'include') diff --git a/include/linux/soc/qcom/llcc-qcom.h b/include/linux/soc/qcom/llcc-qcom.h index eb71a50b8afc..d5cad6f7953c 100644 --- a/include/linux/soc/qcom/llcc-qcom.h +++ b/include/linux/soc/qcom/llcc-qcom.h @@ -39,18 +39,27 @@ struct llcc_slice_desc { /** * llcc_slice_config - Data associated with the llcc slice - * @usecase_id: usecase id for which the llcc slice is used - * @slice_id: llcc slice id assigned to each slice - * @max_cap: maximum capacity of the llcc slice - * @priority: priority of the llcc slice - * @fixed_size: whether the llcc slice can grow beyond its size - * @bonus_ways: bonus ways associated with llcc slice - * @res_ways: reserved ways associated with llcc slice - * @cache_mode: mode of the llcc slice - * @probe_target_ways: Probe only reserved and bonus ways on a cache miss - * @dis_cap_alloc: Disable capacity based allocation - * @retain_on_pc: Retain through power collapse - * @activate_on_init: activate the slice on init + * @usecase_id: Unique id for the client's use case + * @slice_id: llcc slice id for each client + * @max_cap: The maximum capacity of the cache slice provided in KB + * @priority: Priority of the client used to select victim line for replacement + * @fixed_size: Boolean indicating if the slice has a fixed capacity + * @bonus_ways: Bonus ways are additional ways to be used for any slice, + * if client ends up using more than reserved cache ways. Bonus + * ways are allocated only if they are not reserved for some + * other client. + * @res_ways: Reserved ways for the cache slice, the reserved ways cannot + * be used by any other client than the one its assigned to. + * @cache_mode: Each slice operates as a cache, this controls the mode of the + * slice: normal or TCM(Tightly Coupled Memory) + * @probe_target_ways: Determines what ways to probe for access hit. When + * configured to 1 only bonus and reserved ways are probed. + * When configured to 0 all ways in llcc are probed. + * @dis_cap_alloc: Disable capacity based allocation for a client + * @retain_on_pc: If this bit is set and client has maintained active vote + * then the ways assigned to this client are not flushed on power + * collapse. + * @activate_on_init: Activate the slice immediately after it is programmed */ struct llcc_slice_config { u32 usecase_id; @@ -154,20 +163,6 @@ int llcc_slice_activate(struct llcc_slice_desc *desc); */ int llcc_slice_deactivate(struct llcc_slice_desc *desc); -/** - * qcom_llcc_probe - program the sct table - * @pdev: platform device pointer - * @table: soc sct table - * @sz: Size of the config table - */ -int qcom_llcc_probe(struct platform_device *pdev, - const struct llcc_slice_config *table, u32 sz); - -/** - * qcom_llcc_remove - remove the sct table - * @pdev: Platform device pointer - */ -int qcom_llcc_remove(struct platform_device *pdev); #else static inline struct llcc_slice_desc *llcc_slice_getd(u32 uid) { @@ -197,16 +192,6 @@ static inline int llcc_slice_deactivate(struct llcc_slice_desc *desc) { return -EINVAL; } -static inline int qcom_llcc_probe(struct platform_device *pdev, - const struct llcc_slice_config *table, u32 sz) -{ - return -ENODEV; -} - -static inline int qcom_llcc_remove(struct platform_device *pdev) -{ - return -ENODEV; -} #endif #endif -- cgit v1.2.3 From 99356b03b431f9589bbaec2bc5bacceccb3dd99a Mon Sep 17 00:00:00 2001 From: Vivek Gautam Date: Thu, 18 Jul 2019 18:32:38 +0530 Subject: soc: qcom: Make llcc-qcom a generic driver This makes way for adding future llcc versions. Also pull out the llcc-qcom specific definitions from includes. Includes path now contains the only definitions that are to be exposed to other subsystems. Signed-off-by: Vivek Gautam Signed-off-by: Bjorn Andersson --- include/linux/soc/qcom/llcc-qcom.h | 89 -------------------------------------- 1 file changed, 89 deletions(-) (limited to 'include') diff --git a/include/linux/soc/qcom/llcc-qcom.h b/include/linux/soc/qcom/llcc-qcom.h index d5cad6f7953c..c0acdb28fde8 100644 --- a/include/linux/soc/qcom/llcc-qcom.h +++ b/include/linux/soc/qcom/llcc-qcom.h @@ -37,95 +37,6 @@ struct llcc_slice_desc { size_t slice_size; }; -/** - * llcc_slice_config - Data associated with the llcc slice - * @usecase_id: Unique id for the client's use case - * @slice_id: llcc slice id for each client - * @max_cap: The maximum capacity of the cache slice provided in KB - * @priority: Priority of the client used to select victim line for replacement - * @fixed_size: Boolean indicating if the slice has a fixed capacity - * @bonus_ways: Bonus ways are additional ways to be used for any slice, - * if client ends up using more than reserved cache ways. Bonus - * ways are allocated only if they are not reserved for some - * other client. - * @res_ways: Reserved ways for the cache slice, the reserved ways cannot - * be used by any other client than the one its assigned to. - * @cache_mode: Each slice operates as a cache, this controls the mode of the - * slice: normal or TCM(Tightly Coupled Memory) - * @probe_target_ways: Determines what ways to probe for access hit. When - * configured to 1 only bonus and reserved ways are probed. - * When configured to 0 all ways in llcc are probed. - * @dis_cap_alloc: Disable capacity based allocation for a client - * @retain_on_pc: If this bit is set and client has maintained active vote - * then the ways assigned to this client are not flushed on power - * collapse. - * @activate_on_init: Activate the slice immediately after it is programmed - */ -struct llcc_slice_config { - u32 usecase_id; - u32 slice_id; - u32 max_cap; - u32 priority; - bool fixed_size; - u32 bonus_ways; - u32 res_ways; - u32 cache_mode; - u32 probe_target_ways; - bool dis_cap_alloc; - bool retain_on_pc; - bool activate_on_init; -}; - -/** - * llcc_drv_data - Data associated with the llcc driver - * @regmap: regmap associated with the llcc device - * @bcast_regmap: regmap associated with llcc broadcast offset - * @cfg: pointer to the data structure for slice configuration - * @lock: mutex associated with each slice - * @cfg_size: size of the config data table - * @max_slices: max slices as read from device tree - * @num_banks: Number of llcc banks - * @bitmap: Bit map to track the active slice ids - * @offsets: Pointer to the bank offsets array - * @ecc_irq: interrupt for llcc cache error detection and reporting - */ -struct llcc_drv_data { - struct regmap *regmap; - struct regmap *bcast_regmap; - const struct llcc_slice_config *cfg; - struct mutex lock; - u32 cfg_size; - u32 max_slices; - u32 num_banks; - unsigned long *bitmap; - u32 *offsets; - int ecc_irq; -}; - -/** - * llcc_edac_reg_data - llcc edac registers data for each error type - * @name: Name of the error - * @synd_reg: Syndrome register address - * @count_status_reg: Status register address to read the error count - * @ways_status_reg: Status register address to read the error ways - * @reg_cnt: Number of registers - * @count_mask: Mask value to get the error count - * @ways_mask: Mask value to get the error ways - * @count_shift: Shift value to get the error count - * @ways_shift: Shift value to get the error ways - */ -struct llcc_edac_reg_data { - char *name; - u64 synd_reg; - u64 count_status_reg; - u64 ways_status_reg; - u32 reg_cnt; - u32 count_mask; - u32 ways_mask; - u8 count_shift; - u8 ways_shift; -}; - #if IS_ENABLED(CONFIG_QCOM_LLCC) /** * llcc_slice_getd - get llcc slice descriptor -- cgit v1.2.3 From 8cde3c2153e8f57be884c0e73f18bc4de150e870 Mon Sep 17 00:00:00 2001 From: Carlo Caione Date: Wed, 31 Jul 2019 09:23:39 +0100 Subject: firmware: meson_sm: Rework driver as a proper platform driver The secure monitor driver is currently a frankenstein driver which is registered as a platform driver but its functionality goes through a global struct accessed by the consumer drivers using exported helper functions. Try to tidy up the driver moving the firmware struct into the driver data and make the consumer drivers referencing the secure-monitor using a new property in the DT. Currently only the nvmem driver is using this API so we can fix it in the same commit. Reviewed-by: Jerome Brunet Signed-off-by: Carlo Caione Signed-off-by: Kevin Hilman --- include/linux/firmware/meson/meson_sm.h | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/linux/firmware/meson/meson_sm.h b/include/linux/firmware/meson/meson_sm.h index 7613bf7c9442..6669e2a1d5fd 100644 --- a/include/linux/firmware/meson/meson_sm.h +++ b/include/linux/firmware/meson/meson_sm.h @@ -16,11 +16,14 @@ enum { struct meson_sm_firmware; -int meson_sm_call(unsigned int cmd_index, u32 *ret, u32 arg0, u32 arg1, - u32 arg2, u32 arg3, u32 arg4); -int meson_sm_call_write(void *buffer, unsigned int b_size, unsigned int cmd_index, - u32 arg0, u32 arg1, u32 arg2, u32 arg3, u32 arg4); -int meson_sm_call_read(void *buffer, unsigned int bsize, unsigned int cmd_index, - u32 arg0, u32 arg1, u32 arg2, u32 arg3, u32 arg4); +int meson_sm_call(struct meson_sm_firmware *fw, unsigned int cmd_index, + u32 *ret, u32 arg0, u32 arg1, u32 arg2, u32 arg3, u32 arg4); +int meson_sm_call_write(struct meson_sm_firmware *fw, void *buffer, + unsigned int b_size, unsigned int cmd_index, u32 arg0, + u32 arg1, u32 arg2, u32 arg3, u32 arg4); +int meson_sm_call_read(struct meson_sm_firmware *fw, void *buffer, + unsigned int bsize, unsigned int cmd_index, u32 arg0, + u32 arg1, u32 arg2, u32 arg3, u32 arg4); +struct meson_sm_firmware *meson_sm_get(struct device_node *firmware_node); #endif /* _MESON_SM_FW_H_ */ -- cgit v1.2.3 From c2016cc612db7b88483073d6ff51edd200bc6ddc Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Thu, 5 Sep 2019 15:50:39 +0200 Subject: reset: dt-bindings: meson: update arb bindings for sm1 SM1 SoC family adds two new audio FIFOs with the related arb reset lines Reviewed-by: Rob Herring Signed-off-by: Jerome Brunet Signed-off-by: Philipp Zabel --- include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h b/include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h index 05c36367875c..1ef807856cb8 100644 --- a/include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h +++ b/include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h @@ -13,5 +13,7 @@ #define AXG_ARB_FRDDR_A 3 #define AXG_ARB_FRDDR_B 4 #define AXG_ARB_FRDDR_C 5 +#define AXG_ARB_TODDR_D 6 +#define AXG_ARB_FRDDR_D 7 #endif /* _DT_BINDINGS_AMLOGIC_MESON_AXG_AUDIO_ARB_H */ -- cgit v1.2.3 From 4bc6aadbcc0e2a852e584bf5410fe90ea5a5f86a Mon Sep 17 00:00:00 2001 From: "Angelo G. Del Regno" Date: Sat, 21 Sep 2019 12:12:06 +0200 Subject: dt-bindings: power: Add missing rpmpd smd performance level The RPM_SMD_LEVEL_TURBO_HIGH is used by MSM8956/8976 and APQ variants: add the definition. Signed-off-by: Angelo G. Del Regno Signed-off-by: Bjorn Andersson --- include/dt-bindings/power/qcom-rpmpd.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/dt-bindings/power/qcom-rpmpd.h b/include/dt-bindings/power/qcom-rpmpd.h index 93e36d011527..30a0aee0df57 100644 --- a/include/dt-bindings/power/qcom-rpmpd.h +++ b/include/dt-bindings/power/qcom-rpmpd.h @@ -68,6 +68,7 @@ #define RPM_SMD_LEVEL_NOM_PLUS 320 #define RPM_SMD_LEVEL_TURBO 384 #define RPM_SMD_LEVEL_TURBO_NO_CPR 416 +#define RPM_SMD_LEVEL_TURBO_HIGH 448 #define RPM_SMD_LEVEL_BINNING 512 #endif -- cgit v1.2.3 From b1d522443b4b000974e48f27d4ee77dbfc67962d Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Sat, 5 Oct 2019 13:07:58 +0200 Subject: soc: qcom: rpmpd: Add rpm power domains for msm8976 The MSM8956/76 SoCs have two main voltage-level power domains, VDD_CX and VDD_MX, which also have their own voltage-floor-level (VFL) corner. Signed-off-by: AngeloGioacchino Del Regno Signed-off-by: Bjorn Andersson --- include/dt-bindings/power/qcom-rpmpd.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'include') diff --git a/include/dt-bindings/power/qcom-rpmpd.h b/include/dt-bindings/power/qcom-rpmpd.h index 30a0aee0df57..f05f8b1808ec 100644 --- a/include/dt-bindings/power/qcom-rpmpd.h +++ b/include/dt-bindings/power/qcom-rpmpd.h @@ -27,6 +27,14 @@ #define RPMH_REGULATOR_LEVEL_TURBO 384 #define RPMH_REGULATOR_LEVEL_TURBO_L1 416 +/* MSM8976 Power Domain Indexes */ +#define MSM8976_VDDCX 0 +#define MSM8976_VDDCX_AO 1 +#define MSM8976_VDDCX_VFL 2 +#define MSM8976_VDDMX 3 +#define MSM8976_VDDMX_AO 4 +#define MSM8976_VDDMX_VFL 5 + /* MSM8996 Power Domain Indexes */ #define MSM8996_VDDCX 0 #define MSM8996_VDDCX_AO 1 -- cgit v1.2.3 From 5d9730b9eb05a349c278a9f6f058ebefa9063def Mon Sep 17 00:00:00 2001 From: Xingyu Chen Date: Sun, 29 Sep 2019 14:24:14 +0800 Subject: dt-bindings: reset: add bindings for the Meson-A1 SoC Reset Controller Add DT bindings for the Meson-A1 SoC Reset Controller include file, and also slightly update documentation. Signed-off-by: Xingyu Chen Reviewed-by: Rob Herring Signed-off-by: Philipp Zabel --- include/dt-bindings/reset/amlogic,meson-a1-reset.h | 74 ++++++++++++++++++++++ 1 file changed, 74 insertions(+) create mode 100644 include/dt-bindings/reset/amlogic,meson-a1-reset.h (limited to 'include') diff --git a/include/dt-bindings/reset/amlogic,meson-a1-reset.h b/include/dt-bindings/reset/amlogic,meson-a1-reset.h new file mode 100644 index 000000000000..f1a3a797540d --- /dev/null +++ b/include/dt-bindings/reset/amlogic,meson-a1-reset.h @@ -0,0 +1,74 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) + * + * Copyright (c) 2019 Amlogic, Inc. All rights reserved. + * Author: Xingyu Chen + * + */ + +#ifndef _DT_BINDINGS_AMLOGIC_MESON_A1_RESET_H +#define _DT_BINDINGS_AMLOGIC_MESON_A1_RESET_H + +/* RESET0 */ +/* 0 */ +#define RESET_AM2AXI_VAD 1 +/* 2-3 */ +#define RESET_PSRAM 4 +#define RESET_PAD_CTRL 5 +/* 6 */ +#define RESET_TEMP_SENSOR 7 +#define RESET_AM2AXI_DEV 8 +/* 9 */ +#define RESET_SPICC_A 10 +#define RESET_MSR_CLK 11 +#define RESET_AUDIO 12 +#define RESET_ANALOG_CTRL 13 +#define RESET_SAR_ADC 14 +#define RESET_AUDIO_VAD 15 +#define RESET_CEC 16 +#define RESET_PWM_EF 17 +#define RESET_PWM_CD 18 +#define RESET_PWM_AB 19 +/* 20 */ +#define RESET_IR_CTRL 21 +#define RESET_I2C_S_A 22 +/* 23 */ +#define RESET_I2C_M_D 24 +#define RESET_I2C_M_C 25 +#define RESET_I2C_M_B 26 +#define RESET_I2C_M_A 27 +#define RESET_I2C_PROD_AHB 28 +#define RESET_I2C_PROD 29 +/* 30-31 */ + +/* RESET1 */ +#define RESET_ACODEC 32 +#define RESET_DMA 33 +#define RESET_SD_EMMC_A 34 +/* 35 */ +#define RESET_USBCTRL 36 +/* 37 */ +#define RESET_USBPHY 38 +/* 39-41 */ +#define RESET_RSA 42 +#define RESET_DMC 43 +/* 44 */ +#define RESET_IRQ_CTRL 45 +/* 46 */ +#define RESET_NIC_VAD 47 +#define RESET_NIC_AXI 48 +#define RESET_RAMA 49 +#define RESET_RAMB 50 +/* 51-52 */ +#define RESET_ROM 53 +#define RESET_SPIFC 54 +#define RESET_GIC 55 +#define RESET_UART_C 56 +#define RESET_UART_B 57 +#define RESET_UART_A 58 +#define RESET_OSC_RING 59 +/* 60-63 */ + +/* RESET2 */ +/* 64-95 */ + +#endif -- cgit v1.2.3 From 89da2ba947b1080199f4a6413686569a75fc2e7d Mon Sep 17 00:00:00 2001 From: YueHaibing Date: Tue, 8 Oct 2019 15:16:14 +0800 Subject: soc: qcom: Fix llcc-qcom definitions to include commit 99356b03b431 ("soc: qcom: Make llcc-qcom a generic driver") move these out of llcc-qcom.h, make the building fails: drivers/edac/qcom_edac.c:86:40: error: array type has incomplete element type struct llcc_edac_reg_data static const struct llcc_edac_reg_data edac_reg_data[] = { ^~~~~~~~~~~~~ drivers/edac/qcom_edac.c:87:3: error: array index in non-array initializer [LLCC_DRAM_CE] = { ^~~~~~~~~~~~ drivers/edac/qcom_edac.c:87:3: note: (near initialization for edac_reg_data) drivers/edac/qcom_edac.c:88:3: error: field name not in record or union initializer .name = "DRAM Single-bit", ... drivers/edac/qcom_edac.c:169:51: warning: struct llcc_drv_data declared inside parameter list will not be visible outside of this definition or declaration qcom_llcc_clear_error_status(int err_type, struct llcc_drv_data *drv) ^~~~~~~~~~~~~ This patch move the needed definitions back to include. Reported-by: Hulk Robot Fixes: 99356b03b431 ("soc: qcom: Make llcc-qcom a generic driver") Signed-off-by: YueHaibing Signed-off-by: Bjorn Andersson --- include/linux/soc/qcom/llcc-qcom.h | 50 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) (limited to 'include') diff --git a/include/linux/soc/qcom/llcc-qcom.h b/include/linux/soc/qcom/llcc-qcom.h index c0acdb28fde8..90b864655822 100644 --- a/include/linux/soc/qcom/llcc-qcom.h +++ b/include/linux/soc/qcom/llcc-qcom.h @@ -37,6 +37,56 @@ struct llcc_slice_desc { size_t slice_size; }; +/** + * llcc_edac_reg_data - llcc edac registers data for each error type + * @name: Name of the error + * @synd_reg: Syndrome register address + * @count_status_reg: Status register address to read the error count + * @ways_status_reg: Status register address to read the error ways + * @reg_cnt: Number of registers + * @count_mask: Mask value to get the error count + * @ways_mask: Mask value to get the error ways + * @count_shift: Shift value to get the error count + * @ways_shift: Shift value to get the error ways + */ +struct llcc_edac_reg_data { + char *name; + u64 synd_reg; + u64 count_status_reg; + u64 ways_status_reg; + u32 reg_cnt; + u32 count_mask; + u32 ways_mask; + u8 count_shift; + u8 ways_shift; +}; + +/** + * llcc_drv_data - Data associated with the llcc driver + * @regmap: regmap associated with the llcc device + * @bcast_regmap: regmap associated with llcc broadcast offset + * @cfg: pointer to the data structure for slice configuration + * @lock: mutex associated with each slice + * @cfg_size: size of the config data table + * @max_slices: max slices as read from device tree + * @num_banks: Number of llcc banks + * @bitmap: Bit map to track the active slice ids + * @offsets: Pointer to the bank offsets array + * @ecc_irq: interrupt for llcc cache error detection and reporting + */ +struct llcc_drv_data { + struct regmap *regmap; + struct regmap *bcast_regmap; + const struct llcc_slice_config *cfg; + struct mutex lock; + u32 cfg_size; + u32 max_slices; + u32 num_banks; + unsigned long *bitmap; + u32 *offsets; + int ecc_irq; +}; + #if IS_ENABLED(CONFIG_QCOM_LLCC) /** * llcc_slice_getd - get llcc slice descriptor -- cgit v1.2.3 From d30cd83f68535ca21412b1abe8684438690c1c2b Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Wed, 9 Oct 2019 08:55:38 -0700 Subject: soc: ti: omap-prm: add support for denying idle for reset clockdomain TI SoCs hardware reset signals require the parent clockdomain to be in force wakeup mode while de-asserting the reset, otherwise it may never complete. To support this, add pdata hooks to control the clockdomain directly. Signed-off-by: Tero Kristo Reviewed-by: Tony Lindgren Signed-off-by: Santosh Shilimkar --- include/linux/platform_data/ti-prm.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 include/linux/platform_data/ti-prm.h (limited to 'include') diff --git a/include/linux/platform_data/ti-prm.h b/include/linux/platform_data/ti-prm.h new file mode 100644 index 000000000000..28154c3226c2 --- /dev/null +++ b/include/linux/platform_data/ti-prm.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * TI PRM (Power & Reset Manager) platform data + * + * Copyright (C) 2019 Texas Instruments, Inc. + * + * Tero Kristo + */ + +#ifndef _LINUX_PLATFORM_DATA_TI_PRM_H +#define _LINUX_PLATFORM_DATA_TI_PRM_H + +struct clockdomain; + +struct ti_prm_platform_data { + void (*clkdm_deny_idle)(struct clockdomain *clkdm); + void (*clkdm_allow_idle)(struct clockdomain *clkdm); + struct clockdomain * (*clkdm_lookup)(const char *name); +}; + +#endif /* _LINUX_PLATFORM_DATA_TI_PRM_H */ -- cgit v1.2.3 From e502ff8606b32df4f9f2435ab00278312db125b3 Mon Sep 17 00:00:00 2001 From: Tejas Patel Date: Mon, 26 Aug 2019 13:30:44 -0700 Subject: soc: xilinx: Set CAP_UNUSABLE requirement for versal while powering down domain For "0" requirement which is used to inform firmware that device is not required currently by master, Versal PLM (Platform Loader and Manager) which runs on Platform Management Controller and is responsible platform management of devices that disables clock, power it down and reset the device. genpd_power_off() is being called during runtime suspend also. So, if any device goes to runtime suspend state during resumes it needs to be re-initialized again. It is possible that drivers do not reinitialize device upon resume from runtime suspend every time ans so dont want it to be powered down or get reset during runtime suspend. In Versal PLM new PM_CAP_UNUSABLE capability is added, which disables clock only and avoids power down and reset during runtime suspend. Power and reset will be gated with core suspend.So, this patch sets CAPABILITY_UNUSABLE requirement during gpd_power_off() if platform is other than zynqmp. Signed-off-by: Tejas Patel Signed-off-by: Jolly Shah Signed-off-by: Michal Simek --- include/linux/firmware/xlnx-zynqmp.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 778abbbc7d94..adb14bcedca2 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -2,7 +2,7 @@ /* * Xilinx Zynq MPSoC Firmware layer * - * Copyright (C) 2014-2018 Xilinx + * Copyright (C) 2014-2019 Xilinx * * Michal Simek * Davorin Mista @@ -46,6 +46,7 @@ #define ZYNQMP_PM_CAPABILITY_ACCESS 0x1U #define ZYNQMP_PM_CAPABILITY_CONTEXT 0x2U #define ZYNQMP_PM_CAPABILITY_WAKEUP 0x4U +#define ZYNQMP_PM_CAPABILITY_UNUSABLE 0x8U /* * Firmware FPGA Manager flags -- cgit v1.2.3 From a362687404edc5d73a4fc281af3b2b1542ef194e Mon Sep 17 00:00:00 2001 From: Olof Johansson Date: Mon, 21 Oct 2019 18:52:24 -0700 Subject: soc: mmp: guard include of asm/cputype.h with CONFIG_ARM{,64} Since this driver is enabled for COMPILE_TEST, it avoids build error on x86 allmodconfig: In file included from /build/drivers/phy/marvell/phy-mmp3-usb.c:12: /build/include/linux/soc/mmp/cputype.h:5:10: fatal error: asm/cputype.h: No such file or directory Link: https://lore.kernel.org/r/20191022015658.14624-1-olof@lixom.net Signed-off-by: Olof Johansson --- include/linux/soc/mmp/cputype.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/linux/soc/mmp/cputype.h b/include/linux/soc/mmp/cputype.h index c3ec88983e94..221790761e8e 100644 --- a/include/linux/soc/mmp/cputype.h +++ b/include/linux/soc/mmp/cputype.h @@ -2,7 +2,9 @@ #ifndef __ASM_MACH_CPUTYPE_H #define __ASM_MACH_CPUTYPE_H +#if defined(CONFIG_ARM) || defined(CONFIG_ARM64) #include +#endif /* * CPU Stepping CPU_ID CHIP_ID -- cgit v1.2.3 From 771fdcf8d3d04e77ae0f0dc1018144206a61d216 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Wed, 16 Oct 2019 16:57:53 +0200 Subject: PM / OPP: Support adjusting OPP voltages at runtime On some SoCs the Adaptive Voltage Scaling (AVS) technique is employed to optimize the operating voltage of a device. At a given frequency, the hardware monitors dynamic factors and either makes a suggestion for how much to adjust a voltage for the current frequency, or it automatically adjusts the voltage without software intervention. Add an API to the OPP library for the former case, so that AVS type devices can update the voltages for an OPP when the hardware determines the voltage should change. The assumption is that drivers like CPUfreq or devfreq will register for the OPP notifiers and adjust the voltage according to suggestions that AVS makes. This patch is derived from [1] submitted by Stephen. [1] https://lore.kernel.org/patchwork/patch/599279/ Signed-off-by: Stephen Boyd Signed-off-by: Roger Lu [s.nawrocki@samsung.com: added handling of OPP min/max voltage] Signed-off-by: Sylwester Nawrocki Signed-off-by: Viresh Kumar --- include/linux/pm_opp.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'include') diff --git a/include/linux/pm_opp.h b/include/linux/pm_opp.h index b8197ab014f2..747861816f4f 100644 --- a/include/linux/pm_opp.h +++ b/include/linux/pm_opp.h @@ -22,6 +22,7 @@ struct opp_table; enum dev_pm_opp_event { OPP_EVENT_ADD, OPP_EVENT_REMOVE, OPP_EVENT_ENABLE, OPP_EVENT_DISABLE, + OPP_EVENT_ADJUST_VOLTAGE, }; /** @@ -113,6 +114,10 @@ int dev_pm_opp_add(struct device *dev, unsigned long freq, void dev_pm_opp_remove(struct device *dev, unsigned long freq); void dev_pm_opp_remove_all_dynamic(struct device *dev); +int dev_pm_opp_adjust_voltage(struct device *dev, unsigned long freq, + unsigned long u_volt, unsigned long u_volt_min, + unsigned long u_volt_max); + int dev_pm_opp_enable(struct device *dev, unsigned long freq); int dev_pm_opp_disable(struct device *dev, unsigned long freq); @@ -242,6 +247,14 @@ static inline void dev_pm_opp_remove_all_dynamic(struct device *dev) { } +static inline int +dev_pm_opp_adjust_voltage(struct device *dev, unsigned long freq, + unsigned long u_volt, unsigned long u_volt_min, + unsigned long u_volt_max) +{ + return 0; +} + static inline int dev_pm_opp_enable(struct device *dev, unsigned long freq) { return 0; -- cgit v1.2.3 From a48108c0c20f02485b8cc3ca83652a55a0f5e47f Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Tue, 22 Oct 2019 16:51:37 +0200 Subject: reset: improve of_xlate documentation Mention of_reset_simple_xlate as the default if of_xlate is not set. Signed-off-by: Philipp Zabel --- include/linux/reset-controller.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/reset-controller.h b/include/linux/reset-controller.h index 9326d671b6e6..8d35753d419e 100644 --- a/include/linux/reset-controller.h +++ b/include/linux/reset-controller.h @@ -62,7 +62,8 @@ struct reset_control_lookup { * @of_node: corresponding device tree node as phandle target * @of_reset_n_cells: number of cells in reset line specifiers * @of_xlate: translation function to translate from specifier as found in the - * device tree to id as given to the reset control ops + * device tree to id as given to the reset control ops, defaults + * to :c:func:`of_reset_simple_xlate`. * @nr_resets: number of reset controls in this reset controller device */ struct reset_controller_dev { -- cgit v1.2.3 From c2ffa00ad6152ad54940f942fc316b9c83d5e6f9 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Tue, 22 Oct 2019 16:53:25 +0200 Subject: reset: document (devm_)reset_control_get_optional variants Add kerneldoc comments for the optional reset_control_get variants. Signed-off-by: Philipp Zabel --- include/linux/reset.h | 46 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) (limited to 'include') diff --git a/include/linux/reset.h b/include/linux/reset.h index e7793fc0fa93..bf7c7f188406 100644 --- a/include/linux/reset.h +++ b/include/linux/reset.h @@ -203,12 +203,34 @@ static inline struct reset_control *reset_control_get_shared( return __reset_control_get(dev, id, 0, true, false, false); } +/** + * reset_control_get_optional_exclusive - optional reset_control_get_exclusive() + * @dev: device to be reset by the controller + * @id: reset line name + * + * Optional variant of reset_control_get_exclusive(). If the requested reset + * is not specified in the device tree, this function returns NULL instead of + * an error. + * + * See reset_control_get_exclusive() for more information. + */ static inline struct reset_control *reset_control_get_optional_exclusive( struct device *dev, const char *id) { return __reset_control_get(dev, id, 0, false, true, true); } +/** + * reset_control_get_optional_shared - optional reset_control_get_shared() + * @dev: device to be reset by the controller + * @id: reset line name + * + * Optional variant of reset_control_get_shared(). If the requested reset + * is not specified in the device tree, this function returns NULL instead of + * an error. + * + * See reset_control_get_shared() for more information. + */ static inline struct reset_control *reset_control_get_optional_shared( struct device *dev, const char *id) { @@ -354,12 +376,36 @@ static inline struct reset_control *devm_reset_control_get_shared( return __devm_reset_control_get(dev, id, 0, true, false, false); } +/** + * devm_reset_control_get_optional_exclusive - resource managed + * reset_control_get_optional_exclusive() + * @dev: device to be reset by the controller + * @id: reset line name + * + * Managed reset_control_get_optional_exclusive(). For reset controllers + * returned from this function, reset_control_put() is called automatically on + * driver detach. + * + * See reset_control_get_optional_exclusive() for more information. + */ static inline struct reset_control *devm_reset_control_get_optional_exclusive( struct device *dev, const char *id) { return __devm_reset_control_get(dev, id, 0, false, true, true); } +/** + * devm_reset_control_get_optional_shared - resource managed + * reset_control_get_optional_shared() + * @dev: device to be reset by the controller + * @id: reset line name + * + * Managed reset_control_get_optional_shared(). For reset controllers returned + * from this function, reset_control_put() is called automatically on driver + * detach. + * + * See reset_control_get_optional_shared() for more information. + */ static inline struct reset_control *devm_reset_control_get_optional_shared( struct device *dev, const char *id) { -- cgit v1.2.3 From b4941adb24c0676f77ddc25e6d7836b8245c47fc Mon Sep 17 00:00:00 2001 From: Ran Wang Date: Thu, 24 Oct 2019 17:26:42 +0800 Subject: PM: wakeup: Add routine to help fetch wakeup source object. Some user might want to go through all registered wakeup sources and doing things accordingly. For example, SoC PM driver might need to do HW programming to prevent powering down specific IP which wakeup source depending on. So add this API to help walk through all registered wakeup source objects on that list and return them one by one. Signed-off-by: Ran Wang Tested-by: Leonard Crestez Reviewed-by: Rafael J. Wysocki Signed-off-by: Li Yang --- include/linux/pm_wakeup.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'include') diff --git a/include/linux/pm_wakeup.h b/include/linux/pm_wakeup.h index 661efa029c96..aa3da6611533 100644 --- a/include/linux/pm_wakeup.h +++ b/include/linux/pm_wakeup.h @@ -63,6 +63,11 @@ struct wakeup_source { bool autosleep_enabled:1; }; +#define for_each_wakeup_source(ws) \ + for ((ws) = wakeup_sources_walk_start(); \ + (ws); \ + (ws) = wakeup_sources_walk_next((ws))) + #ifdef CONFIG_PM_SLEEP /* @@ -92,6 +97,10 @@ extern void wakeup_source_remove(struct wakeup_source *ws); extern struct wakeup_source *wakeup_source_register(struct device *dev, const char *name); extern void wakeup_source_unregister(struct wakeup_source *ws); +extern int wakeup_sources_read_lock(void); +extern void wakeup_sources_read_unlock(int idx); +extern struct wakeup_source *wakeup_sources_walk_start(void); +extern struct wakeup_source *wakeup_sources_walk_next(struct wakeup_source *ws); extern int device_wakeup_enable(struct device *dev); extern int device_wakeup_disable(struct device *dev); extern void device_set_wakeup_capable(struct device *dev, bool capable); -- cgit v1.2.3 From b8104fda1fff0882e43b7e98832a76d7e98eb3e9 Mon Sep 17 00:00:00 2001 From: John Garry Date: Tue, 5 Nov 2019 01:22:16 +0800 Subject: logic_pio: Define PIO_INDIRECT_SIZE for !CONFIG_INDIRECT_PIO With the goal of expanding the test coverage of the HiSi LPC driver to !ARM64, define a dummy PIO_INDIRECT_SIZE for !CONFIG_INDIRECT_PIO, which is required by the named driver. Signed-off-by: John Garry Signed-off-by: Wei Xu --- include/linux/logic_pio.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/logic_pio.h b/include/linux/logic_pio.h index 88e1e6304a71..54945aa824b4 100644 --- a/include/linux/logic_pio.h +++ b/include/linux/logic_pio.h @@ -108,10 +108,10 @@ void logic_outsl(unsigned long addr, const void *buffer, unsigned int count); * area by redefining the macro below. */ #define PIO_INDIRECT_SIZE 0x4000 -#define MMIO_UPPER_LIMIT (IO_SPACE_LIMIT - PIO_INDIRECT_SIZE) #else -#define MMIO_UPPER_LIMIT IO_SPACE_LIMIT +#define PIO_INDIRECT_SIZE 0 #endif /* CONFIG_INDIRECT_PIO */ +#define MMIO_UPPER_LIMIT (IO_SPACE_LIMIT - PIO_INDIRECT_SIZE) struct logic_pio_hwaddr *find_io_range_by_fwnode(struct fwnode_handle *fwnode); unsigned long logic_pio_trans_hwaddr(struct fwnode_handle *fwnode, -- cgit v1.2.3 From dbbf98392af6e2cf3673908c1388ca1ae915c8bb Mon Sep 17 00:00:00 2001 From: Tudor Ambarus Date: Fri, 6 Sep 2019 15:06:41 +0000 Subject: memory: atmel-ebi: move NUM_CS definition inside EBI driver The total number of EBI CS lines is described by the EBI controller and not by the Matrix. Move the definition for the number of CS inside EBI driver. Signed-off-by: Tudor Ambarus Link: https://lore.kernel.org/r/20190906150632.19039-1-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni --- include/linux/mfd/syscon/atmel-matrix.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/linux/mfd/syscon/atmel-matrix.h b/include/linux/mfd/syscon/atmel-matrix.h index f61cd127a852..20c25665216a 100644 --- a/include/linux/mfd/syscon/atmel-matrix.h +++ b/include/linux/mfd/syscon/atmel-matrix.h @@ -106,7 +106,6 @@ #define AT91_MATRIX_DDR_IOSR BIT(18) #define AT91_MATRIX_NFD0_SELECT BIT(24) #define AT91_MATRIX_DDR_MP_EN BIT(25) -#define AT91_MATRIX_EBI_NUM_CS 8 #define AT91_MATRIX_USBPUCR_PUON BIT(30) -- cgit v1.2.3 From e34212c75a68990f7215d64d725c61e57ca70357 Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Mon, 12 Aug 2019 00:00:40 +0300 Subject: memory: tegra: Introduce Tegra30 EMC driver Introduce driver for the External Memory Controller (EMC) found on Tegra30 chips, it controls the external DRAM on the board. The purpose of this driver is to program memory timing for external memory on the EMC clock rate change. Acked-by: Peter De Schrijver Signed-off-by: Dmitry Osipenko Tested-by: Peter Geis Signed-off-by: Thierry Reding --- include/soc/tegra/mc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/soc/tegra/mc.h b/include/soc/tegra/mc.h index 16e2c2fb5f6c..1238e35653d1 100644 --- a/include/soc/tegra/mc.h +++ b/include/soc/tegra/mc.h @@ -181,7 +181,7 @@ struct tegra_mc { spinlock_t lock; }; -void tegra_mc_write_emem_configuration(struct tegra_mc *mc, unsigned long rate); +int tegra_mc_write_emem_configuration(struct tegra_mc *mc, unsigned long rate); unsigned int tegra_mc_get_emem_device_count(struct tegra_mc *mc); #endif /* __SOC_TEGRA_MC_H__ */ -- cgit v1.2.3