From ef390c0b6e3f4d2d2d43f53f4bd35e1884571a14 Mon Sep 17 00:00:00 2001 From: Misael Lopez Cruz Date: Thu, 29 Jan 2009 13:29:46 +0200 Subject: ASoC: OMAP: Initialize XCCR and RCCR registers in McBSP DAI driver This patch explicitly initializes McBSP Transmit Configuration Control Register (XCCR) and Receive Configuration Control Register (RCCR) to their reset values. Reset values are 26 ns of DX delay and Transmit DMA disabled for XCCR register; receive full cycle mode enabled and Receive DMA disabled for RCCR register. This patch requires a counterpart in OMAP McBSP driver before to apply it. The required changes in McBSP were sent and approved in linux-omap mailing list and patch is going upstream (commit 3127f8f8595a064b3f1a1837fea2177902589ac3 from linux-omap-2.6 tree). Signed-off-by: Misael Lopez Cruz [ jarkko.nikula@nokia.com: Commit id for counterpart patch corrected ] Signed-off-by: Jarkko Nikula Signed-off-by: Mark Brown --- sound/soc/omap/omap-mcbsp.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'sound/soc') diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c index ec5e18a78758..05dd5abcddf4 100644 --- a/sound/soc/omap/omap-mcbsp.c +++ b/sound/soc/omap/omap-mcbsp.c @@ -302,6 +302,10 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai, regs->spcr1 |= RINTM(3); regs->rcr2 |= RFIG; regs->xcr2 |= XFIG; + if (cpu_is_omap2430() || cpu_is_omap34xx()) { + regs->xccr = DXENDLY(1) | XDMAEN; + regs->rccr = RFULL_CYCLE | RDMAEN; + } switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { case SND_SOC_DAIFMT_I2S: -- cgit v1.2.3