Freescale Asynchronous Sample Rate Converter (ASRC) Controller

The Asynchronous Sample Rate Converter (ASRC) converts the sampling rate of a
signal associated with an input clock into a signal associated with a different
output clock. The driver currently works as a Front End of DPCM with other Back
Ends Audio controller such as ESAI, SSI and SAI. It has four context to support
four substreams within totally 32 channels.

Required properties:

  - compatible		: Contains "fsl,imx8mn-easrc".

  - reg			: Offset and length of the register set for the device.

  - interrupts		: Contains the asrc interrupt.

  - dmas		: Generic dma devicetree binding as described in
			  Documentation/devicetree/bindings/dma/dma.txt.

  - dma-names		: Contains "ctx0_rx", "ctx0_tx", "ctx1_rx", "ctx1_tx",
				   "ctx2_rx", "ctx2_tx", "ctx3_rx", "ctx3_tx".

  - clocks		: Contains an entry for each entry in clock-names.

  - clock-names		: Contains the following entries
	"mem"		  Peripheral clock to driver module.

  - fsl,easrc-ram-script-name : The coefficient table for the filters
  - fsl,asrc-rate	: Defines a mutual sample rate used by DPCM Back Ends.

  - fsl,asrc-width	: Defines a mutual sample width used by DPCM Back Ends.

Example:

easrc: easrc@300C0000 {
	compatible = "fsl,imx8mn-easrc";
	reg = <0x0 0x300C0000 0x0 0x10000>;
	interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
	clocks = <&clk IMX8MN_CLK_ASRC_ROOT>;
	clock-names = "mem";
	dmas = <&sdma2 16 23 0> , <&sdma2 17 23 0>,
	       <&sdma2 18 23 0> , <&sdma2 19 23 0>,
	       <&sdma2 20 23 0> , <&sdma2 21 23 0>,
	       <&sdma2 22 23 0> , <&sdma2 23 23 0>;
	dma-names = "ctx0_rx", "ctx0_tx",
		    "ctx1_rx", "ctx1_tx",
		    "ctx2_rx", "ctx2_tx",
		    "ctx3_rx", "ctx3_tx";
	fsl,easrc-ram-script-name = "imx/easrc/easrc-imx8mn.bin";
	fsl,asrc-rate  = <8000>;
	fsl,asrc-width = <16>;
	status = "disabled";
};