// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* * Copyright 2024 Toradex */ #include "imx8-apalis-eval.dtsi" / { reg_3v3_mmc: regulator-3v3-mmc { compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enable_3v3_mmc>; enable-active-high; gpio = <&lsio_gpio5 19 GPIO_ACTIVE_HIGH>; off-on-delay-us = <100000>; regulator-max-microvolt = <3300000>; regulator-min-microvolt = <3300000>; regulator-name = "3.3V_MMC"; startup-delay-us = <10000>; }; reg_3v3_sd: regulator-3v3-sd { compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enable_3v3_sd>; enable-active-high; gpio = <&lsio_gpio5 20 GPIO_ACTIVE_HIGH>; off-on-delay-us = <100000>; regulator-max-microvolt = <3300000>; regulator-min-microvolt = <3300000>; regulator-name = "3.3V_SD"; startup-delay-us = <10000>; }; reg_can1: regulator-can1 { compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enable_can1_power>; enable-active-high; gpio = <&lsio_gpio5 22 GPIO_ACTIVE_HIGH>; regulator-name = "5V_SW_CAN1"; startup-delay-us = <10000>; }; reg_can2: regulator-can2 { compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enable_can2_power>; enable-active-high; gpio = <&lsio_gpio5 21 GPIO_ACTIVE_HIGH>; regulator-name = "5V_SW_CAN2"; startup-delay-us = <10000>; }; sound-carrier { compatible = "simple-audio-card"; simple-audio-card,bitclock-master = <&codec_dai>; simple-audio-card,format = "i2s"; simple-audio-card,frame-master = <&codec_dai>; simple-audio-card,name = "apalis-nau8822"; simple-audio-card,routing = "Headphones", "LHP", "Headphones", "RHP", "Speaker", "LSPK", "Speaker", "RSPK", "Line Out", "AUXOUT1", "Line Out", "AUXOUT2", "LAUX", "Line In", "RAUX", "Line In", "LMICP", "Mic In", "RMICP", "Mic In"; simple-audio-card,widgets = "Headphones", "Headphones", "Line Out", "Line Out", "Speaker", "Speaker", "Microphone", "Mic In", "Line", "Line In"; codec_dai: simple-audio-card,codec { sound-dai = <&nau8822_1a>; system-clock-frequency = <12288000>; }; simple-audio-card,cpu { sound-dai = <&sai0>; }; }; }; /* Apalis CAN1 */ &flexcan1 { xceiver-supply = <®_can1>; status = "okay"; }; /* Apalis CAN2 */ &flexcan2 { xceiver-supply = <®_can2>; status = "okay"; }; /* Apalis I2C1 */ &i2c2 { status = "okay"; /* Audio Codec */ nau8822_1a: audio-codec@1a { compatible = "nuvoton,nau8822"; reg = <0x1a>; #sound-dai-cells = <0>; }; /* Power/Current Measurement Sensor */ hwmon@40 { compatible = "ti,ina219"; reg = <0x40>; shunt-resistor = <5000>; }; temperature-sensor@4f { compatible = "ti,tmp75c"; reg = <0x4f>; }; eeprom@57 { compatible = "st,24c02", "atmel,24c02"; reg = <0x57>; }; }; &sai0 { assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>, <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>, <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>, <&sai0_lpcg 0>; assigned-clock-rates = <786432000>, <49152000>, <12288000>, <49152000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sai0>; #sound-dai-cells = <0>; status = "okay"; }; /* Apalis MMC1 */ &usdhc2 { pinctrl-0 = <&pinctrl_usdhc2_4bit>, <&pinctrl_mmc1_cd>; pinctrl-1 = <&pinctrl_usdhc2_4bit_100mhz>, <&pinctrl_mmc1_cd>; pinctrl-2 = <&pinctrl_usdhc2_4bit_200mhz>, <&pinctrl_mmc1_cd>; pinctrl-3 = <&pinctrl_usdhc2_4bit_sleep>, <&pinctrl_mmc1_cd_sleep>; bus-width = <4>; vmmc-supply = <®_3v3_mmc>; status = "okay"; }; /* Apalis SD1 */ &usdhc3 { vmmc-supply = <®_3v3_sd>; status = "okay"; }; &iomuxc { pinctrl-0 = <&pinctrl_cam1_gpios>, <&pinctrl_esai0_gpios>, <&pinctrl_fec2_gpios>, <&pinctrl_gpio3>, <&pinctrl_gpio4>, <&pinctrl_gpio_keys>, <&pinctrl_gpio_usbh_oc_n>, <&pinctrl_lpuart1ctrl>, <&pinctrl_lvds0_i2c0_gpio>, <&pinctrl_lvds1_i2c0_gpios>, <&pinctrl_mipi_dsi_0_1_en>, <&pinctrl_mipi_dsi1_gpios>, <&pinctrl_mlb_gpios>, <&pinctrl_qspi1a_gpios>, <&pinctrl_sata1_act>, <&pinctrl_sim0_gpios>, <&pinctrl_usdhc1_gpios>; apalis-imx8qm { pinctrl_enable_3v3_mmc: enable3v3mmcgrp { fsl,pins = ; /* MXM3_148 */ }; pinctrl_enable_3v3_sd: enable3v3sdgrp { fsl,pins = ; /* MXM3_152 */ }; pinctrl_enable_can1_power: enablecan1powergrp { fsl,pins = ; /* MXM3_158 */ }; pinctrl_enable_can2_power: enablecan2powergrp { fsl,pins = ; /* MXM3_156 */ }; pinctrl_sai0: sai0grp { fsl,pins = < IMX8QM_SPI0_CS1_AUD_SAI0_TXC 0xc600004c /* MXM3_200 */ IMX8QM_SAI1_RXFS_AUD_SAI0_RXD 0xc600004c /* MXM3_202 */ IMX8QM_SPI2_CS1_AUD_SAI0_TXFS 0xc600004c /* MXM3_204 */ IMX8QM_SAI1_RXC_AUD_SAI0_TXD 0xc600006c /* MXM3_196 */ >; }; }; };