// SPDX-License-Identifier: (GPL-2.0 OR MIT) /* * Copyright 2019 NXP */ /dts-v1/; #include "imx8mm-evk.dts" / { reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; m4_reserved: m4@0x80000000 { no-map; reg = <0 0x80000000 0 0x1000000>; }; vdev0vring0: vdev0vring0@b8000000 { compatible = "shared-dma-pool"; reg = <0 0xb8000000 0 0x8000>; no-map; }; vdev0vring1: vdev0vring1@b8008000 { compatible = "shared-dma-pool"; reg = <0 0xb8008000 0 0x8000>; no-map; }; rsc-table { reg = <0 0xb80ff000 0 0x1000>; no-map; }; vdevbuffer: vdevbuffer@b8400000 { compatible = "shared-dma-pool"; reg = <0 0xb8400000 0 0x100000>; no-map; }; }; bt_sco_codec: bt_sco_codec { status = "disabled"; }; sound-bt-sco { status = "disabled"; }; sound-wm8524 { status = "disabled"; }; wm8524: audio-codec { status = "disabled"; }; rpmsg_i2s: rpmsg-i2s { compatible = "fsl,imx8mq-rpmsg-i2s"; /* the audio device index in m4 domain */ fsl,audioindex = <0> ; fsl,dma-buffer-size = <0x6000000>; fsl,enable-lpa; status = "okay"; }; sound-rpmsg { compatible = "fsl,imx-audio-rpmsg"; model = "ak4497-audio"; cpu-dai = <&rpmsg_i2s>; rpmsg-out; }; imx8mm-cm4 { compatible = "fsl,imx8mm-cm4"; rsc-da = <0xb8000000>; clocks = <&clk IMX8MM_CLK_M4_DIV>; mbox-names = "tx", "rx", "rxdb"; mboxes = <&mu 0 1 &mu 1 1 &mu 3 1>; memory-region = <&vdev0vring0>, <&vdev0vring1>, <&vdevbuffer>; syscon = <&src>; }; }; &clk { init-on-array = ; }; /* * ATTENTION: M4 may use IPs like below * ECSPI0/ECSPI2, GPIO1/GPIO5, GPT1, I2C3, I2S3, WDOG1, UART4, PWM3, SDMA1 */ &i2c3 { status = "disabled"; }; &rpmsg{ /* * 64K for one rpmsg instance: * --0xb8000000~0xb800ffff: pingpong */ vdev-nums = <1>; reg = <0x0 0xb8000000 0x0 0x10000>; memory-region = <&vdevbuffer>; status = "disabled"; }; &sdma1{ status = "disabled"; }; &uart4 { status = "disabled"; }; &sdma3 { status = "disabled"; }; &sai3 { status = "disabled"; }; &sai1 { status = "disabled"; }; &sai2 { status = "disabled"; }; &flexspi { status = "disabled"; };