summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/spi/spi-rockchip.txt
blob: 0c491bda4c65f9bace70c051fc06389261d82cad (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
* Rockchip SPI Controller

The Rockchip SPI controller is used to interface with various devices such as flash
and display controllers using the SPI communication interface.

Required Properties:

- compatible: should be one of the following.
    "rockchip,rk3066-spi" for rk3066.
    "rockchip,rk3188-spi", "rockchip,rk3066-spi" for rk3188.
    "rockchip,rk3288-spi", "rockchip,rk3066-spi" for rk3288.
- reg: physical base address of the controller and length of memory mapped
       region.
- interrupts: The interrupt number to the cpu. The interrupt specifier format
              depends on the interrupt controller.
- clocks: Must contain an entry for each entry in clock-names.
- clock-names: Shall be "spiclk" for the transfer-clock, and "apb_pclk" for
			   the peripheral clock.
- #address-cells: should be 1.
- #size-cells: should be 0.

Optional Properties:

- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
		Documentation/devicetree/bindings/dma/dma.txt
- dma-names: DMA request names should include "tx" and "rx" if present.
- rx-sample-delay-ns: nanoseconds to delay after the SCLK edge before sampling
		Rx data (may need to be fine tuned for high capacitance lines).
		No delay (0) by default.


Example:

	spi0: spi@ff110000 {
		compatible = "rockchip,rk3066-spi";
		reg = <0xff110000 0x1000>;
		dmas = <&pdma1 11>, <&pdma1 12>;
		dma-names = "tx", "rx";
		rx-sample-delay-ns = <10>;
		#address-cells = <1>;
		#size-cells = <0>;
		interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
		clock-names = "spiclk", "apb_pclk";
	};