summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/video/exynos5433-decon.txt
blob: 377afbf5122a7ee6b5f27e46ffcc882de67d05f5 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
Device-Tree bindings for Samsung Exynos SoC display controller (DECON)

DECON (Display and Enhancement Controller) is the Display Controller for the
Exynos series of SoCs which transfers the image data from a video memory
buffer to an external LCD interface.

Required properties:
- compatible: value should be "samsung,exynos5433-decon";
- reg: physical base address and length of the DECON registers set.
- interrupts: should contain a list of all DECON IP block interrupts in the
	      order: VSYNC, LCD_SYSTEM. The interrupt specifier format
	      depends on the interrupt controller used.
- interrupt-names: should contain the interrupt names: "vsync", "lcd_sys"
		   in the same order as they were listed in the interrupts
		   property.
- clocks: must include clock specifiers corresponding to entries in the
	  clock-names property.
- clock-names: list of clock names sorted in the same order as the clocks
	       property. Must contain "aclk_decon", "aclk_smmu_decon0x",
	       "aclk_xiu_decon0x", "pclk_smmu_decon0x", clk_decon_vclk",
	       "sclk_decon_eclk"
- ports: contains a port which is connected to mic node. address-cells and
	 size-cells must 1 and 0, respectively.
- port: contains an endpoint node which is connected to the endpoint in the mic
	node. The reg value muset be 0.
- i80-if-timings: specify whether the panel which is connected to decon uses
		  i80 lcd interface or mipi video interface. This node contains
		  no timing information as that of fimd does. Because there is
		  no register in decon to specify i80 interface timing value,
		  it is not needed, but make it remain to use same kind of node
		  in fimd and exynos7 decon.

Example:
SoC specific DT entry:
decon: decon@13800000 {
	compatible = "samsung,exynos5433-decon";
	reg = <0x13800000 0x2104>;
	clocks = <&cmu_disp CLK_ACLK_DECON>, <&cmu_disp CLK_ACLK_SMMU_DECON0X>,
		<&cmu_disp CLK_ACLK_XIU_DECON0X>,
		<&cmu_disp CLK_PCLK_SMMU_DECON0X>,
		<&cmu_disp CLK_SCLK_DECON_VCLK>,
		<&cmu_disp CLK_SCLK_DECON_ECLK>;
	clock-names = "aclk_decon", "aclk_smmu_decon0x", "aclk_xiu_decon0x",
		"pclk_smmu_decon0x", "sclk_decon_vclk", "sclk_decon_eclk";
	interrupt-names = "vsync", "lcd_sys";
	interrupts = <0 202 0>, <0 203 0>;

	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		port@0 {
			reg = <0>;
			decon_to_mic: endpoint {
				remote-endpoint = <&mic_to_decon>;
			};
		};
	};
};

Board specific DT entry:
&decon {
	i80-if-timings {
	};
};