path: root/arch/arm/boot/dts/imx6qdl-colibri.dtsi

/*
 * Copyright 2014-2015 Toradex AG
 * Copyright 2012 Freescale Semiconductor, Inc.
 * Copyright 2011 Linaro Ltd.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

/ {
	model = "Toradex Colibri iMX6DL/S  Module";
	compatible = "toradex,colibri_imx6dl", "fsl,imx6dl";

	aliases {
		mxcfb0 = &mxcfb1;
		mxcfb1 = &mxcfb2;
	};

	backlight: backlight {
		compatible = "pwm-backlight";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_bl_on>;
		enable-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>;
		status = "disabled";
	};

	clocks {
		clk24m: clk24m {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <24000000>;
		};
	};

/*
 * DDC_I2C: I2C2_SDA/SCL on X2 16/15
 */
	i2cddc: i2c@0 {
		compatible = "i2c-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c_ddc>;
		gpios = <&gpio4 13 0 /* sda */
			 &gpio4 12 0 /* scl */
			>;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "okay";
	};

	lcd: lcd@0 {
		compatible = "fsl,lcd";
		ipu_id = <0>;
		disp_id = <0>;
		default_ifmt = "RGB666";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_ipu1_lcd>;
		status = "disabled";
	};

	memory {
		/* This node is rewritten by U-Boot with the actual memory size */
		reg = <0x10000000 0x10000000>;
	};

	mxcfb1: fb@0 {
		compatible = "fsl,mxc_sdc_fb";
		disp_dev = "lcd";
		interface_pix_fmt = "RGB666";
		mode_str ="640x480M@60";
		default_bpp = <16>;
		int_clk = <0>;
		late_init = <0>;
		status = "disabled";
	};

	mxcfb2: fb@1 {
		compatible = "fsl,mxc_sdc_fb";
		disp_dev = "hdmi";
		interface_pix_fmt = "RGB24";
		mode_str ="640x480M@60";
		default_bpp = <16>;
		int_clk = <0>;
		late_init = <0>;
		status = "disabled";
	};

	regulators {
		compatible = "simple-bus";

		reg_1p8v: 1p8v {
			compatible = "regulator-fixed";
			regulator-name = "1P8V";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-always-on;
		};

		reg_2p5v: 2p5v {
			compatible = "regulator-fixed";
			regulator-name = "2P5V";
			regulator-min-microvolt = <2500000>;
			regulator-max-microvolt = <2500000>;
			regulator-always-on;
		};

		reg_3p3v: 3p3v {
			compatible = "regulator-fixed";
			regulator-name = "3P3V";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};

		reg_usb_host_vbus: usb_host_vbus {
			compatible = "regulator-fixed";
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_regulator_usbh_pwr>;
			regulator-name = "usb_host_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio =  <&gpio3 31 0>;
			status = "disabled";
		};
	};

	sound {
		compatible = "fsl,imx6-colibri-sgtl5000",
			     "fsl,imx-audio-sgtl5000";
		model = "imx6-colibri-sgtl5000";
		cpu-dai = <&ssi1>;
		audio-codec = <&codec>;
		audio-routing =
			"LINE_IN", "Line In Jack",
			"MIC_IN", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"Headphone Jack", "HP_OUT";
		mux-int-port = <1>;
		mux-ext-port = <5>;
	};

	sound_hdmi: sound-hdmi {
		compatible = "fsl,imx6q-audio-hdmi",
			     "fsl,imx-audio-hdmi";
		model = "imx-audio-hdmi";
		hdmi-controller = <&hdmi_audio>;
		status = "disabled";
	};

	sound_spdif: sound-spdif {
		compatible = "fsl,imx-audio-spdif";
		model = "imx-spdif";
		spdif-controller = <&spdif>;
		spdif-out;
		/* spdif-in; */
		status = "disabled";
	};

	v4l2_out {
		compatible = "fsl,mxc_v4l2_output";
		status = "okay";
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux &pinctrl_audmux_mclk &pinctrl_mic_gnd>;
	status = "okay";
};

/* Colibri SPI */
&ecspi4 {
	fsl,spi-num-chipselects = <1>;
	cs-gpios = <&gpio5 2 0>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi4 &pinctrl_spi_cs1>;
	status = "disabled";
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rmii";
	status = "okay";
};

/* Colibri SDDIMM 55/63 */
&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan1>;
	status = "disabled";
};

/* Colibri SODOMM 178/188 */
&can2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan2>;
	status = "disabled";
};

&hdmi_audio {
	status = "okay";
};

&hdmi_core {
	ipu_id = <0>;
	disp_id = <1>;
	status = "disabled";
};

&hdmi_video {
	fsl,phy_reg_vlev = <0x0294>;
	fsl,phy_reg_cksymtx = <0x800d>;
	status = "disabled";
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	pmic: pfuze100@08 {
		compatible = "fsl,pfuze100";
		reg = <0x08>;

		regulators {
			sw1a_reg: sw1ab {
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw1c_reg: sw1c {
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw3a_reg: sw3a {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-boot-on;
				regulator-always-on;
			};

			swbst_reg: swbst {
				regulator-min-microvolt = <5000000>;
				regulator-max-microvolt = <5150000>;
				regulator-boot-on;
				regulator-always-on;
			};

			snvs_reg: vsnvs {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <3000000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vref_reg: vrefddr {
				regulator-boot-on;
				regulator-always-on;
			};

			vgen2_reg: vgen2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vgen4_reg: vgen4 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vgen5_reg: vgen5 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vgen6_reg: vgen6 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};
		};
	};

	codec: sgtl5000@0a {
		compatible = "fsl,sgtl5000";
		reg = <0x0a>;
		clocks = <&clks 201>;
		VDDA-supply = <&reg_2p5v>;
		VDDIO-supply = <&reg_3p3v>;
	};

	/* STMPE811 touch screen controller */
	stmpe811@41 {
		compatible = "st,stmpe811";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_touch_int_1>;
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x41>;
		interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
		interrupt-parent = <&gpio6>;
		interrupt-controller;
		id = <0>;
		blocks = <0x5>;
		irq-trigger = <0x1>;
		stmpe_touchscreen {
			compatible = "st,stmpe-ts";
			reg = <0>;
			/* 3.25 MHz ADC clock speed */
			st,adc-freq = <1>;
			/* 8 sample average control */
			st,ave-ctrl = <3>;
			/* 7 length fractional part in z */
			st,fraction-z = <7>;
			/*
			 * 50 mA typical 80 mA max touchscreen drivers
			 * current limit value
			 */
			st,i-drive = <1>;
			/* 12-bit ADC */
			st,mod-12b = <1>;
			/* internal ADC reference */
			st,ref-sel = <0>;
			/* ADC converstion time: 80 clocks */
			st,sample-time = <4>;
			/* 1 ms panel driver settling time */
			st,settling = <3>;
			/* 5 ms touch detect interrupt delay */
			st,touch-det-delay = <5>;
		};
		stmpe_adc {
			compatible = "st,stmpe-adc";
			/* 3.25 MHz ADC clock speed */
			st,adc-freq = <1>;
			/* 12-bit ADC */
			st,mod-12b = <1>;
			/* internal ADC reference */
			st,ref-sel = <0>;
			/* ADC converstion time: 80 clocks */
			st,sample-time = <4>;
		};
	};
};

/*
 * I2C: I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier
 * board)
 */
&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default", "recovery";
	pinctrl-0 = <&pinctrl_i2c3>;
	pinctrl-1 = <&pinctrl_i2c3_recovery>;
	gpios = <&gpio1 6 0 /* sda */
	         &gpio1 3 0 /* scl */
	        >;
	status = "disabled";
};

/* PAD Ctrl Values for Common Settings */
#define PAD_CTRL_HYS_PU 0x1b0b0 /*(PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | PAD_CTL_PKE | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm)*/
#define PAD_CTRL_HYS_PD 0x130b0 /*(PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PKE | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm)*/
#define PAD_CTRL_PU_22k 0x0f058 /*(PAD_CTL_PUS_22K_UP | PAD_CTL_PUE | PAD_CTL_PKE | PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm)*/
#define PAD_CTRL_IN 0x0040 /*( PAD_CTL_SPEED_LOW )*/
#define PAD_CTRL_NO 0x80000000

&iomuxc {
	csi {
		/* CSI pins used as GPIO */
		pinctrl_csi_gpio_1: csi_gpio-1 {
			fsl,pins = <
				MX6QDL_PAD_EIM_A24__GPIO5_IO04   PAD_CTRL_HYS_PU
				MX6QDL_PAD_SD2_CMD__GPIO1_IO11   PAD_CTRL_HYS_PU
				MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 PAD_CTRL_HYS_PU
				MX6QDL_PAD_EIM_D18__GPIO3_IO18   PAD_CTRL_HYS_PU
				MX6QDL_PAD_EIM_A19__GPIO2_IO19   PAD_CTRL_HYS_PU
				MX6QDL_PAD_EIM_D29__GPIO3_IO29   PAD_CTRL_HYS_PD
				MX6QDL_PAD_EIM_A23__GPIO6_IO06   PAD_CTRL_HYS_PU
				MX6QDL_PAD_EIM_A20__GPIO2_IO18   PAD_CTRL_HYS_PU
				MX6QDL_PAD_EIM_A17__GPIO2_IO21   PAD_CTRL_HYS_PU
				MX6QDL_PAD_EIM_A18__GPIO2_IO20   PAD_CTRL_HYS_PU
				MX6QDL_PAD_EIM_EB3__GPIO2_IO31   PAD_CTRL_HYS_PU
				MX6QDL_PAD_EIM_D17__GPIO3_IO17   PAD_CTRL_HYS_PU
				MX6QDL_PAD_SD2_DAT0__GPIO1_IO15  PAD_CTRL_HYS_PU
			>;
		};
	};

	ecspi4 {
		pinctrl_ecspi4: ecspi4grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1
				MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1
				MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1
			>;
		};
	};

	enet {

		pinctrl_enet: enetgrp { /* RMII */
			fsl,pins = <
				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
				MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0	0x1b0b0
				MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1	0x1b0b0
				MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER	0x1b0b0
				MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN	0x1b0b0
				MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0	0x1b0b0
				MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1	0x1b0b0
				MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN	0x1b0b0
				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	((1<<30) | 0x1b0b0)
			>;
		};
	};

	flexcan1 {

		pinctrl_flexcan1: flexcan1grp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_7__FLEXCAN1_TX   0x80000000
				MX6QDL_PAD_GPIO_8__FLEXCAN1_RX   0x80000000
			>;
		};
		pinctrl_flexcan2: flexcan2grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x80000000
				MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x80000000
			>;
		};
	};

	gpio {
		pinctrl_gpio_1: gpio-1 {
			fsl,pins = <
				MX6QDL_PAD_EIM_D27__GPIO3_IO27      PAD_CTRL_HYS_PU
				MX6QDL_PAD_NANDF_D6__GPIO2_IO06     PAD_CTRL_HYS_PU
				MX6QDL_PAD_NANDF_D3__GPIO2_IO03     PAD_CTRL_HYS_PU
				MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 PAD_CTRL_HYS_PU
				MX6QDL_PAD_DI0_PIN4__GPIO4_IO20     PAD_CTRL_HYS_PU
				MX6QDL_PAD_SD4_DAT3__GPIO2_IO11     PAD_CTRL_HYS_PU
				MX6QDL_PAD_NANDF_D4__GPIO2_IO04     PAD_CTRL_HYS_PU
				MX6QDL_PAD_SD4_DAT0__GPIO2_IO08     PAD_CTRL_HYS_PU
			>;
		};
		pinctrl_gpio_2: gpio-2 {
			fsl,pins = <
				MX6QDL_PAD_GPIO_7__GPIO1_IO07       PAD_CTRL_HYS_PU
				MX6QDL_PAD_GPIO_8__GPIO1_IO08       PAD_CTRL_HYS_PU
			>;
		};
	};

	i2c {
		pinctrl_i2c_ddc: i2c_ddc {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL3__GPIO4_IO12		PAD_CTRL_HYS_PU	/* DDC bitbang */
				MX6QDL_PAD_KEY_ROW3__GPIO4_IO13		PAD_CTRL_HYS_PU	/* DDC bitbang */
			>;
		};
		pinctrl_i2c3: i2c3grp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
				MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
			>;
		};
		pinctrl_i2c3_recovery: i2c3-recoverygrp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x4001b8b1
				MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x4001b8b1
			>;
		};
	};
	/* pins used on module */
	imx6dl-colibri {
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_emmc_reset>;
		pinctrl_audmux: audmuxgrp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL0__AUD5_TXC  0x130b0
				MX6QDL_PAD_KEY_ROW0__AUD5_TXD  0x130b0
				MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0
				MX6QDL_PAD_KEY_ROW1__AUD5_RXD  0x130b0
			>;
		};
		pinctrl_audmux_mclk: audmux_mclk {
			fsl,pins = <
				MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x000b0		/* SGTL5000 sys_mclk */
			>;
		};
		pinctrl_emmc_reset: emmc_reset {
			fsl,pins = <
				MX6QDL_PAD_SD3_RST__GPIO7_IO08		PAD_CTRL_PU_22k	/* eMMC reset, leave it alone */
			>;
		};
		pinctrl_gpio_keys: gpio_keys {
			fsl,pins = <
				MX6QDL_PAD_EIM_A16__GPIO2_IO22		PAD_CTRL_HYS_PD	/* Power Button */
			>;
		};
		pinctrl_i2c2: i2c2grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
				MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1
			>;
		};
		pinctrl_mic_gnd: gpio_mic_gnd {
			fsl,pins = <
				MX6QDL_PAD_RGMII_TD1__GPIO6_IO21	PAD_CTRL_HYS_PU	/* Controlls Mic GND, PU or '1' pull Mic GND to GND */
			>;
		};
		pinctrl_pwm_a_cif_d7: pwm_d_cif_d7 {
			fsl,pins = <
				MX6QDL_PAD_EIM_A22__GPIO2_IO16		PAD_CTRL_IN	/* disable, muxed with PWM<A> */
			>;
		};
		pinctrl_pwm_d_cif_d6: pwm_d_cif_d6 {
			fsl,pins = <
				MX6QDL_PAD_EIM_A21__GPIO2_IO17		PAD_CTRL_IN	/* disable, muxed with PWM<D> */
			>;
		};
		pinctrl_regulator_usbh_pwr: gpio_regulator_usbh_pwr {
			fsl,pins = <
				MX6QDL_PAD_EIM_D31__GPIO3_IO31		PAD_CTRL_PU_22k	/* USBH_EN */
			>;
		};
#if 0 //TODO
		pinctrl_regulator_usbotg_pwr: gpio_regulator_usbotg_pwr {
			fsl,pins = <
				MX6QDL_PAD_EIM_D22__GPIO3_IO22		PAD_CTRL_PU_22k	/* USBO power en */
			>;
		};
#endif
		pinctrl_spi_cs1: spi_cs1 {
			fsl,pins = <
				MX6QDL_PAD_EIM_A25__GPIO5_IO02		PAD_CTRL_NO	/* SPI cs */
			>;
		};
		pinctrl_touch_int_1: touch_int-1 {
			fsl,pins = <
				MX6QDL_PAD_RGMII_TD0__GPIO6_IO20	PAD_CTRL_HYS_PU /* STMPE811 interrupt */
			>;
		};
		pinctrl_usbh_oc_1: usbh_oc-1 {
			fsl,pins = <
				/* USBH_OC */
				MX6QDL_PAD_EIM_D30__GPIO3_IO30		PAD_CTRL_HYS_PU
			>;
		};
		pinctrl_usbc_id_1: usbc_id-1 {
			fsl,pins = <
				/* USBC_ID */
				MX6QDL_PAD_NANDF_D2__GPIO2_IO02		PAD_CTRL_HYS_PU
			>;
		};
		pinctrl_usbc_det_1: usbc_det-1 {
			fsl,pins = <
				/* USBC_DET */
				MX6QDL_PAD_GPIO_17__GPIO7_IO12		PAD_CTRL_HYS_PU
				/* USBC_DET_EN */
				MX6QDL_PAD_RGMII_TX_CTL__GPIO6_IO26	PAD_CTRL_PU_22k
				/* USBC_DET_OVERWRITE */
				MX6QDL_PAD_RGMII_RXC__GPIO6_IO30	PAD_CTRL_PU_22k
			>;
		};
		pinctrl_usdhc3: usdhc3grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD    0x17059
				MX6QDL_PAD_SD3_CLK__SD3_CLK    0x10059
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
				MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
				MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
				MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
				MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
			>;
		};
		pinctrl_usdhc3_100mhz: usdhc3grp-100mhz { /* 100Mhz */
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B9
				MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B9
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B9
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B9
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B9
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B9
				MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170B9
				MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170B9
				MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170B9
				MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170B9
			>;
		};
		pinctrl_usdhc3_200mhz: usdhc3grp-200mhz { /* 200Mhz */
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
				MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
				MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170F9
				MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170F9
				MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170F9
				MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170F9
			>;
		};
	};

	ipu1 {

		pinctrl_ipu1_lcd: ipu1grp-lcd {
			fsl,pins = <
				MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0xa1
				MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0xa1
				MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0xa1
				MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0xa1
				MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0xa1
				MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0xa1
				MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0xa1
				MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0xa1
				MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0xa1
				MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0xa1
				MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0xa1
				MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0xa1
				MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0xa1
				MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0xa1
				MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0xa1
				MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0xa1
				MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0xa1
				MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0xa1
				MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0xa1
				MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0xa1
				MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0xa1
				MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0xa1
			>;
		};
		pinctrl_ipu1_csi0: ipu1grp-csi0 { /* parallel camera */
			fsl,pins = <
				MX6QDL_PAD_EIM_A17__IPU1_CSI1_DATA12    0xb0b1
				MX6QDL_PAD_EIM_A18__IPU1_CSI1_DATA13    0xb0b1
				MX6QDL_PAD_EIM_A19__IPU1_CSI1_DATA14    0xb0b1
				MX6QDL_PAD_EIM_A20__IPU1_CSI1_DATA15    0xb0b1
				MX6QDL_PAD_EIM_A21__IPU1_CSI1_DATA16    0xb0b1
				MX6QDL_PAD_EIM_A22__IPU1_CSI1_DATA17    0xb0b1
				MX6QDL_PAD_EIM_A23__IPU1_CSI1_DATA18    0xb0b1
				MX6QDL_PAD_EIM_A24__IPU1_CSI1_DATA19    0xb0b1
				MX6QDL_PAD_EIM_D17__IPU1_CSI1_PIXCLK    0xb0b1
				MX6QDL_PAD_EIM_EB3__IPU1_CSI1_HSYNC     0xb0b1
				MX6QDL_PAD_EIM_D29__IPU1_CSI1_VSYNC     0xb0b1

				MX6QDL_PAD_SD4_DAT1__GPIO2_IO09         0x40		/* disabled PWM pins on camera IF */
				MX6QDL_PAD_GPIO_1__GPIO1_IO01		0x40
			>;
		};
		pinctrl_cam_mclk: camgrp_mclk { /* parallel camera */
			fsl,pins = <
				MX6QDL_PAD_NANDF_CS2__CCM_CLKO2         0x00b0		/* CAM sys_mclk */
			>;
		};
		pinctrl_gpio_bl_on: gpio-bl-on {
			fsl,pins = <
				MX6QDL_PAD_EIM_D26__GPIO3_IO26		PAD_CTRL_HYS_PD
			>;
		};

	};

	pwm {
		pinctrl_pwm1: pwm1grp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
			>;
		};
		pinctrl_pwm2: pwm2grp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1
			>;
		};
		pinctrl_pwm3: pwm3grp {
			fsl,pins = <
				MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
			>;
		};
		pinctrl_pwm4: pwm4grp {
			fsl,pins = <
				MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
			>;
		};
	};

	spdif {

		pinctrl_spdif_t1: spdifgrp-t1 {
			fsl,pins = <
				MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0
			>;
		};
	};

	uart1 {
		pinctrl_uart1_dte: uart1-dtegrp { /* DTE mode */
			fsl,pins = <
				MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA 0x1b0b1
				MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA 0x1b0b1
				MX6QDL_PAD_EIM_D19__UART1_RTS_B 0x1b0b1
				MX6QDL_PAD_EIM_D20__UART1_CTS_B 0x1b0b1
			>;
		};
		pinctrl_uart1_ctrl: uart1-ctrlgrp { /* Additional DTR, DSR, DCD */
			fsl,pins = <
				MX6QDL_PAD_EIM_D23__UART1_DCD_B 0x1b0b0
				MX6QDL_PAD_EIM_D24__UART1_DTR_B 0x1b0b0
				MX6QDL_PAD_EIM_D25__UART1_DSR_B 0x1b0b0
			>;
		};
	};

	uart2 {
		pinctrl_uart2_dte: uart2grp-dte { /* DTE mode */			fsl,pins = <
				MX6QDL_PAD_SD4_DAT4__UART2_TX_DATA   0x1b0b1
				MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA   0x1b0b1
				MX6QDL_PAD_SD4_DAT6__UART2_RTS_B 0x1b0b1
				MX6QDL_PAD_SD4_DAT5__UART2_CTS_B 0x1b0b1
			>;
		};
	};

	uart3 {
		pinctrl_uart3_dte: uart3grp-dte { /* DTE mode */
			fsl,pins = <
				MX6QDL_PAD_SD4_CLK__UART3_TX_DATA 0x1b0b1
				MX6QDL_PAD_SD4_CMD__UART3_RX_DATA 0x1b0b1
			>;
		};
	};

	usdhc {
		pinctrl_mmc_cd: gpio_mmc_cd {
			fsl,pins = <
				MX6QDL_PAD_NANDF_D5__GPIO2_IO05		PAD_CTRL_NO	/* MMC1 CD */
			>;
		};
		pinctrl_usdhc1: usdhc1grp {
			fsl,pins = <
				MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17071
				MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10071
				MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
				MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
				MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
				MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
			>;
		};
	};

	weim {
		pinctrl_weim_cs0: weim_cs0grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_CS0__EIM_CS0_B   0xb0b1 /* nEXT_CS0 */
			>;
		};
		pinctrl_weim_cs1: weim_cs1grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_CS1__EIM_CS1_B   0xb0b1 /* nEXT_CS1 */
			>;
		};
		pinctrl_weim_cs2: weim_cs2grp {
			fsl,pins = <
				MX6QDL_PAD_SD2_DAT1__EIM_CS2_B  0xb0b1 /* nEXT_CS2 */
			>;
		};
		pinctrl_weim_sram_1: weim_sramgrp-1 {
			fsl,pins = <
				MX6QDL_PAD_EIM_OE__EIM_OE_B     0xb0b1
				MX6QDL_PAD_EIM_RW__EIM_RW       0xb0b1
				/* data */
				MX6QDL_PAD_CSI0_DATA_EN__EIM_DATA00 0x1b0b0
				MX6QDL_PAD_CSI0_VSYNC__EIM_DATA01 0x1b0b0
				MX6QDL_PAD_CSI0_DAT4__EIM_DATA02 0x1b0b0
				MX6QDL_PAD_CSI0_DAT5__EIM_DATA03 0x1b0b0
				MX6QDL_PAD_CSI0_DAT6__EIM_DATA04 0x1b0b0
				MX6QDL_PAD_CSI0_DAT7__EIM_DATA05 0x1b0b0
				MX6QDL_PAD_CSI0_DAT8__EIM_DATA06 0x1b0b0
				MX6QDL_PAD_CSI0_DAT9__EIM_DATA07 0x1b0b0
				MX6QDL_PAD_CSI0_DAT12__EIM_DATA08 0x1b0b0
				MX6QDL_PAD_CSI0_DAT13__EIM_DATA09 0x1b0b0
				MX6QDL_PAD_CSI0_DAT14__EIM_DATA10 0x1b0b0
				MX6QDL_PAD_CSI0_DAT15__EIM_DATA11 0x1b0b0
				MX6QDL_PAD_CSI0_DAT16__EIM_DATA12 0x1b0b0
				MX6QDL_PAD_CSI0_DAT17__EIM_DATA13 0x1b0b0
				MX6QDL_PAD_CSI0_DAT18__EIM_DATA14 0x1b0b0
				MX6QDL_PAD_CSI0_DAT19__EIM_DATA15 0x1b0b0
				/* address */
				MX6QDL_PAD_EIM_DA15__EIM_AD15  0xb0b1
				MX6QDL_PAD_EIM_DA14__EIM_AD14  0xb0b1
				MX6QDL_PAD_EIM_DA13__EIM_AD13  0xb0b1
				MX6QDL_PAD_EIM_DA12__EIM_AD12  0xb0b1
				MX6QDL_PAD_EIM_DA11__EIM_AD11  0xb0b1
				MX6QDL_PAD_EIM_DA10__EIM_AD10  0xb0b1
				MX6QDL_PAD_EIM_DA9__EIM_AD09   0xb0b1
				MX6QDL_PAD_EIM_DA8__EIM_AD08   0xb0b1
				MX6QDL_PAD_EIM_DA7__EIM_AD07   0xb0b1
				MX6QDL_PAD_EIM_DA6__EIM_AD06   0xb0b1
				MX6QDL_PAD_EIM_DA5__EIM_AD05   0xb0b1
				MX6QDL_PAD_EIM_DA4__EIM_AD04   0xb0b1
				MX6QDL_PAD_EIM_DA3__EIM_AD03   0xb0b1
				MX6QDL_PAD_EIM_DA2__EIM_AD02   0xb0b1
				MX6QDL_PAD_EIM_DA1__EIM_AD01   0xb0b1
				MX6QDL_PAD_EIM_DA0__EIM_AD00   0xb0b1
			>;
		};
		pinctrl_weim_rdnwr_1: weim_rdnwr-1 {
			fsl,pins = <
				MX6QDL_PAD_SD2_CLK__GPIO1_IO10   PAD_CTRL_IN
				MX6QDL_PAD_RGMII_TD3__GPIO6_IO23 PAD_CTRL_HYS_PD
			>;
		};
		pinctrl_weim_npwe_1: weim_npwe-1 {
			fsl,pins = <
				MX6QDL_PAD_SD2_DAT3__GPIO1_IO12  PAD_CTRL_IN
				MX6QDL_PAD_RGMII_TD2__GPIO6_IO22 PAD_CTRL_HYS_PD
			>;
		};

		/* ADDRESS[16:18] [25] used as GPIO */
		pinctrl_weim_gpio_1: weim_gpio-1 {
			fsl,pins = <
				MX6QDL_PAD_KEY_ROW4__GPIO4_IO15    PAD_CTRL_HYS_PU
				MX6QDL_PAD_KEY_ROW2__GPIO4_IO11    PAD_CTRL_HYS_PU
				MX6QDL_PAD_KEY_COL2__GPIO4_IO10    PAD_CTRL_HYS_PU
				MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 PAD_CTRL_HYS_PU
				MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 PAD_CTRL_HYS_PU
				MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 PAD_CTRL_HYS_PU
				MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 PAD_CTRL_HYS_PU
				MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 PAD_CTRL_HYS_PU
				MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 PAD_CTRL_HYS_PU
				MX6QDL_PAD_NANDF_D1__GPIO2_IO01    PAD_CTRL_HYS_PU
			>;
		};
		/* ADDRESS[19:24] used as GPIO */
		pinctrl_weim_gpio_2: weim_gpio-2 {
			fsl,pins = <
				MX6QDL_PAD_KEY_ROW2__GPIO4_IO11    PAD_CTRL_HYS_PU
				MX6QDL_PAD_KEY_COL2__GPIO4_IO10    PAD_CTRL_HYS_PU
				MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 PAD_CTRL_HYS_PU
				MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 PAD_CTRL_HYS_PU
				MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 PAD_CTRL_HYS_PU
				MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 PAD_CTRL_HYS_PU
				MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 PAD_CTRL_HYS_PU
				MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 PAD_CTRL_HYS_PU
				MX6QDL_PAD_NANDF_D1__GPIO2_IO01    PAD_CTRL_HYS_PU
			>;
		};
		/* DATA[16:31]  used as GPIO */
		pinctrl_weim_gpio_3: weim_gpio-3 {
			fsl,pins = <
				MX6QDL_PAD_EIM_LBA__GPIO2_IO27     PAD_CTRL_HYS_PU
				MX6QDL_PAD_EIM_BCLK__GPIO6_IO31    PAD_CTRL_HYS_PU
				MX6QDL_PAD_NANDF_CS3__GPIO6_IO16   PAD_CTRL_HYS_PU
				MX6QDL_PAD_NANDF_CS1__GPIO6_IO14   PAD_CTRL_HYS_PU
				MX6QDL_PAD_NANDF_RB0__GPIO6_IO10   PAD_CTRL_HYS_PU
				MX6QDL_PAD_NANDF_ALE__GPIO6_IO08   PAD_CTRL_HYS_PU
				MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09  PAD_CTRL_HYS_PU
				MX6QDL_PAD_NANDF_CS0__GPIO6_IO11   PAD_CTRL_HYS_PU
				MX6QDL_PAD_NANDF_CLE__GPIO6_IO07   PAD_CTRL_HYS_PU
				MX6QDL_PAD_GPIO_19__GPIO4_IO05     PAD_CTRL_HYS_PU
				MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19   PAD_CTRL_HYS_PU
				MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 PAD_CTRL_HYS_PU
				MX6QDL_PAD_GPIO_4__GPIO1_IO04      PAD_CTRL_HYS_PU
				MX6QDL_PAD_GPIO_5__GPIO1_IO05      PAD_CTRL_HYS_PU
				MX6QDL_PAD_GPIO_2__GPIO1_IO02      PAD_CTRL_HYS_PU
			>;
		};
		/* DQM[0:3]  used as GPIO */
		pinctrl_weim_gpio_4: weim_gpio-4 {
			fsl,pins = <
				MX6QDL_PAD_EIM_EB0__GPIO2_IO28  PAD_CTRL_HYS_PU
				MX6QDL_PAD_EIM_EB1__GPIO2_IO29  PAD_CTRL_HYS_PU
				MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 PAD_CTRL_HYS_PU
				MX6QDL_PAD_NANDF_D0__GPIO2_IO00 PAD_CTRL_HYS_PU
			>;
		};
		/* RDY  used as GPIO */
		pinctrl_weim_gpio_5: weim_gpio-5 {
			fsl,pins = <
				MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 PAD_CTRL_HYS_PU
			>;
		};
		/* ADDRESS[16] DATA[30]  used as GPIO */
		pinctrl_weim_gpio_6: weim_gpio-6 {
			fsl,pins = <
				MX6QDL_PAD_KEY_ROW4__GPIO4_IO15    PAD_CTRL_HYS_PU
				MX6QDL_PAD_KEY_COL4__GPIO4_IO14    PAD_CTRL_HYS_PU
			>;
		};
	};
};

/* PWM B */
&pwm1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm1>;
	status = "disabled";
};
/* PWM D */
&pwm2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm2 &pinctrl_pwm_d_cif_d6>;
	status = "disabled";
};
/* PWM A */
&pwm3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm3 &pinctrl_pwm_a_cif_d7>;
	status = "disabled";
};
/* PWM C */
&pwm4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm4>;
	status = "disabled";
};

/* S/PDIF out on SODIMM 137 */
&spdif {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spdif_t1>;
	status = "disabled";
};

&ssi1 {
	fsl,mode = "i2s-slave";
	status = "okay";
};

/* UART A */
&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1_dte &pinctrl_uart1_ctrl>;
	fsl,dte-mode;
	fsl,uart-has-rtscts;
	status = "disabled";
};

/* UART B */
&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2_dte>;
	fsl,dte-mode;
	fsl,uart-has-rtscts;
	status = "disabled";
};

/* UART_C */
&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3_dte>;
	fsl,dte-mode;
	status = "disabled";
};

&usbh1 {
	vbus-supply = <&reg_usb_host_vbus>;
	status = "disabled";
};

&usbotg {
	pinctrl-names = "default";
//	pinctrl-0 = <&pinctrl_usbotg_2>;
	disable-over-current;
	dr_mode = "otg";
	status = "disabled";
};

/* MMC */
&usdhc1 {
	label = "MMC1";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_mmc_cd>;
	cd-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
	disable-wp;
	enable-sdio-wakeup;
	keep-power-in-suspend;
	vmmc-supply = <&reg_3p3v>;
	bus-width = <4>;
	no-1-8-v;
	status = "disabled";
};

/* eMMC */
&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	vmmc-supply = <&reg_3p3v>;
	bus-width = <8>;
	no-1-8-v;
	non-removable;
	status = "okay";
};

&weim {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_weim_sram_1  &pinctrl_weim_cs0
	             &pinctrl_weim_cs1   &pinctrl_weim_cs2
	             &pinctrl_weim_rdnwr_1 &pinctrl_weim_npwe_1>;
	#address-cells = <2>;
	#size-cells = <1>;
	status = "disabled";
};