1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
|
/*
* Freescale MXS LCDIF interfaces
*
* Author: Vitaly Wool <vital@embeddedalley.com>
* Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
* Copyright (C) 2009-2010 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
#ifndef _ARCH_ARM_LCDIF_H
#define _ARCH_ARM_LCDIF_H
#include <linux/types.h>
#include <linux/fb.h>
#include <linux/list.h>
#include <linux/backlight.h>
#include <linux/dma-mapping.h>
#include <linux/regulator/consumer.h>
#include <linux/platform_device.h>
#include <mach/device.h>
#include <mach/hardware.h>
#include "regs-lcdif.h"
#define REGS_LCDIF_BASE IO_ADDRESS(LCDIF_PHYS_ADDR)
enum {
SPI_MOSI = 0,
SPI_SCLK,
SPI_CS,
};
struct mxs_lcd_dma_chain_info {
dma_addr_t *dma_addr_p;
unsigned offset;
};
enum {
MXS_LCD_PANEL_SYSTEM = 0,
MXS_LCD_PANEL_VSYNC,
MXS_LCD_PANEL_DOTCLK,
MXS_LCD_PANEL_DVI,
};
struct mxs_platform_bl_data;
struct mxs_platform_fb_entry {
char name[16];
u16 x_res;
u16 y_res;
u16 bpp;
u32 cycle_time_ns;
int lcd_type;
int (*init_panel) (struct device *, dma_addr_t, int,
struct mxs_platform_fb_entry *);
void (*release_panel) (struct device *, struct mxs_platform_fb_entry *);
int (*blank_panel) (int);
void (*run_panel) (void);
void (*stop_panel) (void);
int (*pan_display) (dma_addr_t);
int (*update_panel) (void *, struct mxs_platform_fb_entry *);
struct list_head link;
struct mxs_platform_bl_data *bl_data;
};
struct mxs_platform_fb_data {
struct list_head list;
struct mxs_platform_fb_entry *cur;
struct mxs_platform_fb_entry *next;
};
#define MXS_LCDIF_PANEL_INIT 1
#define MXS_LCDIF_PANEL_RELEASE 2
struct mxs_platform_bl_data {
struct list_head list;
struct regulator *regulator;
int bl_gpio;
int bl_max_intensity;
int bl_cons_intensity;
int bl_default_intensity;
int (*init_bl) (struct mxs_platform_bl_data *);
int (*set_bl_intensity) (struct mxs_platform_bl_data *,
struct backlight_device *, int);
void (*free_bl) (struct mxs_platform_bl_data *);
};
static inline void mxs_lcd_register_entry(struct mxs_platform_fb_entry
*pentry, struct mxs_platform_fb_data
*pdata)
{
list_add_tail(&pentry->link, &pdata->list);
if (!pdata->cur)
pdata->cur = pentry;
}
static inline void mxs_lcd_move_pentry_up(struct mxs_platform_fb_entry
*pentry, struct mxs_platform_fb_data
*pdata)
{
list_move(&pentry->link, &pdata->list);
}
static inline int mxs_lcd_iterate_pdata(struct mxs_platform_fb_data
*pdata,
int (*func) (struct
mxs_platform_fb_entry
* pentry, void *data,
int ret_prev), void *data)
{
struct mxs_platform_fb_entry *pentry;
int ret = 0;
list_for_each_entry(pentry, &pdata->list, link) {
ret = func(pentry, data, ret);
}
return ret;
}
static inline void mxs_lcd_set_bl_pdata(struct mxs_platform_bl_data
*pdata)
{
struct platform_device *pdev;
pdev = mxs_get_device("mxs-bl", 0);
if (pdev == NULL || IS_ERR(pdev))
return;
pdev->dev.platform_data = pdata;
}
void mxs_init_lcdif(void);
int mxs_lcdif_dma_init(struct device *dev, dma_addr_t phys, int memsize);
void mxs_lcdif_dma_release(void);
void mxs_lcdif_run(void);
void mxs_lcdif_stop(void);
int mxs_lcdif_pan_display(dma_addr_t addr);
int mxs_lcdif_register_client(struct notifier_block *nb);
void mxs_lcdif_unregister_client(struct notifier_block *nb);
void mxs_lcdif_notify_clients(unsigned long event,
struct mxs_platform_fb_entry *pentry);
#ifndef FBIO_WAITFORVSYNC
#define FBIO_WAITFORVSYNC _IOW('F', 0x20, u_int32_t)
#endif
static inline void setup_dotclk_panel(u16 v_pulse_width,
u16 v_period,
u16 v_wait_cnt,
u16 v_active,
u16 h_pulse_width,
u16 h_period,
u16 h_wait_cnt,
u16 h_active, int enable_present)
{
u32 val;
__raw_writel(BM_LCDIF_CTRL_DATA_SHIFT_DIR,
REGS_LCDIF_BASE + HW_LCDIF_CTRL_CLR);
__raw_writel(BM_LCDIF_CTRL_SHIFT_NUM_BITS,
REGS_LCDIF_BASE + HW_LCDIF_CTRL_CLR);
__raw_writel(BM_LCDIF_CTRL1_BYTE_PACKING_FORMAT,
REGS_LCDIF_BASE + HW_LCDIF_CTRL1_CLR);
__raw_writel(BF_LCDIF_CTRL1_BYTE_PACKING_FORMAT(7) |
BM_LCDIF_CTRL1_RECOVER_ON_UNDERFLOW,
REGS_LCDIF_BASE + HW_LCDIF_CTRL1_SET);
val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_TRANSFER_COUNT);
val &= ~(BM_LCDIF_TRANSFER_COUNT_V_COUNT |
BM_LCDIF_TRANSFER_COUNT_H_COUNT);
val |= BF_LCDIF_TRANSFER_COUNT_H_COUNT(h_active) |
BF_LCDIF_TRANSFER_COUNT_V_COUNT(v_active);
__raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_TRANSFER_COUNT);
__raw_writel(BM_LCDIF_CTRL_VSYNC_MODE,
REGS_LCDIF_BASE + HW_LCDIF_CTRL_CLR);
__raw_writel(BM_LCDIF_CTRL_WAIT_FOR_VSYNC_EDGE,
REGS_LCDIF_BASE + HW_LCDIF_CTRL_CLR);
__raw_writel(BM_LCDIF_CTRL_DVI_MODE,
REGS_LCDIF_BASE + HW_LCDIF_CTRL_CLR);
__raw_writel(BM_LCDIF_CTRL_DOTCLK_MODE,
REGS_LCDIF_BASE + HW_LCDIF_CTRL_SET);
__raw_writel(BM_LCDIF_CTRL_BYPASS_COUNT,
REGS_LCDIF_BASE + HW_LCDIF_CTRL_SET);
__raw_writel(BM_LCDIF_CTRL_WORD_LENGTH |
BM_LCDIF_CTRL_INPUT_DATA_SWIZZLE |
BM_LCDIF_CTRL_LCD_DATABUS_WIDTH,
REGS_LCDIF_BASE + HW_LCDIF_CTRL_CLR);
__raw_writel(BF_LCDIF_CTRL_WORD_LENGTH(3) | /* 24 bit */
BM_LCDIF_CTRL_DATA_SELECT | /* data mode */
BF_LCDIF_CTRL_INPUT_DATA_SWIZZLE(0) | /* no swap */
BF_LCDIF_CTRL_LCD_DATABUS_WIDTH(3), /* 24 bit */
REGS_LCDIF_BASE + HW_LCDIF_CTRL_SET);
val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0);
val &= ~(BM_LCDIF_VDCTRL0_VSYNC_POL |
BM_LCDIF_VDCTRL0_HSYNC_POL |
BM_LCDIF_VDCTRL0_ENABLE_POL | BM_LCDIF_VDCTRL0_DOTCLK_POL);
val |= BM_LCDIF_VDCTRL0_ENABLE_POL | BM_LCDIF_VDCTRL0_DOTCLK_POL;
__raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0);
val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0);
val &= ~(BM_LCDIF_VDCTRL0_VSYNC_OEB);
/* vsync is output */
__raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0);
/*
* need enable sig for true RGB i/f. Or, if not true RGB, leave it
* zero.
*/
val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0);
val |= BM_LCDIF_VDCTRL0_ENABLE_PRESENT;
__raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0);
/*
* For DOTCLK mode, count VSYNC_PERIOD in terms of complete hz lines
*/
val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0);
val &= ~(BM_LCDIF_VDCTRL0_VSYNC_PERIOD_UNIT |
BM_LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_UNIT);
val |= BM_LCDIF_VDCTRL0_VSYNC_PERIOD_UNIT |
BM_LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_UNIT;
__raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0);
__raw_writel(BM_LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH,
REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0_CLR);
__raw_writel(v_pulse_width, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0_SET);
__raw_writel(BF_LCDIF_VDCTRL1_VSYNC_PERIOD(v_period),
REGS_LCDIF_BASE + HW_LCDIF_VDCTRL1);
__raw_writel(BF_LCDIF_VDCTRL2_HSYNC_PULSE_WIDTH(h_pulse_width) |
BF_LCDIF_VDCTRL2_HSYNC_PERIOD(h_period),
REGS_LCDIF_BASE + HW_LCDIF_VDCTRL2);
val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_VDCTRL4);
val &= ~BM_LCDIF_VDCTRL4_DOTCLK_H_VALID_DATA_CNT;
val |= BF_LCDIF_VDCTRL4_DOTCLK_H_VALID_DATA_CNT(h_active);
__raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL4);
val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_VDCTRL3);
val &= ~(BM_LCDIF_VDCTRL3_HORIZONTAL_WAIT_CNT |
BM_LCDIF_VDCTRL3_VERTICAL_WAIT_CNT);
val |= BF_LCDIF_VDCTRL3_HORIZONTAL_WAIT_CNT(h_wait_cnt) |
BF_LCDIF_VDCTRL3_VERTICAL_WAIT_CNT(v_wait_cnt);
__raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL3);
val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_VDCTRL4);
val |= BM_LCDIF_VDCTRL4_SYNC_SIGNALS_ON;
__raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL4);
}
static inline void release_dotclk_panel(void)
{
__raw_writel(BM_LCDIF_CTRL_DOTCLK_MODE,
REGS_LCDIF_BASE + HW_LCDIF_CTRL_CLR);
__raw_writel(0, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0);
__raw_writel(0, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL1);
__raw_writel(0, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL2);
__raw_writel(0, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL3);
}
#endif /* _ARCH_ARM_LCDIF_H */
|
