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/*
* Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/*!
* @file mach-mx51/cpu.c
*
* @brief This file contains the CPU initialization code.
*
* @ingroup MSL_MX51
*/
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <mach/hardware.h>
#include <asm/io.h>
#include "crm_regs.h"
/*!
* CPU initialization. It is called by fixup_mxc_board()
*/
void __init mxc_cpu_init(void)
{
if (!system_rev)
mxc_set_system_rev(0x51, CHIP_REV_1_0);
}
static int __init post_cpu_init(void)
{
void __iomem *base;
unsigned int reg;
/* Set ALP bits to 000. Set ALP_EN bit in Arm Memory Controller reg. */
reg = 0x8;
__raw_writel(reg, MXC_CORTEXA8_PLAT_AMC);
base = IO_ADDRESS(AIPS1_BASE_ADDR);
__raw_writel(0x0, base + 0x40);
__raw_writel(0x0, base + 0x44);
__raw_writel(0x0, base + 0x48);
__raw_writel(0x0, base + 0x4C);
reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
__raw_writel(reg, base + 0x50);
base = IO_ADDRESS(AIPS2_BASE_ADDR);
__raw_writel(0x0, base + 0x40);
__raw_writel(0x0, base + 0x44);
__raw_writel(0x0, base + 0x48);
__raw_writel(0x0, base + 0x4C);
reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
__raw_writel(reg, base + 0x50);
return 0;
}
postcore_initcall(post_cpu_init);
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