blob: 17ab5aab6b5ddcb173a301e1a30710f7d90e008f (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
|
/*
* arch/arm/mach-spear6xx/include/mach/spear.h
*
* SPEAr6xx Machine family specific definition
*
* Copyright (C) 2009 ST Microelectronics
* Rajeev Kumar<rajeev-dlh.kumar@st.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef __MACH_SPEAR6XX_H
#define __MACH_SPEAR6XX_H
#include <mach/spear600.h>
#define SPEAR6XX_ML_SDRAM_BASE 0x00000000
#define SPEAR6XX_ML_SDRAM_SIZE 0x40000000
/* ICM1 - Low speed connection */
#define SPEAR6XX_ICM1_BASE 0xD0000000
#define SPEAR6XX_ICM1_SIZE 0x08000000
#define SPEAR6XX_ICM1_UART0_BASE 0xD0000000
#define VA_SPEAR6XX_ICM1_UART0_BASE IO_ADDRESS(SPEAR6XX_ICM1_UART0_BASE)
#define SPEAR6XX_ICM1_UART0_SIZE 0x00080000
#define SPEAR6XX_ICM1_UART1_BASE 0xD0080000
#define SPEAR6XX_ICM1_UART1_SIZE 0x00080000
#define SPEAR6XX_ICM1_SSP0_BASE 0xD0100000
#define SPEAR6XX_ICM1_SSP0_SIZE 0x00080000
#define SPEAR6XX_ICM1_SSP1_BASE 0xD0180000
#define SPEAR6XX_ICM1_SSP1_SIZE 0x00080000
#define SPEAR6XX_ICM1_I2C_BASE 0xD0200000
#define SPEAR6XX_ICM1_I2C_SIZE 0x00080000
#define SPEAR6XX_ICM1_JPEG_BASE 0xD0800000
#define SPEAR6XX_ICM1_JPEG_SIZE 0x00800000
#define SPEAR6XX_ICM1_IRDA_BASE 0xD1000000
#define SPEAR6XX_ICM1_IRDA_SIZE 0x00800000
#define SPEAR6XX_ICM1_FSMC_BASE 0xD1800000
#define SPEAR6XX_ICM1_FSMC_SIZE 0x00800000
#define SPEAR6XX_ICM1_NAND_BASE 0xD2000000
#define SPEAR6XX_ICM1_NAND_SIZE 0x00800000
#define SPEAR6XX_ICM1_SRAM_BASE 0xD2800000
#define SPEAR6XX_ICM1_SRAM_SIZE 0x00800000
/* ICM2 - Application Subsystem */
#define SPEAR6XX_ICM2_BASE 0xD8000000
#define SPEAR6XX_ICM2_SIZE 0x08000000
#define SPEAR6XX_ICM2_TMR0_BASE 0xD8000000
#define SPEAR6XX_ICM2_TMR0_SIZE 0x00080000
#define SPEAR6XX_ICM2_TMR1_BASE 0xD8080000
#define SPEAR6XX_ICM2_TMR1_SIZE 0x00080000
#define SPEAR6XX_ICM2_GPIO_BASE 0xD8100000
#define SPEAR6XX_ICM2_GPIO_SIZE 0x00080000
#define SPEAR6XX_ICM2_SPI2_BASE 0xD8180000
#define SPEAR6XX_ICM2_SPI2_SIZE 0x00080000
#define SPEAR6XX_ICM2_ADC_BASE 0xD8200000
#define SPEAR6XX_ICM2_ADC_SIZE 0x00080000
/* ML-1, 2 - Multi Layer CPU Subsystem */
#define SPEAR6XX_ML_CPU_BASE 0xF0000000
#define SPEAR6XX_ML_CPU_SIZE 0x08000000
#define SPEAR6XX_CPU_TMR_BASE 0xF0000000
#define SPEAR6XX_CPU_TMR_SIZE 0x00100000
#define SPEAR6XX_CPU_GPIO_BASE 0xF0100000
#define SPEAR6XX_CPU_GPIO_SIZE 0x00100000
#define SPEAR6XX_CPU_VIC_SEC_BASE 0xF1000000
#define VA_SPEAR6XX_CPU_VIC_SEC_BASE IO_ADDRESS(SPEAR6XX_CPU_VIC_SEC_BASE)
#define SPEAR6XX_CPU_VIC_SEC_SIZE 0x00100000
#define SPEAR6XX_CPU_VIC_PRI_BASE 0xF1100000
#define VA_SPEAR6XX_CPU_VIC_PRI_BASE IO_ADDRESS(SPEAR6XX_CPU_VIC_PRI_BASE)
#define SPEAR6XX_CPU_VIC_PRI_SIZE 0x00100000
/* ICM3 - Basic Subsystem */
#define SPEAR6XX_ICM3_BASE 0xF8000000
#define SPEAR6XX_ICM3_SIZE 0x08000000
#define SPEAR6XX_ICM3_SMEM_BASE 0xF8000000
#define SPEAR6XX_ICM3_SMEM_SIZE 0x04000000
#define SPEAR6XX_ICM3_SMI_CTRL_BASE 0xFC000000
#define SPEAR6XX_ICM3_SMI_CTRL_SIZE 0x00200000
#define SPEAR6XX_ICM3_CLCD_BASE 0xFC200000
#define SPEAR6XX_ICM3_CLCD_SIZE 0x00200000
#define SPEAR6XX_ICM3_DMA_BASE 0xFC400000
#define SPEAR6XX_ICM3_DMA_SIZE 0x00200000
#define SPEAR6XX_ICM3_SDRAM_CTRL_BASE 0xFC600000
#define SPEAR6XX_ICM3_SDRAM_CTRL_SIZE 0x00200000
#define SPEAR6XX_ICM3_TMR_BASE 0xFC800000
#define SPEAR6XX_ICM3_TMR_SIZE 0x00080000
#define SPEAR6XX_ICM3_WDT_BASE 0xFC880000
#define SPEAR6XX_ICM3_WDT_SIZE 0x00080000
#define SPEAR6XX_ICM3_RTC_BASE 0xFC900000
#define SPEAR6XX_ICM3_RTC_SIZE 0x00080000
#define SPEAR6XX_ICM3_GPIO_BASE 0xFC980000
#define SPEAR6XX_ICM3_GPIO_SIZE 0x00080000
#define SPEAR6XX_ICM3_SYS_CTRL_BASE 0xFCA00000
#define VA_SPEAR6XX_ICM3_SYS_CTRL_BASE IO_ADDRESS(SPEAR6XX_ICM3_SYS_CTRL_BASE)
#define SPEAR6XX_ICM3_SYS_CTRL_SIZE 0x00080000
#define SPEAR6XX_ICM3_MISC_REG_BASE 0xFCA80000
#define VA_SPEAR6XX_ICM3_MISC_REG_BASE IO_ADDRESS(SPEAR6XX_ICM3_MISC_REG_BASE)
#define SPEAR6XX_ICM3_MISC_REG_SIZE 0x00080000
/* ICM4 - High Speed Connection */
#define SPEAR6XX_ICM4_BASE 0xE0000000
#define SPEAR6XX_ICM4_SIZE 0x08000000
#define SPEAR6XX_ICM4_GMAC_BASE 0xE0800000
#define SPEAR6XX_ICM4_GMAC_SIZE 0x00800000
#define SPEAR6XX_ICM4_USBD_FIFO_BASE 0xE1000000
#define SPEAR6XX_ICM4_USBD_FIFO_SIZE 0x00100000
#define SPEAR6XX_ICM4_USBD_CSR_BASE 0xE1100000
#define SPEAR6XX_ICM4_USBD_CSR_SIZE 0x00100000
#define SPEAR6XX_ICM4_USBD_PLDT_BASE 0xE1200000
#define SPEAR6XX_ICM4_USBD_PLDT_SIZE 0x00100000
#define SPEAR6XX_ICM4_USB_EHCI0_BASE 0xE1800000
#define SPEAR6XX_ICM4_USB_EHCI0_SIZE 0x00100000
#define SPEAR6XX_ICM4_USB_OHCI0_BASE 0xE1900000
#define SPEAR6XX_ICM4_USB_OHCI0_SIZE 0x00100000
#define SPEAR6XX_ICM4_USB_EHCI1_BASE 0xE2000000
#define SPEAR6XX_ICM4_USB_EHCI1_SIZE 0x00100000
#define SPEAR6XX_ICM4_USB_OHCI1_BASE 0xE2100000
#define SPEAR6XX_ICM4_USB_OHCI1_SIZE 0x00100000
#define SPEAR6XX_ICM4_USB_ARB_BASE 0xE2800000
#define SPEAR6XX_ICM4_USB_ARB_SIZE 0x00010000
/* Debug uart for linux, will be used for debug and uncompress messages */
#define SPEAR_DBG_UART_BASE SPEAR6XX_ICM1_UART0_BASE
#define VA_SPEAR_DBG_UART_BASE VA_SPEAR6XX_ICM1_UART0_BASE
/* Sysctl base for spear platform */
#define SPEAR_SYS_CTRL_BASE SPEAR6XX_ICM3_SYS_CTRL_BASE
#define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR6XX_ICM3_SYS_CTRL_BASE
#endif /* __MACH_SPEAR6XX_H */
|
