blob: 6c051270cc93db22a7892fb3da1d97dce4d92ede (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
|
/*
* arch/arm/mach-tegra/wakeups-t3.h
*
* Declarations of Tegra 3 LP0 wakeup sources
*
* Copyright (c) 2010, NVIDIA Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*/
#ifndef __MACH_TEGRA_WAKEUPS_T3_H
#define __MACH_TEGRA_WAKEUPS_T3_H
#ifndef CONFIG_ARCH_TEGRA_3x_SOC
#error "Tegra 3 wakeup sources valid only for CONFIG_ARCH_TEGRA_3x_SOC"
#endif
#define TEGRA_WAKE_GPIO_PO5 0
#define TEGRA_WAKE_GPIO_PV1 1
#define TEGRA_WAKE_GPIO_PL1 2
#define TEGRA_WAKE_GPIO_PB6 3
#define TEGRA_WAKE_GPIO_PN7 4
#define TEGRA_WAKE_GPIO_PBB6 5
#define TEGRA_WAKE_GPIO_PU5 6
#define TEGRA_WAKE_GPIO_PU6 7
#define TEGRA_WAKE_GPIO_PC7 8
#define TEGRA_WAKE_GPIO_PS2 9
#define TEGRA_WAKE_GPIO_PAA1 10
#define TEGRA_WAKE_GPIO_PW3 11
#define TEGRA_WAKE_GPIO_PW2 12
#define TEGRA_WAKE_GPIO_PY6 13
#define TEGRA_WAKE_GPIO_PDD3 14
#define TEGRA_WAKE_GPIO_PJ2 15
#define TEGRA_WAKE_RTC_ALARM 16
#define TEGRA_WAKE_KBC_EVENT 17
#define TEGRA_WAKE_PWR_INT 18
#define TEGRA_WAKE_USB1_VBUS 19
#define TEGRA_WAKE_USB2_VBUS 20
#define TEGRA_WAKE_USB1_ID 21
#define TEGRA_WAKE_USB2_ID 22
#define TEGRA_WAKE_GPIO_PI5 23
#define TEGRA_WAKE_GPIO_PV0 24
#define TEGRA_WAKE_GPIO_PS4 25
#define TEGRA_WAKE_GPIO_PS5 26
#define TEGRA_WAKE_GPIO_PS0 27
#define TEGRA_WAKE_GPIO_PS6 28
#define TEGRA_WAKE_GPIO_PS7 29
#define TEGRA_WAKE_GPIO_PN2 30
/* bit 31 is unused */
#define TEGRA_WAKE_GPIO_PO4 32
#define TEGRA_WAKE_GPIO_PJ0 33
#define TEGRA_WAKE_GPIO_PK2 34
#define TEGRA_WAKE_GPIO_PI6 35
#define TEGRA_WAKE_GPIO_PBB1 36
#define TEGRA_WAKE_USB3_ID 37
#define TEGRA_WAKE_USB3_VBUS 38
#endif
|